Note: Descriptions are shown in the official language in which they were submitted.
5~139
-- ¦ XODEM Wl~H ~U5DU~I PO~ RE
: ~ BACKGROUND OF THE INVENTIOl~
The su~jece invention ~relates generally to digita~;~dat~ t~:
nuni~atlonsand~morc~particula~rly~ eO~ apparatu~ ~mpioyinq~:m~tti~
y ploxlng~ to con~'ol_~ a plurallty of digitlll d-ta ~- annol~ ~for
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548~3
transmission over a isingle transmi5s~0n path~ The invention
provides apparatUis for automatically varying the channel config-
uration and iS particularly usefu:L in con~unction with digital
data modems~
In the prior axt, digitall data modem apparatus i~i known
for interfacing with data-processing apparatus at either end of
a tranSmission channel such as a telephone line~ Multiport
modems are also known which provide a plurlaity of channels for
communication with a similar plurality of channels of the
associated data processing apparatus. The multiple channel .
informa~ion is multiplexed for transmission ove~ an individual
lineO Multipl~xing is typically accomplished by TDM ttime division
multiplexing) With bit-by-bit interlacing of channels. Of course, :~
many methodis of multiplexlng are known and could be used according.
to the inventionO
In initiating com=unication ~cross a transmission line
between modems, it is generally known in the prior art to provide
a sequence.of initializing signals, in what is sometimes referred~ :
to as a "handshaking" operation~ SUch signals may indicate when
a data source actually wants to transmit data or wants a channel
at its disposal read~ for transmiSsi~n. An example of the former
alternative currently in use is RTS ~request to send or ready for .
sending). ~n example of the second alternative is DTR (data
terminal ready) or DSR (data set ready)~ RTS is present only
while a transmission iS in progress~ while DTR will be present ~ ¦
throughout the time that the data source is engaged in in~eractive
communica~ion with a device i~iuch as a ~PU. It is also known to ~
providc DCD ~data carrier detect) and RLSD i~lgnals (receive linc .
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line signal detect). It is known not onl~ to provide DCD in the
presence of a data carrier from a communicating modem but also to
set ~CD low upon receipt of a coded inverse of the RTS signal
(RTS). One commercially availabLe modem Lncorporating 1:he use of
signals as described above is the Milgo 9~ MM. Such signals may
be particularly taken advantage of in accordance with the inventio
as will be presently described.
Xnown multiport modems contain the necessary circuitry
for switching between various port configurations in response to
commands set manually by an operator. Such channel allocatlon
or port reconfiguration is useful when data traffic patt: rns
differ relatively infrequently in a known~mannerO It i5 then
possible to ~set up a mode switching schedllle which requires the
intervention of an operator from time to 1:ime to effect mode
changes~ Moreover the actions of tw~ opexatorsO one manually
operating a modem at each end of the tran~mission line, must
obviously be coordinated. To make more efficient use of ~he
expensive telephone channels~ it would be desirable to have a
dynamic port reconfiguration capability wherein the data processin
apparatus and modem system would cooperate to reconfigure ~orts -
rapidly and automatically without operator intervention.
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- SUMMARY OF THE INVFNTION
It is therefore an object of th~ invention to recon-
figure modem port configurations without manual intervention.
It is another object of the invention to auto~atically
coordinate mode ~switching at two modem~ linked by a transmis~ion
path.
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S~39
It is a further object of the invention to enable
dynamic port configuration, allowing a modem or multiplexer to
adapt to changing traffic pattern~ flexlbly and in a~ unscheduled
manner so as to obtain the optimun~ use of available bandwidth at
any given time.
To attain theqe and other objects of the invention,
circuitry is provided which automatically detects a request from
cooperating apparatus to change the multiplexing arrangement
(port or channel configuration) and automatically provides con-
trol s-ignals to cause the multiplexing apparatus to effect the
desired change.
Thus, in accordance with the present invention
there is provided a data modem having a plurality of input
ports each adapted to communicate with respective data
output terminals of associated apparatus, said associated
apparatus providing a demand signal per port, each demand
signa~l indicating a request for allocating transmission
capacity to its respective data output terminal, the
apparatus comprising:
means for multiplexing said ports in one of a
plurality of configurat;ions and responsive to control
signals for selecting the particular port configuration to
be adopted; and
means for automatically detecting a change in
demand signals requiring a shift to a different port
configuration and automatically causing said multiplexing
means to switch to the different port configuration.
Also in accordance with the present invention
there is provicied a data modem having a given bandwidth
3~ capability, the apparatus comprising:
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a plurality N of data ports;
a line port operating in multiplex relationship
with said data ports;
mode selection means operative to assign channels
within the available bandwidth to different combinations of
N and less than N of said data ports in corresponding
different multiplex modes;
a plurality N of demand terminals for receipt of
automatically supplied demand signals corresponding to said
1~ data ports respectively; and
mode switching means responsive to said demand
signals on said demand terminals to control said mode
selection means for automatic selection of modes in
accordance with the demand signals actually present.
Further in accordance with the present invention
: there is provided in a multiple input port data modem
adapted to have a data source channel connected to each
input port, said modem being adapted to receive one of a
plurality of request codes from associated equipment, each
such code containing information as to which data sources
currently request transmission capacity, apparatus, :~:
comprising:
: means for multiplexing said channels in one of a
plurality of N configurations, wherein said channels have a
priority order of 1 to N with 1 being the highest priority,
said means being responsive to first control signals for
selecting the particular channel configuration to be
adopted; and
means for detecting a change in request code
3~ requiring a channel configuration change and for generating
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control signals to said multiplexing means to cause said
multiplexing means to switch to a new channel configuration
wherein the lowest priority channel present in the channel
coniguration requested by the channel request signal is
allocated transmission capacity.
Further, in accordance with the present invention
there is provided an apparatus in a data modem having a
given bandwidth capability and adapted to be supplied with
demand signals from associated apparatus, said apparatus
comprising:
a plurality of N data ports, wherein each data
port has a priority order of 1 to N, 1 being the highest
priority;
a line port operating in multiplex relationship
with said data ports;
mode selection means operative to assign
channels, within the available bandwidth, to different
combinations of less than N and N of said data ports;
a plurality of N demand terminals, one for each
of said data ports, for receipt of demand signals from the
associated data apparatus coupled to said ports; and
mode switching means, responsive to said demand :
signals on said demand terminals for controlling said mode
selection means to automatically select a mode so that the
highest priority data port is assigned transmission
capacity allocatable to any ports having a priority lower
than the lowest priority port for which a demand signal is
present.
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In a preferred apparatus of the invention when an
apparatus having ports providing data input/output channels to
a first data modem requests a change of port (channel) configura-
tion the request is detected, held and an indication thereof
sent across a transmission path to serve as a port reconfigura-
tion request to a second, cooperating modem. After a suitable
delay to allow the second modem to switch to the proper port
configuration, the first modem, originally presented with the
port reconfiguration requeæt by the data processing apparatus,
switches to the new port configuration. The data modem or
multiplexer at the end of the line where the request for a new
port configuration originates is treated as the master unit while
the multiplexer modem at the other end of the line is the slave.
Port configuration mode switching 1s made demand-dependent so
that when a data source ddes not demand a ~hannel, its channel
is reallocated to the active data sources~
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According to another feature of the invention, a mod~m
user can take advantage of master clocks in controlling data
processing apparatus at two modem sites to synchronize operation
between the two modemsO Direct software synchronization is thus
made available~ removing the need to transmit synchronizing infor-
mation.
Another important aspect of the invention is the
provision of a sequencing ~echnique for switching from one port
configuration to the next utilizing handshaking signals presently
employed in communication systems employing modems. Hardware
simplification-is thereby greatly facilitated and problems
enco~ntered in adding and deleting channels are overcome.
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¦ . BRIEF_DESCRIPTION OF THE DRAWINGS
j The preferred embodiment and best mode contemplatcd ~for
i~plementing the just summarized invention will now be described
in conjunction with the drawings of which.
Fig. 1 is a simplif~ied block diagram illustrating the
¦ apparatus of the preferred embodiment of the invention. ~ ~
Fig. 2 is a block diagram of channel allocation cir- ;
cuitry.
Fig. 3 illustrates a port configuration selection
sequence according to the preferred embodiment of the invention.
Fig. 4 is a flow chart illustra~ing the operation of
the preferred embodiment of the invention in dropping channels
from active to inactive sta~usO `
Fig. S illustrates the operatio~ of the preferred
embodiment of thle invention in adding channels from an inactive
to an active 3ta-tus.
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¦ Fig. 6 is a generalized block dlagram illustrating a
¦ port configuration selection circuit according to the preferred
embodiment of the invention.
I Fig. 7 is a schematic cliagram illustrating a port
¦ reconfiguration circuit for use at either the master or the sla~e
modem according to the preferred embodiment of the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Fig. 1 illustrates a pair of moclems 11, 13 communicating
across a transmission channel lSo Each modem 11 t 13 interfaces
with a data processing apparatus such as a central processor, data
terminal or other peripheral~ For example, modem 11 may inter- ¦
face with a plurality of ports of a centr~l processing unit (CPU)
12 while modem 13 interfaces with a plural,ity of ports of some form
of data terminal equipment ~DTE) 140 As known in the prior art,
a multipor~ mod~m multiplexes a plurality of channels outputted
by associated processing apparatus for communication over a
transmission line. For example~ a multiport modem may multiplex
four ports 160 each transmitting at 2400 bits per second for an
overall data rate of 9600 bits per secondv The cooperating modem
demultiplexes the single channel information. Typically a four~
wire line, two-way transmission system is utilized such that
I multiplex and demultiplex operations are performed at both ends
lo~ the transmission line.
¦ In prac:tice; lt is often desirable to reconfigure the
channel or port arrangement. For example7 if two channel~ of a
our port device are not currently necessary for transmitting
data it ig des~rable ~o be able to ef~ectlvely disable those two
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channels and allocate their bandwidth to channels which are
actively transmitting. In this manner, more efficient data
transmission is achieved.
As alluded to eariier, known multiport modems contain th~
necessary circuitry or switching between various port config-
urations in response to manually set commands. A typical mcthod
of ~ata encoding for a multiport transmitter is indicated in Fig. .
I ~e f~o~e
Whiel Fig. 2 is somewhat simplified, ~e~ skilled in the axt will
readily reoognize the manner of implementation of this~-circuitry.
As shown in Fig. 2, the bandwidth allocation in a four
l channel system may be determined by a multiplexer clock selection
¦ circuit 101 which selects clock signals to be fed to ~our multi-
¦ plexer/demultipl~xers 103~ The clock selection circuit 101 is
I driven from a clock 105 and includes frequency di~iders and logic
¦ circuits which derive four divided clock signals interlaced with
one another in a eyclic four-phased clock sequence ~ 2~ ~3
. In response to a code, manually set ln the prior art~ the
! clock phases are selectively gated to the multiplexer/demultiplexer~
¦ 103. The phased outputs of the multiplexe!r/demultiplexers are
¦ combined into a 9600 bits per second signal on a single line by an
OR gate 104~ The OR gate 104 supplies the 9600 bits per second
data to modem ~ransmitting circuitry 106 where that data is
modulated according to known methods4 ~¦
~ For example~ if only two channels A, B of four channels
¦A, B, C, d are required to transmit data, two clock phases
¦are gated to the multiplexer for those respective channcl~ A, B
¦thereby doubling tha bit rate output on those two channel~ A, B
while he other two channel~ D ~r- ~n~Ftive.
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¦ A manner ~or interlacing the data bits at various
¦ speeds is illus~rated in the followin~ table:
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¦ ~ABLE A
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¦ Channel
¦ Speed Mode Data Rate Data Fxaming
l A B C D ,
9600 2 4800-4800 - - A~.Bo~Al~BlrA2~ 2 3 3
¦ A4 ,B4 ~A5 ~B5 'A6 'B6 ~A~ ~ 7
¦ 9600 4 2400 2400 2400 2400 ~o ,Bo ~Co ~Do ~Al ,Bl ~Cl ~ Dl ~
¦ A~B2rC2~D2~A3~B3~c3~ 3
9600 4 7200 2400 - _: Ao~AlrA2~Bo~A3~4~As~Bl~
¦ A6 ,A7 ~A~ ~ B2 ~Ag ~Alo ' ~1' 31
I 9600 - 5 4800 2400 2400 _: A~,BorAl~co~A2~lrA3~cl~A4~
B 2~A5rC2~A6~B3~A7~C3 :
! 7200 2,4,5 4800 2400: ~ -- -- Ao~Al~BorA2~A3~Bl~A~ 5 2
! `B2 ~A6 ~ A7 ~ B 3 -
¦ 7200 3 2400 2400 ~400 - Ao~orCorAlrBlrClrA2~B2~
` ~ C 2 ~ A3 ~ B 3 ~ C 3 ~ :
4800 -: 2,3,5 2400 2400 - - AO~BO~Al'Bl'A2'~?'A3'~3 ~
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In accordance with the preferred embodiment of the
invention, a modem 11 operating as a master modem receives a
port configuration or channel allocation request in coded form
from cooperating data processing apparatus such as a CPU 12. The
pr~sent port configuration is controlled by a code supplicd by
a mode shift register 17 or other storage device. The code pro-
vided by the shift register 17 selects the port configuration
as does the code provided by manual selection in prior art
multiport modems. A comparator 19 continually ee~F3~ the
port configuration request of the CPU 12 to that indicated by
the mode shift register 17. ~hould the CPU re~uest a different
p~rt configuration than that indicated by the shift register 17,
~e compara~or 19 generates shift register control signals,
indicative of a new mode rode to be provided by the register 17. :~
After a suitable delay provided by timing apparatus 21, the
shift register control information is used to change the mode-
indicating code in the shift register 17, thus establishing a
new port configuration in the multiport modem 11.
The delay provided by the timing apparatus 21 serve~
to provide a sufficient interval for the ooee~æ or sla~e modem 13 :~ ;
to respond and set up a port configuration corresponding to the
n~ly requested port configuration in thè master modem 11~
During this time interval~ the master modem 11 transmits si~nals
to the slave modem 13 which are interpreted as a transmitted port
configuration request ~y the modem i30 Apparatus functionin~
simill ly to th~t at tbe=usternDdem 11 is ~ ~ed to set the p~rt oonEig~
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¦ uration of the slave modem 13. In particular, comparison appara-
¦ tus 23 detects the new port configuration request by comparing
the request code to the mode indicated by the shift register 25.
¦ Again the comparator 23 generates shif~ r~gister control informa-
¦ tion, which after a suitable delay adjust~ the mode indi.cation
¦ provided by the shift register 25 in orde~ to alter the port
I configuration of the modem 13~
¦ In implementing the apparatus just described with
¦ reference to FigO 1, it is found very advclntageous to establish
¦ a channel priority and reconfiguration discipline in order to
simplify the circuitry and utilize existing modem line disciplin~s
. I Thus, a port configuration mode selection sequence is establish~d
¦ according to the preferred embodiment of the invention, as
.1 illustrated in Fig. 3 and Table I below- :
¦ TABLE I - .
: RESULTANT
I SPEED PORT REQUEST RESULTANT PORT CONFIGURATION
¦ A B C D MODE A B C D
. 9600 1 X X 1~ 3 . 24 24 24 24
I I X 1 0 5 48 24 24 ~ ~
:: ¦ 1 1 . 0 0 4 or 72 24 :
: : 0 0 0 . 1 96 ~
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: . 7~00 ~ ~ 1 X 3 24 24 24
1 0 5 48 24 :
0~ . 1 72 -
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I 4100 ~ 1 X X 3 . 24 24
.1 ~ C~ 1 .48
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Table I illustrates various exemplary port configura-
tions at various data rates. By way of example, the ensuing
description will consider the 9600 bit per second speed. The
table indicates the mode code consisting of four bits representa-
tive of four ports or channels A, B, C and D. The codc consists
of l's, O's and "don't cares" indicated by the character "xn. The
port configuration corresponding to a particular mode code lies
in the same row as the mode codeO Additionally, each mode is
given an arbitrary number, 1 through 5O
As Table ~ illustrates, in mode 3, each of the channels
A, B, C and D is transmitting at 2400 bits per second. In mode
~, channel D is dropped as indicated by the "0" in the mode code
channel under column "D"~ Channels B and C transmit at 2400 bits
per second, while channel A ~ erates at 4800 bits per second when
o~7erc~
channels A and B are opcratove, one of two modes 4 or 2 may be
¦selected. In mode 4, the channels A, B are selected to operate
at 7200 bits per second and 2400 bits per second, while in mode
2 they operate at 4800 bits per second and 4800 bits per second~
respectively~ Finally, in mode l, the mode selection code
indicates that only channel A is to be operative and that channel~
A operates at 9630 bits per second~ ~
Thus, according to the preferred embodiment as illus-
traeed by Table I, the channels are given a priority descending
from A to D. The lowest priority channel which is operating dic-
tates the modeO For example, mode 3 is determined sola}y by
whether channe; D is operating and is not dependent upon whether
channels B and C are indicated as being operative or inoperative.
Channel ~ is the most favored channel, and its rate of trans.~ission
continuously increases as other channels drop out~
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As alluded to above, the automatic port configllration
circuit of the preferred embodiment of the invention compares the
channels requested by the newly presented request code vs. the
channel active signals. ~f ports have to be added or deleted,
the proper signals are generated to force the remote ~slave)
modem to switch in the same manner a~ the local (master) modem.
Both master and slave modems are controlled to go through the
same sequence in order to arrive at the proper port configuration.
According to the preferred embodiment, the sequence is determined
according to the flow shown in Fig. 3. According to this
sequence, a modem operating in any of the modes S, 4/2 or 1 may
add the channels necessary to return directly to mode 3. However,
to move up the se~uence to any other mode, for example, from mode
1 to moae S requires that an intermediate return to mode 3 be
made before progressing to mode 5. In addition, progressing down
the sequence from a higher level mode to a lower lever mode
rPquires stepping through any intermedia~e modes~ This technique
of sequencing proves to be advantageous in facilitating the
signaling technique used to communicate mode changes to the slav~
or remote modem~
This signaling techni~ue is the use of a DCD
~data carrier detect~ drop in the slave modem to cause the port
configuration circuit at the slave to drop channels to achieve
a new mode~ According to the scheme already explained, it is
always the least significant port which determines when the slave
is to fall bac~. Because a channel ~bich has been dropped i~
no longer being used at all~ there i5 no easy way of returning
directly to a mode where that channel is again active because the
time division slot for that channel has been reassigned.
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Therefore, to reactivate a channel accord;1ng to the preerred
embodiment, the port configuration circui~ returns to mode 3
wherein all channels are active and proceeds to remove active
channels until the desired state is reached. Since channel A is
always active, the DCD drop code for that channel (denoted ADCD)
is used to signify and initializ~e a return to the highest mode,
mode three. From mode three, the normal l)CD channel dropping
sequence is used to fall back to the proper configuration.
An example of the just described sequencing technique
is illustrated in FigsO 4 and 5~ In this example, DT~ ~data
terminal ready) is used as the control code at the mastex site,
which is originally configured in mode 3 and then changes to mode
1 and then to mode 5~
I -Fig. 4 illustrates the dropping of channels from mode
¦ 3 to mode 1~ Initially~ the master modem is in the norm~l idle
l state of mode 3 wherein the DTR signals for channel A and channel
I D are logical ones according to the logic conventions o Table I.
I Similarly, the slave modem is in the idle state of mode 3, the
I DCD levels of channel ~ and channel D rep:resenting logical onesO
¦ A change to mode 1 is initiated by the master when the DTR leve1s :
for channels B, C, and D drop to 2ero at ~he same time. A
¦ delay of 200 milliseconds ~ms) ensues, during which the DCD drop
out code for channels B t C, and D is transmitted to the slave
modem. A timed delay of 100 ms is provided in the slave modem
for the slave to detect the DeD drop and start the chan~e through
mode 5 and 4 eventually reaching mode 1~ Preferably, the intcrmc-
diate modes~ such as S, 4 are passed through rapidly as indicated
by the .416 msec time in Fig. 4. Due ~o the longcr dclay at thc
master, the slave is set up in mode 1 before ~he master falls
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¦ back to mode 1. In thi5 manner, it is assured that the slave
¦ is ready for the operation of the new master configuration. In
a similar manner, any number of active ports can be dropped. When
the master falls back to mode 1, normal transmission at 9600
bits per second is resumed on the single A channel.
Fig. 5 illustrates the process of adding ports as the
sys~em goes from mode 1~ where only channel A is operative, to
mode 5, wherein channels A, B, and C are operative. Initially
the master modem is in mode 1 with the DTR signal for channel A
I being positive. Similarly, the slave modem is in mode 1 with
the DCD signal for channel A being positive. The change to mode
. 5 is initiated when the DTR signals fox channels B and C go high.
¦ ~ delay of about 200 ms is then provided during which the mastcr
transmits all marks to the slave, indicatin~ the drop of thc DCD
¦signal for channel-A. A delay of 100 ~s is then provided at the
¦slave after the drop-out detection during whLch time the slave
¦switches into mode :3 wherein all four channels are operative~
~ I Again, the slave reaches mode 3 before the master switches into ~ ¦
.' ~ imode 3 due to the arrangment of the delay timings.
Once the master is in mode 3, it detects that mode 3
¦is still improper because the D channel DTR signal is low. The
procedure of Fig. 4 is then essentially repeated to drop channel
D to return to mode 5~ The DCD drop code for channel D is
transmitted to the slave, which drops to mode 5 after a delay.
A longer delay is provided at the master so that the master
switches to mode 5 after the slave and resumes normaI transmission~
ovcr channel A at 4800 bits per second, channel B at 2400 blts
per second, and channel C at 2400 bits per second. Thus J ~ig . 5
illustrates ~he technique of returning to the mode wherein all
channel~ are active ~n order to dd ports. ~
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In the above discussion, the ust of the DTR and DCD
¦ signals has been employed because they are! typical signals
¦ recognized in transmission between modems. However other
signals could be used to provide mode codes to the master and
slave modems. For example3 the signal known as RTS (request to
send) may be used at the master t:o indicate the mode code as well
as the DTR level described above~
As already mentioned,a demand signal may indicate when
a data source actually wants to transmit data or wants a channel
at its disposal ready for transmission. An example of the
former alternative currently in use is RTS~ An example
l of the second alternative is DTR (data terminal ready)
- I Which signal is used as the demand signal
from any data source will depend largely ~pon the nature of the
source. If the source is of the kind, e.g. a tape reader, which
predominantly tranSmits in lengthy blocks o some minutes
duration alternating with similarly ~Lengthy quiescent periods,
¦ it will normally be satisfactory to use RTS as the demand signal.
i RTS is present only while a trans~ission is being effected and
the use of RTS wili allow a bandwidth reallocation to be usefully
made in the lengthy periods when tha data source is not trans-
mitting and RTS is absentO
1~ Such a procedure will normally be inappropriate when the
data source is an interactive source, such as a data processing
¦¦terminal, because an interactive source tends to switch rapidly
,bethecn transmitting and quiescent states and concomitant rapid
. j mode switching is undesirable. In this case the demand signal can
~e DTR which w~ll ba present throughout the time that the data
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source i~ engaged in interac~ive communication with the devicc,
such as a CPU (central processing unit) at the slave end of the
line. Ba~dwidth reallocation will then only occur when the data
source drops DTR because it no longer wants to be in communication
with ~he CPU.
As also alluded to above, it is known not only to
provide DCD in the presence of a data carrier from the master mode~
but to set DCD low on receipt of coded RTS~ A conventional format
for coded RTS is a train of all ones for a predetermined interval
which may be about 200 ms in the case of channels B, C and D,
although it is also possible for a specific digital code word
to be assigned to coded RTS~
The slave modem detects coded ~TS in channels B, C and
D. As described above~ this action is delayed to ensure reliable
detection (Qtherwise detection could arise falsely from a
longish train of all ones arising during normal data transmission~.
¦ Fig. 6 illustrates a simplified block diagram of a
generalized circuit providing port configuration control in a
¦ master or slave modem-according to the sequencing and coding
technique just described in connection with Figs. 3 through 5.
This circuit includes a magnitude comparator 31, two timers 33,
35 and a mode-indicating shift register 37O The magnitude com-
~parator 31 compares the lnverse of the channel active signals
B, C, and D provided by the mode-indicating shift register 37 to
the inverse of the port DTR signals tmaster) or the port DCD
¦ signals (slave). The channel active signals are supplied ky
translating the shift register output code in a decoder 36~ The
¦inputs to the magnitude comparator 31 are labeled collectively X
and Y~ respect~yely.
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The relation of X and Y indicates the nature o~ the
channel reconfiguration required. For example, if it is
necessary to go from mode 1 to mode 5, the input ABCD to X
will be 0111 whereas the inputs ABCD at Y will be 0001. In
this case, X> Y, the shift register is automatically loa~ed wlth
the mode 3 indication. The load mode 3 signal is delayed by the
timer 35 which times out an interval as di~cussed above with
respect to Fig. 4 and S. On the other hand, if X is less than Y
¦the indication is that a channel needs to he deleted. In this
case, the shift register 37 is merely stepped to the next mode
¦code, after a suitable delay provided by the timer 33. If after
lone step, the comparison X< Y is still true, the shift register
1 37 will be again stepped to attain the next mode. When .~ finally
¦equals Y, an idle state exists wherein the mode requested is
¦equal to the active channel con}iguration (channel ~ctive mode?a
Of course7 it will ~e appreciated that in this discussion, the
~importance of the comparison function is t~ determine whether
~channels need to be added or deleted. Various logical schemes and~
¦conventions may be derived to provide this indication from the
Ipertinent channel codes without departing from the scope of the
¦ inventionO ~
¦ Fig. 7 illustrates in detaiI a circuit according to the
preferred embodiment of the invention whlch may operate as
either the master or slave reconfiguration control~ The master/
slave selection is made by a control strap which controls multi-
plexers, as will be discussed belowO
In the master mode, the control signals, for example the
DTR signals ~rom four ports 16; are presented to a four b~ latch
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39. The contents of this latch 39 are transmitted by a multi-
plexer 41 to least significant port control logic 43 and then to
a comparator 45. Tha comparator compares the channel active
signals at input X to the ouptut of the least significant port
control logic 43 and provides output control signals to a shift
timer 47 or a load timer q9. The shift timer and load timer 49
are connected through a multiplexer 51 to control a mode-
indicating shift register 53. The equ~valent X - Y or idle output
of the comparator 45 is fed back to latch control logic SS which
controls operation of the latch 39.
A control strap 57 selects between the master and slave
modes of operation of the circuit. In th~! master mode of opera~ ¦
tion, the multiplexer 41 is caused toltransfer the output of tha
four-bit latch 39 to the least signi~icant: port control logic 43.
In the slave mode, the multiplexer 41 gat~s the DCD signals from
a bus to the least significant port control logic 43. The
control strap also causes the multiplexer 51 to gate the 200 ms
output of the shift timer 47 and the 200 ms output of the load
timer 49 to the mode shift register 53 in the master mode. In
the slave mode~ the 100 ms outputs o~ the load and shift t~mers are
selected by the multiplexer Sl. The multiplexers function as
gating switches and are well-known in the art.
In the master mode~ the latch 39 is normally sampled at
ja high rate. However, when a change in condition is detected such
that the idle output o~ the comparator ~5 no longer indicates that
X = Y, the latch control logic 55 causes the latch 39 to hold or
latch the new re~quested mode indication.
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¦ The latch control logic 55 includes an AND gat:e 59, a
¦ NAND gate 61 and a delay, flip-flop 63. ~he AND gate 5'J receives .
¦ an input indicating X ~ Y and an input indicating the ma~ter modc
¦ has been selected. Assuming these condit~ons are satisfied the
¦ output of the AND gate 59 is high as is the output of the normally
¦ reset delay flip-flop 63. In th:is event, the NAND gate 61
¦ produces a low output which indicates the latch condition and
¦ disables the sample clock via an AND gate 65. As may be noted,
when X ~ Y or the master mode is not selected, the output of the
I NAND gate 61 will be high indicating the sample mode for the
¦ latch 39.
¦ The delay flip-flop 63 is provicled to assume proper
operation when mode three is selectedO In this event, ADTR will
¦ change (go low as here discussed) to signal the slave modem.
¦ To prevent the comparator from erroneously detecting inequality
t and latching the lQw ADTR signal, the delay flip-flop responds
to a load command to inhibit latching until ADTR resumes its
original ~high~ state. As shown in ~ig. ~, this operation is
accomplished by clocking the delay flip-flop at the baud rate
¦ supplying its D input with the load-command and its reset lnput~ ~
¦ with the ADTR signal~ ¦
The latch 39 thus functions to prevent any interrupts;
or change in inputs until the port-configuring circuit has
¦completely processed previous changes. In this manner, control
signals may be generated and sent to the slave and completed
before new ~nterrupts for new port allocation reqeus~s are honored.
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¦ The code selected by the multiplexcr 41 15 then tran~-
¦ mitted to the least significant port control logic 43 wherein the
¦ least significant channel is given priority. The least signifi-
¦ cant channel present will force the more significant channel
¦ information to the active state, essentially fillinq in thc
¦ ~don't care" states in Table I. Channel A information is not
¦ affected by this circuit. The operation and structure of the
¦ least significant loigc gating is represented by the following
¦Table II. .
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¦ TABLE II
INPUT (RTS/DCD)* OU~PUT (TO MAG COMP)*
A B C D A B C D
A X X 0 ~ ;A 0 0 0
A X 0 l A 0 0 l
, A O 1 1 A O
A 1 1 1 A 1 1 1 .
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I *NOTE: NEGATIVE LOGIC . ~
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As mentioned earlier, the magnitude comparator, which~
may be a s~tandard digital comparator provides X > Y, X < Y and
X = Y outputs~ These indicate respectively that a channel mode
~jrequested ls that which is currently configured. The idle or
- ~IX = Y output of the comparator 45 is returned to control the latch : :
. Icontrol logic 55. The condition X ~ Y initiates the latch opera- .
tion. The X ~ Y output goes to the shift timer 47, which provides
a shift command to the mode shift register 53 after a time dura-
: ¦tion s~lect~d by the mul~iplexer 51 as expl~ined above~ ~h~
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¦ X ~ Y load indication triggers a load timer 49 which causes the
¦ mode 3 code to be loaded ~nto the shift register 53 aftcr the
¦ period of time selected by the multiplexer 51. The shift tlmer
¦ and load timer may both be conventional counter circuits.
Upon receiving a shift command from the shift timer 47~
the shift register rapidly shifts through ~ output states until
equality is detected by the comparator 45. This function is
represented logically in Fig. 7 by an AND gate 50, which in
response to the shift signal from the timing apparatus 47 gates
a clock to the shift register until the IDLE output is produced
by the comparator 45. If, upon loading mode 3, equality does not
result, the X < Y output of the comparator 45 is activated,
¦ instituting the shift sequence just described.
¦ When not in the shift or load states, the mode shift
l regist er 53 simply holds the mode indication at its outputs. The
! mode indication may be applied to a suitable strap to select
! either mode 2 or mode 4.
l Thus, in overall operation in the master mode~ when a
¦ new channel configuration is requested, the comparator ~S output ~ ;
either a shift or a load co~mand. These commands are suitab~y~
delayed by the timers 47, 49. During thi~ dalay, signals are
sent across the channel to the slave mode~. In particular~ -
channel drops are detected from the output of the four bit latch
39 and the appropriate drop code sent. Apparatus for sending the
drop code is fecl wlth the latch output Vi2~ lines 40, and ~s wcll-
~nown in the art. When it ls necessary to load mode 3, thc cod
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sent to the slave modem is sent upon detection of the load indi-
cation from the comparator 45 on liné 42. At the end of the
timing cycle as determined by the timers i7, 49 ~he proper shift
or load command is sent to the shift register 53. The n~de of
the shift register is then returned to the comparator 45 to
determine whether another change in the shift register content~ i~
required or whether an equal condition has now been achieved.
In the slave configuration, the latch 39 is switched
out by the multiplexer 410 The basic circuit operation is still
the same with the exception th~t the DCD signals are presented to
the least significant bit logic and the comparator 45. The timer
multiplexer 51 selectes a shorter duration and a DCD command must
be present for the duration of the timing cycle in order for the
circuit to react.
According to the invention, other methods may be used
to synchronize the port configuration switching at physically
separated modem sites. One such method is ~o provide an FSK
(frequency shift keyed) secondary channel or a totally indepen-
dent data path for transmitting the synchronizing information.
Such a channel path can be provided internally to the data set
~o by external equipment.
In another method the modem user can synchronize two
systems by requiring port configuration simultaneously at pre-
viously determined times. For example, at the end of the day the
apparatus cooperating with each physically separate modem such
as a computcr or data terminal (DTE), may~assign a particular
¦channel for a specific transfer of data. Since the modom-
controlling apparatus at ea d site has a master clock,
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synchronization in accordance with these master clocks is a
simple matter. Because of the synchronized mastex clocks at
each modem site, there is no need for signalling between the two
data sets. The data sets a~e each strapped to follow the request
presented at the data terminal equipment (DTE) interface. Since
each modem is under master control, this shychronizing technique
is called master/master. By o~erating in the master/master mode,
S~ ~ore
a user can effect direct ooftwa-r~ control of the port configura-
tion by supplying his own synchronization codes.
As is apparent from the above discussion, many modifi-
cations and alterations may be made in the above described
prefe~red embodiment without departing from the scope and spirit
of the invention. Therefore it is to be understood that, within
the scope of the appended claims, ~he inven~ion may be practiced
oth-r th n as specific-11y d-scribed her-in.
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