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Patent 1148656 Summary

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(12) Patent: (11) CA 1148656
(21) Application Number: 353068
(54) English Title: OPTICAL CHARACTER READING SYSTEM
(54) French Title: LECTEUR OPTIQUE DE CARACTERES
Status: Expired
Bibliographic Data
(52) Canadian Patent Classification (CPC):
  • 354/59
  • 352/32.1
(51) International Patent Classification (IPC):
  • G06K 9/00 (2006.01)
(72) Inventors :
  • OHOKA, AKIHIRO (Japan)
  • ISSHIKI, ISAO (Japan)
  • SAKAMOTO, FUKUMA (Japan)
  • TANAKA, MASATOSHI (Japan)
  • SATO, KOJI (Japan)
(73) Owners :
  • SUMITOMO ELECTRIC INDUSTRIES, LTD. (Japan)
(71) Applicants :
(74) Agent: GEORGE H. RICHES AND ASSOCIATES
(74) Associate agent:
(45) Issued: 1983-06-21
(22) Filed Date: 1980-05-30
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract






ABSTRACT OF THE DISCLOSURE
An optical character reading system in which each
character pattern is electronically scanned several times while
a manually held scanner is moved over the character pattern.
The recognition results from each. scan are subjected to a selec-
tion process and a final signal recognition result is generated
in which noise and inaccurate recognition results have been
substantially eliminated, Data from a character scanner is
classified into several different data types from which partial
characteristics are determined, Signals representing the partial
characteristics operate a memory circuit which produces the
final recognition signal.


Claims

Note: Claims are shown in the official language in which they were submitted.


The embodiments of the invention in which an exclusive
property or privilege is claimed are defined as follows:


1. An optical character reading system comprising:
means for optically scanning a two-dimensional character pattern
by a single sensor in a single sweep of said sensor past said
character pattern for optically recognizing said character
pattern at a plurality of different relative positions between
said single sensor and said character pattern to provide a
plurality of recognition results; and means for subjecting said
plurality of recognition results to selection to provide a
final single recognition result of said character pattern.


2, The optical character reading system of claim 1 wherein
said means for subjecting said plurality of recognition results
to selection comprises means for providing said final single
recognition result as the character most frequently recognized
along a predetermined number of character output signals.


3. The optical character reading system of claim 1 wherein
said means for subjecting said plurality of recognition results
to selection comprises means for providing said final single
recognition result in response to the recognition of a character
more than a predetermined number of times.


4. An optical character reading system in which a character
pattern is scanned by a sensor composed of photoelectric elements
to recognize said character pattern comprising:
scanner means for scanning said character pattern
a plurality of times in a single sweep of said scanner past said
character pattern, said scanner means including an optical system,
a single sensor and a control and binary-coding circuit;

12

Claim 4 continued ....


a line characteristics extracting circuit coupled
to an output of said binary-coding circuit;
a partial characteristics extracting circuit coupled
to an output of said line characteristics extracting circuit;
a recognition process circuit having an input coupled
to an output of said partial characteristics extracting circuit;
a recognition results detecting circuit having an
input coupled to an output of said recognition process circuit,
a final single recognition result, upon each character being
optically recognized a plurality of times at different relative
positions of said sensor and character pattern in a single
recognition operation, being produced at an output of said
recognition results detecting circuit; and
a character area detecting circuit having an input
coupled to said output of said control and binary-coding circuit,
outputs of said character area detecting circuit being used
to control operations of said line characteristics extracting
circuit and said recognition results detecting circuit.


5. The optical character reading system of claim 4
wherein said line characteristics extracting circuit comprises
a read-only memory.


6. The optical character reading system of claim 5
wherein said partial characteristics extracting circuit comprises
a read-only memory having first address inputs coupled to out-
puts of said line eharaeteristies extracting circuit and a
register having inputs coupled to outputs of said read-only

memory, outputs of said register being coupled to second address
inputs of said read-only memory of said partial characteristics
extracting circuit.

13


7. The optical character reading system of claim 6
wherein said recognition process circuit comprises a read-only
memory having first address inputs coupled to outputs of said
register of said partial characteristics extracting circuit and a
register, said register having inputs coupled to outputs of said
read-only memory of said recognition process circuit and having
outputs coupled to second address inputs of said read-only memory
of said recognition process circuit.


8. The optical character reading system of claim 7
wherein said recognition results detecting circuit comprises a
microprocessor.


9. An optical character reading system of any of claims
4, 5 or 6 wherein said character area detector comprises a plur-
ality of OR gates having one input of each gate couple to receive
a single line output signal from said control and binary-coding
circuit, a register, and a read-only memory, each input of said
register being coupled to a corresponding output of one of said
OR gates and outputs of said register being coupled to address
inputs of said read-only memory and to corresponding second in-
puts of each of said corresponding OR gates.


10. An optical character reading system of any of claims
7 or 8 wherein said character area detector comprises a plurality
of OR gates having one input of each gate couple to receive a
single line output signal from said control and binary-coding
circuit, a register, and a read-only memory, each input of said
register being coupled to a corresponding output of one of said

OR gates and outputs of said register being coupled to address
inputs of said read-only memory and to corresponding second in-
puts of each of said corresponding OR gates.


14


11. A method for optically reading a two-dimensional
character pattern wherein a single sensor optically scans said
character pattern in a single sweep of said sensor past said
character pattern for optically recognizing said character
pattern at a plurality of different relative positions between
said single sensor and said character pattern to provide a
plurality of recognition results; and said plurality of recognition
results is subjected to selection to provide a final single
recognition result of said character pattern.


12. A method as claimed in claim 11 wherein said final
single recognition result is provided as the character most
frequently recognized along a predetermined number of character
output signals.


13. A method as claimed in claim 11 wherein said final
single recognition result is provided in response to the recog-
nition of a character more than a predetermined number of times.



Description

Note: Descriptions are shown in the official language in which they were submitted.


i5~ii

BACI~GROUND OF THE INVENTION
The present invention r~lates to character reading
systems. More particularly, the invention relates to an optical
character reading system in which characters on a sheet are
manually scanned and the characters thus scanned are optically
read.
In the conventional character and symbol readin~ device,
hereinafter re~erred to merely as "an OCR"~ in Wh.ich characters,
sym~ols or the like, hereinafter referred to simply as character
1~ patterns, are read hy manually moving a scanner or o~servation
system and character areas in both vertical and horiæontal di-
rections are detected. When a character reaches a predetermined
position on the scanner, the character is recognized and an
appropriate recognition output signal is generated~
However, it should ~e noted that, in the a~ove-descri~-
ed device, there is usually only one predetermined position at
which the character can be recognized, Therefore, if t~ere is
a great deal of noise at that position, it is likely that the
character cannot be accurately read~
SUMMARY OF THE INVENTION
:~ Accordingly, an o~ject of the invention is to eliminate
d, f~f,'C~ It`, ~
the above-described ~ . In an optical character reading
system according to the invention, a character is recognized at
a plurality of different positions and a collective determination
of the character is made. As a result, the effect of noise is
minimized and the performance of the system is considerably
improved~
BRIEF DESCRIPTION OP THE DRA~INGS
- ---- . . . . . _
Fig. :L is an explanatory diagram sho~ing a character
30 scanned by a scanner,

--1--

5 6


Fig, 2 is a diagram showing the image of a character
formed on a sensor.
Fig, 3 is an explanatory diagram s~owing a fragmented
character scanned by the scanner.
Fig. 4 i5 an explanatory diagram illustrating the image
of a thin character formed on the sensor,
Fig, 5a - 5c are explanatory diagrams for a description
of the variations of a frame formed on the sensor~
Fig. 6 is an explanatory diagram, partly as a block
diagram, showing a preferred embodiment of the invention.
Fig~ 7a - 7c show examples of a characteristic class
icication t
- Fig. 8 is an explanatory diagram for a description
of the operation of a recognition process circuit in Fig. 6.
Fig. 9 is a block diagram showing the arrangement of
the recognition process circuit.
Fig, lQ is a detailed schematic diagram of the circuit
shown in Fig. 6.
Fig. ll is a flow chart descrihing the operation of the
microprocessor used in the circuit shown in Fig. lQ,
Fig. 12 is a flow chart describing the operation of
the circuits shown in Fig. 6.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
.--_------ . . . .
Referring first to Figs. l and 2, for the case where
the character "2" t for instance, is scanned with a scanner 31
including an opt1cal system and a sensor composed of photoelectY
ric conversion elements, such as photodiode arrays arranged
either two-dimer~sionally in an Cm x n~ matrix or in a plane as
shown in Fig. l,, a character image as shown in Fig. 2 Cherein-
after referred t:o as "a frame" when applicable~ is scanned by



1 the sensor and the various parts thereof are ~inary-coded as
"white" or ''~lackZ~ areas, In general, when the sensor is moved
through predetermined positions~ such as when all o~ the colurnn
sl from Ll to L are white and a part of the column B2 i5 black
as shown in Fig, 2, the character within the scanning ~rame is
recogni~ed only once to provide a single recognition out~ut.
As the resolution of t~,_ sensor is limited ~y the num-
~er of photoelectric conversion elements in the sensor, the max-
imum resolution o~taina~le is of the order of the width of a
stroke forming a character, There~ore~ if for example, a part

of the character "2" is very thin as shown in Fig, 3, the effect
is the image shown in Fig~ 4 for which the white/~lack determin-
ation threshold value is only hal~ that of a properly ~ormed
character, If the stroke of character 32 corresponds to two
- columns or two lines of the sensor, ~oth columns or lines of the
sensor may ~e determined as "white", If the segment 32 is deter
mined as 'white", then it is determined that a part of the char-
acter is the void and therefore the character cannot be correctly
recognized, The invention as will ~e descri~ed, eliminates the
a~ove-~escribed difficulty and minimizes the effects of noise~
In Fig, 3, when the character is read by manually mov~
ing the scanner 31, the scanning speed of the sensor is much
~igher than the moving speed of the scanner 31~ Therefore~ there
is su~ficient time available for the scanning to ~e repeatedly
carrled out while the scanner 31 passes over a single character,
Figs~ 5a - 5c show three different parts of a scanned
frame~ In accordance with the present invention, a plurality of
predetermined positions are provided and each character is recog-
nized~ for instance~ at positions shown in each of Figs~ 5a 5c.
This permits the character to be determined collectively and a

~ L ~
corresponding determination result to be generated. Therefore,
even if the character cannot ~e recognized at the position shown
in Fig. 5~, which is suhstantially the same as that of Fig. 4,
it can ~e recognized at the positions shown in Figs. 5a and 5c~
Thus~ the performance of the dev,ice i5 considerably improved~

Fig. 6 is an explanatory diagram, partly as a block
p~ t~ p~;CQ/
,~ diagram, showing an apparatus for ~r~ e~dthe ~y~i~ char
acter readin~ system according to the invention. The operations
of the circuits shown in Fig. 6 are descri~ed in the flow chart
of Fig. 12. In the apparatus shown in Fig. 6, characters are
recognized by manually moving a scanner 1 horizontally over a
sheet 3 on which the characters ~ave been printed, The sheet
3 is irradiated by lamps 4 so that the image of a character pat-
tern on the sheet 3 is formed on a sensor 6 composed of photo-
electric conversion elements arranged two-dimensionally or on a
plane by means of a lens system 5, Light reflected from the
background of the sheet 3 is different in intensity from light
reflected from tne character règions. Therefore, the output
signals of the photoelectric conversion elements which receive
the dif~erent light levels are su~jected to level decisions.
That is, digital outputs are generated which correspond to "white"
and "black" by a control and binary-coding circuit 7. For in-
stance, a signal corresponding to the background of the sheet 3
or "white" is represented as a logical "O" level and the signal
corresponding to a character region or "~lack" is represented as
a logical "l" level. The construction and operation of the lens
; system 5, sensor 6 and control and binary coding circuit 7 are
generally well-kno~n in the art~
Hereinafter, the photoelectric conversion elements of
the sensor 6 will be referred to as "cells" in the following




~4-


1 description. For this description~ it is assumed that t~e image
of the character pattern on the sheet 3 is as shown in Fig, 2
and that, accordingl~r, Fig. 2 shows the relationship between the
cells of the sensor 6 and the ~inary-coded signals generated by
the control and ~inary-coding circuit 7. Hereinafter~ a single
pattern formed by ~n x m~ cells will ~e referred to as "a frame".
The control and ~inary-coding circuit 7 produces sig-
nals corresponding to each of the columns Bl~ B2~ and B in
the uppermost line Ll in the stated order following which it
produces signals corresponding to the columns Bl through Bn in
the second line L2, signals corresponding to the columns Bl
through Bn in the third line L3 and so forth up to signals corres-
ponding to the columns Bl through Bn in the lowermost line Lm
thus accomplishing the scanning of one frame,
In accordance with the invention~ a character area de-
tecting circuit 12 operates to detect the presence of a character
area in the frame ~eing scanned, that is~ the circuit 12 operates
to detect whether a character is ~ithin a frame or not. If a
character is detected ~ithin a frame, then the circuit 12 operates
2~ upon the cells corresponding to the left and right ends of the
character and in response produces a signal BCT~ Also~ the cir-
cuit 12 detects ~hether or not the sensor 6 has scanned the next
character and r in response to this detection, produces a signal
C~, If all the cells L1 through Ln in the column Bl are "white",
then it is determined that the character scanned lies entirely
within the frame~ If one or more of the cells Ll through L in
the column Bl is "black" then it is determined that the sensor
has scanned portions of the next character, Furthermore r the
vertical direction, in Fig. 2, the character area running from
the line Lj, of the character is de~ected~




-5-

A technique for detecting the character area in hori-
~ontal and vertical directions is used with the invention in
which a determination is made as continuous ~lack Gells are pre-
sent in hori20ntal and vertical direction. A line characteristic
extracting circuit 8 operates to extract the characteristics of
w~ite/~lack data in one line in a character area and to classify
this data into a plurality o~ data t~pes. Tahle 1 shows an
example of this type of classificcltionc In t~e .frame shown in

Fig. 2, the character area falls within the area from the line
Lj to the line Lj+N in the vertical direction and from the col-


umn Bl to the column Bi in the horizontal dîrection~ T~us~ todetect t~e c~aracter, the characteristics of the columns ~1
through Bi in the line Lj are extracted and classified after which
the same operation is performed on t~e columns Bl through Bi in
the line Lj+1. Furthermore, t~e characteristics of the area up
to the line Lj*N are extracted and classified~
Fig. 7~ shows an example of a case where the character-
istic5 of the lines in the fr.ame in Fig~ 2 are extracted and

classified according to Tahle 1. A partial characteristics ex-
tracting circuit 9 operates to com~ine for a plurality of lines

the characteristic classification signals Ai which are provided
respectively for each line ~y the line characteristic extracting
circuit 8 and to classify the characteristics which are newly
provided ~y the com~ination into a plurality of different types
hereinafter referred to as 'partial characteristics Ci". This
operation i`s used to carry out data compression in order to simp-
lify the following recognition process ~ut is not always necess-
ary,

In the descri~ed em~odiment of the invention, the class-

ification process is carried out on the characteristics classifi-


cation signals Ai. for lines adjacent to each line to provide thepartial characteristics signal Ci.



-6-


1 TAsLE
.

Classifi- Diagram Description
cation
_ . .
C0 No segment

Cl Vertical segment in the left
~ part of a character

C2 ~ Vertical segment in the cen-
tral part of the character
. . . ....... ..
C3 ~ Vertical segment in the right
_ part of the character
.
4 ~ Two vertical segments
. . . .
C5 A part of a horizontal seg-
) ment in the left part of the
character
. . . . , . , . ~ .
C6 A part of a horizontal seg-
~æz~ ment in the rig~t part of the
character
. . .. . _ ,
~ 1 Horizontal segment



For carrying out the characteristics classification
for every other line, the characteristic signal Ai of one of the

two lines is selected, depending on the characteristics of the
upper and lower lines, to provide its partial characteristic sig-
nal Ci. By way of example, the partial characteristic signals
Ci shown in Fig, 7c are extracted from the line characteristic
signals Ai in Fig. 7b.
A recognition process circuit 10, as shown in Fig. 9,
includes a read-only memory 21 and a memory unit 22. The partial
characteristic signal Ci is inputted -to the circuit la by a timing
signal CK and the content of an address defined by the partial

characteristic signal Ci and the corresponding con-tent of the
memor~ unit 2~ is read out of the read~only memory 21 and is then
'


1 stored in the memory unit 22. The content of the memory unit 22
provided ~en all of the partial characteristic signals Ci have
~een inputted, corresponds to the recognition result which is
outputted as a recognition result Di~
Fig. 8 is an explanator~ diagram provided for the recog~
nition process circuit 10~ In Fi~ 8, reference c~aracter Do
designates the initial condition ~hile reference characters D31
through D36 designate the recognition rQsults of the numerals "1"
through "6", respectively. ~en the partial characteristic
~ signals C7, C3, C3, C7, Cl, Cl and C7 are extracted in the stated
order as shown in Fig. 7c, the corresponding conditions are pro~
ceeded through as Dor D5- ~8~ D8r D12' Dl~ 12 32
stated order in Fig, 8, Since the last condition D32 correponds
to the numeral"2", the numeral "2" is outputted as the recogni-
tion result, This signal is applied to a recognition result
selected circuit 11,
Similarly, the recognition process is carried out in
the same manner in the next frame scanning operation and the re-
sult Di is applied to the recognition result selecting circuit
11, For instance, in the case ~Yhere the frames sho~n in Figs.

5a - 5c are scanned one after another, the respective recognition
result signals are applied to the recognition result selecting
circuit 11.
Upon reception of a character scan completion signal
CH, the recognition result selecting circuit 10 su~jects a p1ur-
ality of results Di inputted hy the recognition process circuit
10 to a selection process and outputs a signal "Dout" as the
inal single character recognition result,
In one example o an appropriate selection process, a
character which i5 most frequentl~ recognized among a plurality

5~
of characters is outputted as the signal "Dout". In another
example of the selection process, a character which has ~een
recognized more than a predetermined number of times is outputted
as the signal "Dout" a For instancer even if, recognition results
Di f the frames shown in Figs. Sa - 5c are inputted and a recog-
nition result Di which cannot be recognized as the numeral "2"
as in Fig. 5h is included therein, the character can nonetheless
~e recognized as the numeral "2" from the recognition results Di

of the frames in Figs~ 5a and 5c, Thus, t~e optical character
reading system according to the invention is very ~igh in its

reading performance.
The circuits 8 - 10 shown in Fig, 6 each haYe a similar
circuit construction. More specifically~ as shown in Fig. 10,
the recognition process circuit lQ includes a read~only memory
21 and a memory circuit 22 which may ~e a simple register or
latch. For the read-only memory, an Intel Company type ~-2716
integrated circuit or a Texas Instruments Company type 2516 or
2532 integrated circuit may ~e employed. A Texas Instruments
Company type 74Ls 273 integrated circuit may ~e used for the
memory circuit.
The binary output train of the ~inary recording circuit
7, ~hich represents the data of each line Lj to Lj+Nj is applied
to the line characteristics extracting circuit 8 as the address
of the read-only memory, The content of the read-only memory at
the designated address is read out as the output signal Ai which
is t~en applied as a part of the address to read~only memory 24
of par-tial characteristics extracting circuit 9, The contents
read out from read-only memory 24 are transferred to a register
25. The outputs of register 25 form the signal Ci, The outputs
of register 25 are also fed ~ack to address inputs of the read~



only memory 24 ~hich together with the signal Ai from the read-
only memory 8, form the composite address to read-only memory
24. In this fas~ion, t~e composite address to the read-only
memory 24 is made up of th~ Ai data representing the current line
of the character as it is processed ~hile t~e Ci data is repre-
sentative of the previously-processed line of the same character.
This permits the recognition process to ~e carried out utilizing
t~e data from every other line as descrihed ahove. The output
signal Ci from register 25 is applied as a portion of the address
input to read-o~ly memory 21 of the recognition process circuit
10. Similar to the partial characteristics extracting circuit ~,
t~e recognition process Circuit lQ includes the read-onl~ memory
21 and a register 22 which receives the outputs of read-only mem-
ory 21. The operation of the recognition process circuit 10 is
otherwise similar to that of the partial characteristics extract~
ing circuit 9,
The recognition results detecting circuit 11 is pre-
ferably constituted by a microprocessor, for e~ample, an Intel

Company Type 8748, As described previously, th~ scanning opera-
tion is carried out repeatedly while the scanner 31 passes over

a single character, The plural recognition results Di for a
single character are outputted from the recognition process cir-
cui~ 10 to inputs of the recognition results detecting circuit
~ herein the plural res-llts Di are su~jected to a selection
process, also as described above, to thereby obtain a final out-
put signal DoUt as the final character recognition results. A
flow chart descri~ing the operation of t~e microprocessor which
constitutes the recognition results detecting circuit 11 is shown

in Fig. 11, The flow chart may ~e implemented ~y any one of a

num~er of well-~nown and widely avaible software techniques de-



pending upon the particular microprocessor chosen~
The character area detector 12 operates to detect
whether "black" exists in the cells Ll through Lm in the first
column Bl, A ~imilar operation is successively carried out ~or
the remaining columns B2 throug~ Bn. The character area detector
12 is constituted ~ plural OR gates 26, a register 27 and a
read-only me~ory 28~ In the circuit~ the outputs of the control
and ~inary-coding circuit 7 and the register 27 are su~jected to
a logical summati~n process for eac~ of the lines Ll through Ln,
After the sum is formed and re-clockea into the register 27, the
output of the register 27 is coupled to the adaress inputs of the
read-only memory 28 to there~y read out the corresponding contents
stored therein.




.




~ 30

--1 1

Representative Drawing

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Administrative Status

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Administrative Status

Title Date
Forecasted Issue Date 1983-06-21
(22) Filed 1980-05-30
(45) Issued 1983-06-21
Expired 2000-06-21

Abandonment History

There is no abandonment history.

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Application Fee $0.00 1980-05-30
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
SUMITOMO ELECTRIC INDUSTRIES, LTD.
Past Owners on Record
None
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Drawings 1994-01-25 6 201
Claims 1994-01-25 4 161
Abstract 1994-01-25 1 20
Cover Page 1994-01-25 1 17
Description 1994-01-25 11 483