Note: Descriptions are shown in the official language in which they were submitted.
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This invention relates generally to line circuits for
use in telephone systems and more particularly to a circuit and method
for time-sharing a DTMF receiver between a pair of signall;ng sources.
The use of multifrequency (MF) or dual-tone
multifrequency (DTMF) signalling in telephone systems is very well
known. Such signals are employed, for example, as station calling
signals by subscribers equipped with pushbutton telephone subsets. The
coded signal comprises selected combinations of coincident two-tone
bursks, and each combination comprises one tone from a relatively
high-frequency band and one from a relatively low-frequency band. An
illustrative system employing multifrequency coded signals is fully
described in the January 1960 issue of the Bell System Technical
Journal, 39 BSTJ 235.
In a telephone system employing such signalling, the
central office equipment or private business exchange (PBX) core
equipment includes a receiver which converts each tone pair into DC or
digital signals. Appropriate combinations of these signals are used
conventionally to initiate the operation of the common equipment at the
central office, PBX, or electronic key system. Such a system is
described in an article entitled "Vantage 48: a key system with PB~
features", Telesis 1983, one, at 18.
In telephone systems adapted to operate with pushbutton
telephone sets, a pool of DTMF receivers are available for use by the
subscribers. ~hen a subscriber requests service such as by going
off-hook, a receiver is attached to his line for reception of the
tones. On completion of the signalling, the receiver is disconnected
from the line and is returned to the poolO Of course, DTMF receivers
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are pooled because they tend to be costly and the provision of a
one-to-one ratio of receivers to subscriber sets would be prohibitively
expensive. On the other hand, the pooling of receivers sometimes
contributes to blocking within the system; this occurs when the number
of subscribers wishing to use their signalling system exceeds the number
of receivers available.
The invention alleviates these difficulties by
providing a circuit and a method for the time-sharing of a DTMF
receiver by a pair of subscriber sets whereby the signalling originated
by both subscribers is effectively monitored continuously~
In accordance with the invention, a circuit for the
time-sharing of a DTMF receiver comprises a control circuit which
includes means for generating timing signals. A DTMF receiver has an
input terminal for receiving analog signals and an output terminal for
providing output signals representative of the identity of the input
signals. First and second terminals are adapted for connection to
respective sources of DTMF signals. A pair of transmission gates are
responsiYe to switching signals from the timing generator for
alternately connecting the first and second terminals to the input
terminal of the DTMF receiver whereby the signalling appearing on the
first and the second terminals is effectively monitored continuously.
The invention is embodied in a line circuit having a
pair of DTMF receivers each adapted to receive DTMF signalling tones
from a respective pair of subscriber lines. The line circuit
comprises a microprocessor control circuit for switching a pair of
multiplexer circuits and thus control access of the receivers to the
subscriber lines in accordance with a preset procedure controlled by
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the microprocessor. Each receiver is switched between a respective pair
of subscriber lines at a predetermined rate until an incoming tone is
detected on at least one of the subscriber lines. In that instance,
DTMF detection of the incoming tone on the connected subscriber lines is
completed before the switching of the receivers to the other pair of
subscriber lines is resumed. In effect, the scanning of the subscriber
lines is frozen when a DTMF tone is detected on one of them and is
resumed when the tone detection is complete.
By having to provide only one DTMF receiver per pair of
subscriber lines whereby each line is effectively monitored continuously,
it becomes economically possible to provide non-blocking service to
every subscriber.
An example embodiment of the invention will now be
described in conjunction with the drawings in which:
Figure 1 is a block schematic diagram of a circuit in
accordance with the invention;
Figure 2 is a timing diagram illustrating the waveforms
at various locations in figure 1; and
Figures 3a, 3b and 3c form a composite flow chart
depicting the microprocessor instructions necessary to control the
circuit of figure 1.
Figure 1 illustrates a portion of a line circuit
embodying the invention. A processor 10 is shown connected to a buffer
circuit 11 and a pair of DTMF receivers 12 and 13 via a data bus 14.
The receivers 12 and 13 are connected to four voice frequency circuits
1~ to 18 through a pair of multiplexer circuits 19 and 20 which are
controlled by a signal MC from the processor 10 and by its complementary
signal MC generated at the output of an inverter gate 21.
The voice frequency interface circuits 15 to 18 are
adapted to be connected to respective subscriber loops. Each
interface circuit comprises a line coupling transformer with the
primary connected to the tip and ring pair oF a subscriber loop. The
secondary windings are respectively connected to input terminals of the
multiplexer circuits 19 and 20 and are identified as SS1, SS25 SS3 and
SS4. The interface circuits 15 - 18 perForm the usual functions of
battery Feed to the tip and ring terminals, loop current detection,
D.C. flux cancellation in the line transformer, and ring voltage
transfer and ring trip,
The control logic hardware for the line circuit centers
around the microprocessor 10 which may conveniently be an off-the-shelf
unit such as model number 8749 which is equipped with read-only-memory
and random-access-memory capability on the same chip. The processor 10
provides a UART (universal asynchronous receiver/transmitter) function
for the four links and controls the functions of the line circuit such
as loop detection, dial pulse and hook-switch Flash decoding for four
lines, ring relay control with ~ero crossing synchronization and ring
trip detection for the four lines as well as DTMF receiver control and
decoding. The processor obtains the information necessary to the loop
detection decoding Function via leads LD1, LD2, LD3 and 3D4 from the
interface circuits which are buffered to the data bus 14 by the circuit
11 which may also conveniently be component number 74LS244.
Each of DTMF receivers 12 and 13 actually represents the
combination of a DTMF filter - for example model number 8865 - and a
DTMF detector - ~or example, model number 8860. The function of the
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filter is to separate the h;gh group and low group components of the
composite dual tone signal and limit the resulting pair of sinewave
signals to produce rectangular wave signals having the same frequencies
as the individual components of the composite DTMF input. The high
group and low group rectangular waves are applied to the detector
circuit which operates thereon to determine the frequencies of the
incoming tones and verify that they correspond to standard DTMF
frequencies. When both high group and low group signals have been
simultaneously detected, a flag EST (early-strobe signal) is generated~
Internally to the detector, the presence of the EST flag allows the
control/discriminator to identify the detected tones to the code
converter which in turn presents a four-bit binary code word
corresponding to the received tone signal to an output latch. When the
latches are set, an StD flag is generated to indicate that the data may
be read out by enabling the TOE input of the receiver. The time period
between reception of the DTMF signals and generation of the StD flag is
termed the "time to receive" and is adjustable with external components.
Increasing the time to receive tends to improve the talk off performance
of the receiver but degrades the response time of detection upon
simultaneous incoming signals on the two lines.
The multiplexer circuits 19 and 20 may conveniently be
an off-the-shelf commercial component such as the quad multiplexer
component number 14066B. Each half of the package provides a pair of
transmission gates having their output terminals connected together and
to the input terminal of a respective one of receivers 12 and 13. Each
pair of gates is adapted to pass analog signals from one or the other
of a pair of input terminals to their output terminal. Both pairs of
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gates are driven from the same signals MC and MC and respond thereto by
connecting either of SS1 and SS3 or SS2 and SS4 to their
respective DTMF receivers 12 and 13.
The operation of the circuit may be better understood by
gaining a full appreciation of the waveform i11ustrations of figure 2
and the flow chart of figures 3a, 3b and 3c. Since the pair of
receivers 12 and 13 and their associated multiplexing circuit operate
in exactly the same way, the description of the operation will be
limited to the time-sharing operation of receiver 12 between sources of
DTMF signals SS1 and ~S2.
The first two waveforms of figure 2 illustrate the tone
bursts on SS1 and SS2 input terminals; these are nominally 70 ms.
During the periods AB, BC, CE, the multiplexer circuit 19 is causing
the input of the receiver 12 to be connected alternately between the
input terminals SS1 and SS2 at a predetermined rate of 15 milliseconds
on and off. At point D, a tone i~ present on SS2 but the SS2 gate is
low (not made) and the receiver 12 does not respond.
At time F, the tone SS2 has been connected to the input
of the receiver 12 for 15 ms. and the latter responds by generating an
early strobe signal EST2 which causes the scanning process of the input
terminals to be frozen until the detection or reception of the SS2 tone
is complete. This is acknowledged to be complete when the binary data
corresponding to the tone has been received by the processor. At time
G, the tone on SS1 arrives but without consequence since the scanning
process is frozen and gate SS1 is not connected. At time H9 the receiver
generates the strobe data signal StD2 which causes the processor 10 to
generate the TOE signal to cause the binary data corresponding to the
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tone on SS2 to be transferred to the processor 10 via the data bus 14.
At time K, the switching of the gates is resumed and
this time, the tone SS1 is received by the receiver 12 at time L and
its corresponding code read between times M and 0. It may be noted
that each receiver only generates one EST signal and one StD signal.
The EST1, EST2, StD1, StD2 etc., signals are recognized by the
processor because it internally associates the receiver with the
scanning clock. For example, the flow chart at figures 3a and 3b shows
timer-1 and timer-2 each one being associated with a respective
process.
The flow charts of figures 3a and 3b illustrate
graphically the operation just described. The Sample flag shown in the
charts is used to indicate the status of the tone being received.
When the Sample flag is set, it means that the tone has not been
received by the receiver for 15 ms. When the Sample flag is reset, it
means that no more action by the circuitry is required for the tone.
The RD-Flag is used to indicate that the data associated with a
particular tone has been read. These flow charts also depict the
logical sequence associated with false detection of an analog signal by
a receiver. The erroneous analog signal causes the EST flag to be
raised but since it is not proper DTMF signalling, the receiver does
not generate the StD flag. Therefore, in the instance where the EST
flag has been raised and the StD flag has not been generated within a
predetermined period of time (in this case 35 ms.), it is assumed that
the detected tone signal was improper and the detection process is
terminated by resetting the RD-Flag, the Timer, and the Sample flag for
that process.
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The flow chart of f;gure 3c illustrates the process that
the processor follows in determining whether or not the alternate
switching between the two pairs of gates should take place. If
terminals SS1 and SS3 are being scanned and the telephone lines
associated with terminals SS2 and SS4 are inactive, that is, they are
not requesting service, then switching to those terminals will be
inhibited. The conditions under which the switching will or will not
take place is defined by the flow chart and the following definitions:
COND-1 = (SS1 or SS3 OFF HOOK) and (SS2 and SS4 ON HOOK), and COND-2 =
(SS2 or SS4 OFF HOOK) and (SS1 and SS3 ON HOOK).
As mentioned earlier, the nominal duration of a DTMF
tone burst is usually about seventy milliseconds. It is possible
under extreme conditions that the detection of a digit may be missed by
the circuitry of the invention. For this to happen, the pair of
signals being time-shared by one receiver would have to occur
simultaneously, be of a duration considerably shorter than normal, and
the tolerance of the receiver circuitry would possibly need to be at
the long end of its range. A statistical analysis indicates that the
probability of these factors combining in a single circuit is very low
and certainly no greater than the probability of non-detection of a
digit for reasons not associated with the line circuit of the
invention. As mentioned earlier, the capability of detecting shorter
bursts of tones may be enhanced by decreasing the guard time of the DTMF
receiver; however, decreasing the guard time is done at the expense of
talk off performance.
The time-sharing circuit and method of the invention
provides a line circuit which is practical and which makes it
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economical to offer non-blocking DTMF monitor;ng service to the
subscr;bers of a telephone system.
