Note: Descriptions are shown in the official language in which they were submitted.
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operabllity.
According to the present invention, there is
provided a multiple alert pager comprising: a radio
receiver for receiving a carrier wave modulated with at
least a paging signal and demodulating the carrier wave; a
decoder for comparing a demodulated carrier wave with its
own paglng number and generating an alert signal when a
coincidence between the demodulated carrier wave and its
own paging number is found; a plurality of alert means for
informing a user of the paging in response to the alert
signal; a reset switch for stopping the alert signal; and
first means provided in the decoder and being responsive
to a first operation of the reset switch to switch the
plurality of alert means.
Brief Description of the Drawings
._ . . _:
Figs. 1 and 2 are block diagrams of conventional
pagers;
Fig. 3 is a block diagram of a multiple alert
pager according to an embodiment of the present invention;
Figs. 4A to 4L, Figs. 5L to 5S, and Figs. 6L to
6S are timing charts for explaining the operation of the
multiple alert pager shown in Fig. 3;
Fig. 7 is a block diagram showing the main part
of a multiple alert pager according to another embodiment
of the present invention;
Figs. 8L to 8W show a timing chart for explaining
the operation of the multiple alert pager shown in Fig. 7;
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and
Fig. 9 is a block diagram showing the main part
of a multiple alert pager according to still another
embodiment of the present invention.
Detalled Description of the Preferred Embodiments
Prior to describing the present invention in
greater detail, examples of conventional pagers will first
be described.
Fig. 1 is a block diagram of a conventional pager
having audio and visual alert functions. A carrier wave
modulated with a paging signal is supplied from an antenna
1 to a radio receiver 2 and is demodulated. The
demodulated signal is supplied to a decoder 3 and is
compared with its own paging code stored in a paging code
memory 4. When the decoder 3 detects a coincidence
between the demodulated signal and the preset paging code,
an alert signal is supplied to a loudspeaker driver
comprising a resistor 5 and transistor 6 so as to drive a
loudspeaker 7. Otherwise, the alert signal is supplied to
a light-emitting diode driver comprising a resistor 8 and
a transistor 9 so as to drive a light-emitting diode (to
be referred to as LED hereinafter) 10. A battery 11 is a
power source for the loudspeaker 7 or the LED 10. A
switch 12 is switched to apply a voltage to an audio alert
means including the loudspeaker 7 through a contact a or a
visual alert means including the LED 10 through a contact
b. A reset switch 13 resets the pager so as to stop
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generating the alert signal. In this manner, the user
must select the audio or visual alert means by the switch
12.
Fig. 2 is a block diagram of another conventional
pager having audio and visual alert functions. In this
pager, an LED 10 constantly flashes when the user is
called or paged. When a switch 12 is set at a contact b,
a resistor 14 is series-connected between a battery 11 and
a loudspeaker 7, so that an alert tone is more decreased
than that in the case wherein the switch 12 is set at a
contact a. In this manner, the user can select one of two
alert modes: one alert mode for generating a soft audible
alert tone and -turning on the LED 10; and the other alert
mode for generating a loud audible alert tone and turning
on the LED 10.
~ s examplified above, according to the
conventional pagers for selecting alert means by the
switches 12, the switch 12 must have contacts the number
of which is the same as the number of combinations of the
alert means. In order to obtain a multiple alert pager
that satisfies all the up-to-date requirements, the switch
12 must have a large number of contacts. ~owever, the
pagers must be portable and compact. Demand has arisen
for a pager overcoming these drawbacks.
The present invention will now be described by
way of example with reference to Figs. 3 to 9.
Fig. 3 is a block diagram o~ a multiple alert
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pager according to an embodiment of the present
invention. Reference numerals 1, 2 and 4 to 14 denote
identical or equivalent parts to those in Figs. 1 and 2.
Figs. 4A to 4L show signals at points A to L in Fig. 3,
respectively. It is also assumed that Q outputs of each
flip-flop and each timer in Fig. 3 are set at a low level
in the initial state.
The paging operation by an audio alert means will
be first described. A signal received by an antenna 1 is
demodulated by a radio receiver 2. The demodulated signal
from the radio receiver 2 is compared by a comparator 101
in a decoder 300 with its own paging code stored in a
paging code memory 4. When a coincidence between the
demodulated signal and the paging code is found, the
comparator 101 generates a coincidence signal (at time tl
in Fig. 4A). The coincidence signal causes a D flip-flop
102 to be set (Fig. 4B). A Q output is supplied to an
input terminal IN of an alert signal generator 104 through
an OR gate 103, so that the input terminal IN goes high
(from low to high, as shown in Fig~ 4C). Since outputs
from D flip-flops 105 and 106 are set at low level (Figs.
4D and 4E, respectively), an output from an OR gate 107
goes low, so that an AND gate 109 is enabled through an
inverter 108 and an AND gate 110 is disabled. As a result,
a signal (Fig. 4H) which is obtained through
frequency-dividing (e.g., 1/2 frequency division) an
output (Fig. 4G) from a clock generator 111 by the use of
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a fre~uency divider 112, is supplied to a clock input
terminal CL of the alert signal generator 104 through an
OR gate 113, as shown in Fig. 4I. The frequency of an
output clock from the clock generator 111 is about 4kHz.
The alert signal generator 104 generates as the
alert signal the signal received from the clock input
terminal CL while the input terminal IN is set to be high,
and this alert signal appears at the output termi~l OUT
thereof, intermittently, for example, about 5 Hz, as shown
in fig. 4J. On the other hand, while the input terminal
IN is set to be low, the output terminal OUT is kept low.
Since outputs Q and Q from a T flip-flop 114 are set to be
low and high (Fig. 4K), respectively, an AND gate 115 is
enabled, and an AND gate 116 is disabled. The alert
signal from the alert signal generator 104 drives the
loudspeaker 7 through a resistor 5 and a transistor 6, as
shown in Fig. 4J. As a result, the user (i.e., pager
carrier) is informed of the paging.
When a reset switch 13 is turned off, on and off
while the loudspeaker 7 is driven, one end L of a pull-up
resistor 126 goes high, low and high (Fig. 4L), and a CL
input to the D flip-flop 102 goes low, high and low
through an inverter 117. Therefore, the output Q goes
low, and the alert signal is stopped (Fig. 4J).
As is apparent from the above operation, an
audible tone is produced at the loudspeaker 7. The visual
alert operation via an LED 10 which is switched from the
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audio alert operation will be described with reference to
Figs. 3 and Figs. 5L to 5S.
The reset switch 13 is turned on at time tl (Fig.
5L) and is kept ON. An output from an inverter 118 goes
high, and then an AND gate 119 is enabled. A clock signal
(Fig. 5M) from the clock generator 111 is supplied to a
clock input terminal CL of a timer 120. Since a reset
input terminal R of the timer 120 is set at low level, the
timer 120 is started and kept operated for a predetermined
period of time (i.e., 5 seconds). ~hen the prede-termined
period of time has elapsed, an output from the timer 120
goes high (time t2 in Fig. 5N), and the output Q from the
T Elip-flop 114 goes high (Fig. 5K). As a result, the AND
gates 115 and 116 are disabled and enabled, respectively,
so that the visual alert mode via the LED 10 is set. As
described earlier, when the output Q from the timer 120
goes high, the output Q from the D flip-flop 105 goes high
(Fig. SD)~ so that an AND gate 121 is enabled through the
OR gate 107 and the output from the clock generator 111 is
supplied to a clock input teminal CL of a timer 122, as
shown in Fig. 5P. In addition, through the OR gate 107,
the output Q from the flip-flop 105 enables the AND gate
110 and disables the AND gate 109. The output from the
clock generator 111 is supplied to the clock input
terminal CL of the alert signal generator 104 through the
AND gate 110 and OR gate 113.
The clock input to the alert signal generator 104
is switched from a low-frequency clock as the output from
the fre~uency divider 112 to a high-frequency clock as the
output from the clock generator 111 (Fig. 5I). At the
sa~e time, the output Q from the D flip-flop 105 is
supplied to the input terminal IN of the alert signal
generator 104 through the OR gates 107 and 103. Since the
high-frequency clock is received by the clock input
terminal CL of the alert signal generator 104, a signal
(Fig. 5J) representing a faster flashing pitch so as to
confirm the switching operation is generated from the
output terminal OUT of the alert signal generator 104. By
using this alert signal, the user can check that the alert
mode is switched and turns off-turns off the switch 13
(time t3 in Fig. 5L). In this case, the reset terminal R
of the timer 120 goes high, and the timer 120 is thus
reset. ~t the same time, the AND gate 119 is disabled to
supply no clock signals to the clock input terminal CL of
the timer 120 (Fig. 5M). When the predetermined period of
time preset by the timer 122 has elapsed, the output Q of
the timer 122 goes high (time t4 in Fig. 5S), and the D
flip-flop 105 is reset (Fig. 5D). At the same time, the
timer 122 is reset, and the output Q from the timer 122
goes low (Fig. 5S).
After the reset of the timer 122, since the
outputs Q from the D flip-flops 105 and 106 are set to be
low, the input terminal IN of the alert signal generator
104 goes low through the OR gates 107 and 103. An output
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si~nal J ~rom the alert signal generator 104 goes low,
which thereby stops generating the signal for confirming
alert mode switching. In the same manner as described
above, the AND gate 110 is disabled, and the AND gate 109
is enabled. Therefore, the clock input terminal CL of the
alert signal generator 104 receives low-frequency clocks
(Fig. 5I). When the comparator 101 generates the
coincidence signal after the alert mode is just switched
on, as described above, the alert siqnal generator 104
` 10 generates the alert signal by which the LED 10 is turned
on because the Q output K (Fig. 5K) from the T flip-flop
114 enables the AND gate 116.
When the alert mode is to be switched from the
visual alert mode via the LED 10 to the audio alert mode
via the loudspeaker 7, the switch 13 is kept ON for the
predetermined period of time as in the audio to visual
alert mode suitching operation described previously.
~ n operation for confirming the set alert mode at
any time will be described with reference to Fig. 3 and
Figs. 6L to 6S. This operation is substantially the same
as the alert mode switched on check, except for the
operation ~f the reset switch 13.
When the reset switch 13 is turned on, it is
operated in the same manner as described above. At the
same time, before the predetermined period of time T of
the timer 120 has elapsed, the high level from output from
the terminal Q of timer 120 is supplied to an AND gate 124
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through an inverter 123, and the high level output from
the terminal Q of D flip-flop 102 is supplied to the AND
gate 124, so that the AND gate 124 is enabled. Under this
condition, since the output of an inverter 125 is at high
level, the output Q from the D flip-flop 106 goes high.
Subsequently, the AND gate 121 is enabled through the OR
gate 107 and the timer 122 is started. At the same time,
the AND gate 110 is enabled, the clock input -terminal CL
of the alert signal generator 104 receives the
high-frequency clocks (Fig. 6I), and the alert signal
generator 104 is started through the OR gate 103.
Therefore, the alert function check signal (Fig. 6J)
appears at the output terminal OUT of the alert signal
generator 104. This check signal is generated for the
predetermine period of time T of the timer 122 in the same
manner as the alert mode switching check signal. In this
manner, the user can always check the current alert mode.
Fig. 7 is a block diagram of a multiple alert
pager according to another embodiment of the present
invention. The alert mode is switched in the embodiment of
Fig. 3 by turning on the reset switch 13 for the
predetermined period of time T. ~owever, in the
embodiment shown in Fig. 7, the alert mode is switched by
repeating on/off operations of a reset switch 13 exceeding
a predetermined number of times within a predetermined
period of time.
A flip-flop, a counter and a timer are reset in
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the initial state. When the reset switch 13 is turned on,
a Q output (Fig. 8U) from a D flip-flop 202 goes high
through an inverter 201. A signal from an output terminal
OUT of a clock generator 111 is supplied to a timer 204
S through an AND gate 203. The output Q from the timer 204
is kept low until a predetermined period of time T'
therein has elapsed (Fig. 8V), so that an AND gate 206 is
enabled through an inverter 205. Every time the reset
switch 13 is turned on, the count of a counter 207 is
incremented. When the reset switGh 13 is repeatedly
turned on/off a predetermined number of times, the output
Q from the counter 207 goes high (Fig. 8W). By coupling
the output Q from the counter 207 of Fig. 7 instead of the
output Q from the timer 120 of Fig. 3, alert mode
switching can be performed by repeating the on/off
operation of the reset switch 13 in the same manner as in
Fig. 3. When the predetermined period of time T' of the
timer 204 has elapsed, the output Q from the timer 204
goes high to reset the D flip-flop 202, the counter 207
and the timer 204, thereby causing the multiple alert
pager to restore the initial state~
In this embodiment, the timer 204 is started when
the reset switch 13 is turned on. However, the timer 204
may be started when the power switch (not shown) of the
pager is turned on. In this case, alert mode switching
can be performed only after the power switch is turned
on. In order to switch the alert mode, the power switch
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must be turned off, resulting in inconvenience. However,
when the predetermined period of time of the timer 204 has
elapsed, erroneous alert mode switching due to an
erroneous operation will not occur.
In the above two embodiments, the alert mode is
switched to one of the audio and visual alert modes.
However, when the AND gate 116 is omitted, i.e., the
resistor B is directly coupled to the output of the alert
signal generator 104, the audio and visual alert modes can
be simultaneously set, or only the visual alert mode can
be set.
When a circuit shown in Fig. 9 is used in place
of the T flip-flop 114 and the AND gates 115 and 116 of
Fig. 3, the audio and visual alert mode, the audio alert
mode or the visual alert mode can be selected.
~ he operation of the circuit shown in Fig. 9 will
be described. When the rese-t switch 13 is turned on, and
a predetermined period time of a timer 120 has elapsed, an
output Q from the timer 120 goes high. A binary counter
(modulo 4) having t flip-flops 301 and 302 and AND gates
303 and 304 is counted up. One of AND gates 305, 306 and
307 is enabled in accordance with the state of the T
flip-flops 301 and 302. One of the alert mode signals
representing an audio and visual alert mode, an audio
alert mode and a visual alert mode is obtained through an
OR gate 308 and/or an OR gate 309.
~n the above embodiments, the audio alert mode
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via the loudspeaker and the visual alert mode via the LED
are e~emplified. However, a vibration alert mode using a
motor may also be set.
According to the present invention, the reset
switch for stopping the alert signal is operated in a
predetermined manner to change the alert mode and easily
check alert mode switching.
Since the reset switch is used to switch the
alert mode, unlike the conventional pager using a movable
switch, the multiple alert pager according to the present
invention becomes compact and provides a variety of
practical applications.
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