Note: Descriptions are shown in the official language in which they were submitted.
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This invention relates to electronic volume devices and more
particularly to such devices of a chopper type which control
the quantity of attenuation of an input analog signal to the
device by switching the analog signal at predetermined
periods. In particular the present invention relates to
electronic volume devices which are intended to miniaturize
the device and to reduce the cost of the device by using a
switching control unit which can be composed of a monolithic
LSI (Large Scale Intergration).
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It is an ob~ect o~ the invention to provide an improved
electronic vo]ume device.
According to the invention there is provided an electronic
vo]ume device comprising: a volume control circuit
constituted by a monolithic integrated circuit and having a
signal output terminal including switching control signal
generating means for generating a switching control signal
having a duty cycle corresponding to a desired proportion of
attenuation, and means for switching the signal output
terminal between a floating state and a grounded state in
accordance with the switching signal generated by the
switching control generating means; a signal line through
which an input analog signal is applied; means for connecting
the signal output terminal of the volume control circuit to
the signal line; and a low pass filter connected to the
signal line for forming an output signal by eliminating high
frequency components from the signal on the signal line.
According to a preferred embodiment of the present invention,
the electronic volume device, inclusive of switching means
which switches an input analog signal, is constituteds by a
monolithic LSI.
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The on/off switclling of an analog signal may be substantially
performed by elements incorporated into the LSI, so that the
number of parts used is reduced, and miniaturization,
lightening and cost reduction of the device are realized.
It is therefore an advantage of the present invention that it
provides an electronic volume device which reduces the number
of parts used, and realizes miniaturization, lightening and
cost reduction of the volume device.
Reference is now made to the accompanying drawings in which:
Fig. 1 is a block diagram having one embodiment of an
electronic volume device according to the present invention;
Fig. 2 is a circuit diagram showing one example of a buffer
shown in Fig. l;
Fig. 3 is a circuit diagram showing another example of the
buffer shown in Fig. l;
Fig. 4 is a waveform showing the operation of the embodiment
shown in Fig. l; and
Fig. 5 and 6 each are a block diagram showing an example of a
electronic volume device of a chopper type.
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Electric volume devices of a chopper type known in the prior
art and which have been proposed are shown in Fig. 5 and 6.
In the device of Fig. 5, an input analog signal received at
an input terminaJ 1 is turned on and off by an analog switch
2, the output of which is supplied via a low pass filter 3
for removing useless higher harmonics to an output terminal 4
from which the signal appears attenuated by a predetermined
quantity. The switch 2 is turned on and off by a switching
control signal input to the gate of the switch 2. Thus the
duty cycle of the switching control signa] is changed to
change a quantity of attenuation of the signal output from
the output terminal 4.
The switching control signal applied to the gate
4 --
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terll\inll of Illr~ nuulol~ ~.wil:cll 2 is fo~ led Ly n volume
contro:l circui.l: 5(). Illc volunle control circuit 50 -
.i.ncLudes a vol.ullle cou~ ol data generator 6 wllich generates
n volunie conlro.l. d 1~l 1) correspondillg to a desired
(lualltil:y of attellu.lt::ioll, 1 counter 8 wllicll collllts clock
signals generatell by a clock generatioll source 7 an~l
ll .l V ~ 1 l~ r ~ l C ll C y ~ i. C II ~ 9 ~I
nlllllerical data si.gllcl.L Dx wllich cl~anges l)eriod:ically, and a
comparator 9 wllicll compares tlle volume control data Ds
output l~y tllc vo.lullle c~mltrol. data generltor 6 alld tlle
nulller:lcal data l)x ouLI~ul l)y tlle counter 8 aud outputs, for
examp~e, a lligll level. s:ignal wllen 1)9>VX an(l a low level
signa] wllen Ds_ Dx~ e output signal from tlle
comparator 9 is apl)l:i.ed to tlle gate of the anl310g switch 2.
as the switclling contro:L signal.
In sucll arrnllgemcllt, the period oE tlle switcl~ g
control signal oul:pul: by t:he volume control circuit 50 is
deterllli.lled by tlle repe;lted counting period oE counter 8,
anù tlle tl~e dul:y cycl.e of tlle switcl~ g control signsl is
determined by tlle value of the volume control data Dx set
in the volume control data generator 6. Wllen the volume
control data Ds set in the volume control data generator 6
of the volume contro.L circuit 50 increases, tlle duty cycle
of the switclling conl:rol signal output by tlle volume
control circuit 50 increases, so that tlle conductivity oE
tlle analog switcll 2 increases to tllereby reduce tlle
,
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oll~ s~:, wll(~ ol~ .rol (i~ cl l)s se~ tlle
Vo I Ulll(' COlltt`O I (1;11 n g(~ l nLol~ I') decrc-lses, Ille duLy cycle
ol Llle swi Lcll i llg r olll~ s:igll.l.l outl)~ by tllc volume
( ~ l l (l ll (~ l i v ~ y ( 1 l 1. 1 1 ( ~ ~ 11 1 1 0 ~ lI ( r~ i ll c r e n s e
'I'lle .s~rllc~Or l~ig. 6 enlllloys E1 LLallsistor 1(3
,111d fl (flpaC:itrJI~ 12 illSI(~l(l Of tl1e allalOg SW.i.-CIl 2 il1 l~ig.
r) . 1 11 l. ll i .s ( ;1 ~ i L ~ c o ll l: r o ~ S i. ~ l I o ~ l) Ll l: by
Lll(? COml)araLOr (3 ol 1 ~ VOI.IIIII(! C011trOl Ci.r(:lli.L 51 iS
.II)II.li.e(l to l:llC 1)~ ol 1.11~ Ll-;lllsisLor 1(~ V.i~l all illvertor
~1, Lllcl-eby conlrollillg l:lle (luanLiLy of atLellllaLioll of the
allal.og sigllnl ns ill ll)c cxallll)le of l;i.g. 5.
In .sucll c~crl:lonic volume device, Llle volume
contro1. circuiL 5() or 5I can be fabricated as an
i.lltegrElte(l ci.rcuiL. I~or examp1e, il: may be fabricate(l
from a MOS (i~leLa.l Ox:idc SemicollducLor) LSI (Large Scale
Integl-aLioll), n O~l()S ((,oml)lelllelltary i~leLal ()xide
Semicoll~luctor) gal:e nrl~ny l.Sl or a bipolEIr type gate array
L'.~,I. Tllerefore, Lllc vol.uole conLro1 circuit oE Llle
e1ectronic volullle dev.ice can be miniaturized and made lighter .
Ilowevel, 1 llc ci.rcu:Lt parts inclusive Or tlle
allnlo& swiLcll 2 sllo~ln i.ll l.ig. 5 or Llle tr.lllsisLor 10 sllown
in l~:i.g. G as sw.i.Lclling mealls is difricult to be
collsLituLe(l as fl 1110110~ h:iC ].SI, so tllat it reqllires many
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eircuit parts, wllieh is a big hindl-anee in the
minat~1rization, and weight, and cost reduction of the
eleetronie volume deviee.
()nc ellll)ollilllelll- o tlle present invelltiorl will now
be describe~ :in (I-l:ail \~ ll reference to tlle accompanying
dl.lw:illgs. Li.l~e re(cl~ e ntlmerals are given to like
compollellts tllrollgllolll: in ligs. 1, 5 and G for eotlvenience
of ~lescripti.oll all(l lul-lller descril)tioll tllereoi will be
In l.ig. 1, all analog signal to be controlletl is
applied to an inpllt Lellllillal 1. The signal applied to the
input term:i.ll;ll I is nlll~li.e(l to a low pas3 r:i.ller 3 via a
si.gnal line 15 all(l a resi.stor lG. rlle signal l.lne 15 is
conllected to a s:i.gnal. oUtplJt terminal ToUt of a volume
control circuit 5 via a capacitor 13.
The volmlllle control circuit 5 includes a volume
contro]. data generator G, a counter 8, a comparator 9 and
a ~uffer 14. Vu.Lume control data Ds corresl~ontlillg to a
desiretl quantity Or attelluation is set in the volume
control data generator G whicll outputs a signal indicative
of tlle volume control data Ds. '11-e counter 8 counts clock
signals havillg~pre(leterlllined period generated by a clock
source 7 and ou~l)lJts a s:ignal indicative of the numerical
data Dx correspontlillg to tlle counts. If the counter 8 is,
for example, of a 5 bi.t type (in tllis case, the volume
control data Ds set in tlle volume control data generator G
is also of a 5-bit tyl~e), the measured data Dx starts to
increment from "00000". Wllen the data exceeds "11111", it
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again becomes !10000()~ a~ repeats such behavior. The
comparator 9 compares the signal indicative of the volume
control data Ds output by the volume control data
generator 6 and the signal indicative of the numerical Dx
output by the countcr 8. When Ds > Dx- the comparator 9
~ n
n outputs a high level switching control signal whilc ~hcn
Ds ~- Dx~ the comparator outputs a low level switching
control signal. The switching control signal is then
applied to the control input of the buffer 14.
When the switching control signal is at high
level, the buffer 14 output is switched to a high
impedance state; namely, its output terminal ToUt is
switched to a floating state. When the switching control
signal is at low level, the buffer output is switched to a
low impedance state; namely, its output terminal ToUt is
switched to a grounded state. The buffer 14 may be
constituted by a tri-state buffer or an open drain buffer.
The volume control circuit 5 may be constituted,
for example, by a monolithic CMOS gate array LSI. In that
case, the specific circuit example of the buffer 14 is
shown in Fig. 2, and constitutes a tri-state buffer which
includes an inverter 141, a NAND gate 142, an OR gate 143
and a p-channel FET (Field Effect Transistor) 144 and n-
channel FET 45 each being composed of a monolithic CMOS
circuit. In the circuit of Fig. 2, when the signal from
the comparator 9 is at high level, the p-channel FET 144
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is off, the n-channel FET 145 is also off, and the terminal
Tout is in a high impedance state or in a floating state.
When the signal from the comparator 9 is at low level, the p-
channel FET 145 ls off, n-channel FET 145 is on and the
terminal Tout is in a low impedance state or in a grounded
state.
Fig. 3 illustrates the buffer 14 constituted as an open
drain buffer. It includes an inverter 146, a FET 147 and a
diode 148. If the signal from the comparator 9 is at high
level, FET 147 is turned off, the terminal Tout is in a high
impedance state or in a floating state. If the signal from
the comparator 9 is at level, FET 147 is turned on and the
terminal Tout is in a low impedance state or in a grounded
state.
When the signal output terminal Tout of the volume
control circuit 5 is in a high impedance state or in a
floating state, the controlled analog signal applied to the
input terminal 1 is applied to the low pass filter 3 via the
signal line 15 and resistor 16. However, if the output
terminal Tout f the volume control circuit 5 is in a low
impedance or in a grounded state, the signal on the signal
line 15 is grounded via the capacitor 13, terminal Tout/ and
buffer 14, so that the controlled analog signal applied to
the input terminal 1 is not applied to the low pass filter 3.
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As jllst described, the controlled analog signal
applied to the input terminal 1 is turned on/off and then
applied to the low pass filter 3 depending on whether the
signal output terminal ToUt of the volume control circuit
5 is in a high impedance state or in a low impedance
state. The low pass filter 3 eliminates high frequency
components from the on/off-controlled analog signal to
form a smoothly changing output signal. The signal
passing through the low pass filter 3 is output as an
output signal from tlle output terminal 4.
Fig. 4 shows the state and waveforms of signals
at several elements of the embodiment shown in Fig. 1.
Fig. 4(a) shows the relationship between numerical data Dx
output by the counter 8 and volume control data Ds output
by the volume control data generator 6. In Fig. 4(a), the
solid line shows the numerical data Dx and the broken line
shows the volume control data Ds.
Fig. 4(b) illustrates the switching control
signal output by the comparator 9 in conjunction with Fig.
4(a). The switching control signal shown in Fig. 4(b) is
at high level when Ds > Dx and at low level when Ds Dx
in Fig. 4(a). Fig. 4(c) shows the waveform of signals
applied to the input terminal 1 and to the low pass filter
3. In Fig. 4(c), the solid line shows the signal applied
to the input terminal 1 while the hatching shows zero
portions in the signal caused by the low impedance state
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Fig. 4(d) ill,ustrates the smooth waveform
converted by the low pass filter 3. As will be obvious
fromlthis signal, the low pass filter 3 outputs a signal
~h~ includes the signal applied to the input terminal
1 and shown in Fig. 4(c) and attenuated by a quantity
corresponding to the duty cycle of the switching cont~ol
signal shown in Fig~ 4(b).
The duty cycle D is given by
D = t/T
where t is the switchillg on time during which the signal
output terminal ToUt of the volume control circuit 5
is in the "high impedance state" in which the analog
signal is applied to the low pass filter 3, and T is the
period of the signal output from the signal output
terminal ToUt of the volume control circuit 5.
The value of the analog signal integrated during
the switching on time t constitutes the transmitted power
output from the output terminal 4 via the low pass filter
3. The transmitted power is smoothed by the low pass
filter 3 as shown in Fig. 4(d) and output from the output
terminal 4.
Therefore, by controlling the value of the duty
cycle D, the quantity of power or the quantity of
attenuation of the analog signal output from the output
terminal 4 is controlled.
