Note: Descriptions are shown in the official language in which they were submitted.
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APPARATUS AND MLTHOD FOR RE~CORDING
AND/OR REPRODUCING A DIGITAL SIGNAL
S BACKGROUND OF TH~ N'IION
Field of the Invention
The present invention relates to an apparatus and method for
recording and/or reproducing a digital signal, and more particularly to such an
apparatus and method suitable for use in recording and/or reproducing a digital
signal transferred from a computer or the like.
Description of the Prior Art
In practice, data stored in a hard disk or the like of a computer can
be transferred to and recorded by a data streamer (data-recorder) once a day so
as to protect the data or back up the same.
For this operation, or as a data recorder, analog audio tape
recorders have been conventionally used in many cases. However, analog tape
recorders have disadvantages in that they need an excessive amount of a
recording medium or magnetic tape for recording and operate at a quite low data
transferring rate upon recording, so that it takes too much time to transfer andrecord such data information. Moreover, analog tape recorders have problems,
e.g. the starting point of a desired portion of the recorded data information
cannot be rapidly searched for, and so on.
Thus, to overcome the above-mentioned problems, it is thought to
utilize a helical-scan type DAT (digital audio tape recorder) using a rotary head,
that is, a so-called recently cornmercialized DAT as a data recorder. Such data
recorders utilizing a DAT are described in Canadian Patent Applications No.
554,745, No. 563,367, No. ;~
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570,491 and No. 572,321, by the same assignee of the present application
To utilize the DAT as a data recorder, data transferred from a host
5 computer is transformed in accordance with a DAT format before recording. In
the DAT format, one frame is made llp of two oblique tracks formed by one
rotation oE two heads respectively having a different azimuth angle with each
other. 16-bit PCM audio data, which has been interleaved, and auxiliary sub-dataare recorded in this one frame area as a unit. During recording, there are formed
10 in each track a main area for recording the PCM data and a sub-area for
recording the sub-data.
With the DAT as described above, when another signal is to be
recorded on a previously recorded recording medium or tape, previously recorded
15 signals are erased by recording new signals thereover, that is, by a so-called
overwriting, vwithout using an erasing head. Therefore, if overwriting is not
normally effected, for example, due to clogging of the head or the like, there is
the possibility that a part of the previously recorded signals may remain unerased.
Therefore, if overwriting is not effected normally, for example, if the tape loses
20 contact with the heads for an instant or due to clogging, previously recordedsignals may remain unerased, which causes a data error referred to as "drop-in".
To attend to this data error, in the DAT format, an error detecting
code is added to each of the main area and the sub-area of each track in which
25 signals are recorded, so as to detect an unerased portion, if any, in the track as
an error.
In the DAT format as described above, the main area and the sub-
area of one track are respectively provided
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with the error detecting code so that the drop-in can be
detected in the concerned area. However, even though
such an error detecting code is added, in the even~ that
previously recorded signals in an entire main area or an
entire sub-area remain unerased, the drop-in cannot be
detected if the error detecting code in the concerned
area is considered to be normal.
If a signal to be recorded is an audio signal,
signals remaining in the unerased portion can be removed
by positional correlation or the like. However, when
the DAT is utilized as a data recorder, there is
generally no positional correlation of data. Moreover,
when the DAT is used as a data recorder, it is required
to record and reproduce data more exactly than that for
audio signals.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of the present
invention to provide an apparatus and method for
recording and/or reproducing a digital signal which is
capable of solving the above-mentioned problems.
According to a first aspect of the present
invention, there is provided an apparatus for recording
a digital signal in a track formed on a recording
medium, comprising:
means for forming a main area for recording
main data and a sub-area for recording sub-data in
said track; and
means for recording in the sub-area, check
data for detecting an error in data recorded in the
main area.
According to a second aspect of the present
invention, there is provided an apparatus for
reproducing a digital signal recorded by the above
described apparatus including:
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means for reproducing the signals recorded in
the tracks;
means for extracting the check data recorded
in the sub-area from the reproduced signals; and
means for comparing the extracted check data
and the reproduced main data to detect an error in
the main data.
According to a third aspect of the present
invention, pairs of tracks are considered one frame and
lo the data is organized according to logical frame numbers
and absolute frame numbers. The means for comparing the
reproduced check data and the reproduced main data
includes means for detecting the continuities of the
logical and absolute frame numbers.
The above and other objects, features and
advantages of the present invention will become apparent
from the following detailed description of the preferred
embodiment taken in conjunction with the accompanying
drawings, throughout which like reference numerals
designate like elements and parts.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a block diagram showing an embodiment of
the present invention;
Fig. 2 is a diagram showing a DAT format;
Fig. 3 is a diagram showing the data arrangement in
a main data block;
Figs. 4A and 4B are a diagram showing the data
arrangement of the main area in one frame;
Fig. 5 is a diagram showing the data arrangement of
the logical frame number;
Figs. 6A and 6B together are a diagram showing the
data arrangement of a sub-code block;
Fig. 7 is a diagram showing the data arrangement of
the packs in the sub-code block;
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Fig. 8 is a flow chart showing a seguence of the
error determining method;
Fig. 9 is a table showing error determination
bases; and
Fig. 10 is a table showing the contents of the
respective determinations.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
One embodiment of the present invention will now be
described with reference to the accompanying drawings.
Fig. 1 shows the whole arrangement of an embodiment
according to the present invention in which a DAT is
used as a data recorder. In Fig. 1 reference numeral 1
generally designates a DAT, 2 an interface bus, 3 a host
computer and 4, 5 inner buses, respectively. The DAT 1
is mainly formed of a recording and reproducing section
6, a recording amplifier 7, a reproducing amplifier ~3, a
signal processing circuit 9, a RAM 10, a data controller
11, an interface board 12, a system controller 13, a
servo and motor drive circuit 14 and so on.
The system controller 13, the signal processing
circuit 9 and the data controller 11 are arranged to
interchange among them predetermined signals such as an
absolute frame number AFNO, check data, a mode
indication, a logical frame number ~FNO, a
determination result by the check data, a data transfer
instruction and so on.
The recording and reproducing section 6 is provided
with a rotary head drum, though not shown, such that a
magnetic tape 15 (Fig. 2) is wrapped around the
peripheral surface of the drum over an angular range of
about 90 of head travel and transported by a capstan.
The drum is provided with a pair of heads A and B
mounted thereon respectively having azimuth angles
different from each other, in a manner such that two
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oblique tracks are recorded on and reproduced from the
tape by the heads with each rotation of the drum.
Digital data delivered from the host computer 3
through the buses 5, 2 and 4 is fed to the interface
board 12 through which the digital data is subjected to
predetermined signal processing in the data controller
11, the RAM 10, the signal processing circuit 9, and so
on, under the control of the system controller 13 to be
converted in accordance with aforementioned DAT format.
The DAT forma.ted data is then supplied through the
recording amplifier 7 to the recording and reproducing
section 6 to be recorded on the magnetic tape by the
heads A and B.
The signal recorded on the magnetic tape can be
subsequently reproduced by the heads A and B. The
reproduced signal is supplied through the reproducing
amplifier 8 to the signal processing circuit 9 wherein
the signal is re-converted from the DAT format. The
digital data therefrom is supplied through the data
controller 11, the interface board 12 and the buses 4, 2
and 5 to the host computer 3.
In the above-mentioned apparatus, the DAT format
according to which signals are recorded on a magnetic
tape is as shown in Fig. 2.
In Fig. 2, two oblique tracks TA and TB are formed
on a tape 15 by one rotation of the heads A and B, as
indicated by an arrow a in Fig. 2. One frame is made up
- of these two tracks TA and TB. One track TA or TB
comprises 196 blocks and one block is formed of 288
bits. At each end portion thereof 34 blocks are
assigned to be the sub-areas and 128 blocks of the
central portion thereof the main area.
The sub-areas are further divided into several
areas. Specifically, beginning from the lower end side
of each sub-area, as viewed in Fig. 2, the first
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sub-areas of the tracks TA and TB are partitioned into a
margin area, a preamble area for the PLL of the
sub-code, a first sub code area, a postamble area, an
interblock gap area, a tracking (ATF) signal area, an
interblock gap area, and a preamble area for the PLL of
data. The second sub-areas, at the other ends of the
tracks TA and TB are partitioned into an interblock gap
area, an ATF signal area, an interblock gap area, a
preamble area for the PLL of the sub-code area, a second
lo sub-code area, a postamble area, and a margin area.
Among these areas, the first and second sub-code areas
are respectively formed of eight blocks, and the other
areas are formed of a predetermined number of blocks.
It should be noted that the scale of the respective
areas in Fig. 4 is not exact.
The main area comprises 128 data blocks. Each of
the blocks thereof comprises, as shown in Fig. 3, from
its head (the left side as viewed in Fig. 3), eight bits
each of a synchronizing signal, a Wl area for recording
the PCM-ID and so on, a block address area and a parity
area and the remaining 256 bits of a main data area.
When an audio signal is recorded, the main data area is
loaded with a left (L) channel and a right (R) channel,
each comprising 16 bit PCM data. The 16-bit PCM data
are interleaved and recorded with parities in the main
areas of the two tracks TA and TB tone frame). Thus,
the main areas of one frame have a data capacity of
approximately 5760 bytes.
When the DAT is employed as a data recorder the
data transferred from the host computer 3 is converted
into 16-bit data so as to be treated in the same manner
as the above-mentioned audio PCM data and arranged in
accordance with the format as shown in Fig. 4 and
recorded in the main areas of one frame.
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Let the above format be explained in more detail.
In Figs. 4A and 4B, the above-mentioned 5760 bytes are
divided into words (numbered 0 - 1439) each formed of
four bytes (32 bits). Each of these words is divided
into an R-channel and L-channel of 16-bit each (two
bytes) in accordance with the DAT-formatted audio
signal. The first three words (12 bytes) are assigned
to be a synchronizing area in which all the bits of the
first byte are set to "0", all the bi.s of the
~o subsequent 10 bytes are set to "1", and all the bits of
the last byte are set to "o".
Next, four words (16 bytes) are assigned to a
header portion in which the same contents are written in
the L-channel and R-channel portions. Specifically,
explaining the arrangement of the header portion, the
beginning half byte of the fourth word (note that the
fourth word is referenced "3(-)," the fifth word is
referenced "4~+)," etc.) of the L~channel in this header
portion is assigned to be a format ID for indicating the
format of the data recorder. The 4 bits in the last
half of the first byte of the fourth word are
indefinite. The remaining three bytes of the fourth
word are assigned to be logical frame number (LFN0)
areas. By means of the LFN0, each being made of 8 bits,
there is provided a binary value which is indicative of
the serial number (1 - 23) of a frame, with 23 frames
being treated as a unit.
The eleventh to 1439th words subsequent to the
header portion are assigned to be a data area having a
total capacity of 5728 bytes, and data signals from the
host computer 3 are sequentially recorded in these
frames four bytes at a time.
The 1440th word is assigned to an error detecting
code (EDC) area in which is recorded an error detecting
code ~EDC) for each of the data bit sequences formed in
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the vertical dixection of the data signals written in
the header portion and the data area.
~ s described above, the DAT format of the present
embodiment is such that h-channel data and R-channel
data are alternately recorded in two byte increments in
two tracks, wherein each track is generally identified,
for example, by plus and minus (+ and -) azimuth angles
of the heads A and B for forming the tracks which are
marked on the both sides of Figs. 4A and 4B. The EDC
can be generated for the two tracks forming one frame in
the above-mentioned manner so that the EDC is generated
for the data sequence formed of the data signals in the
header portion and the data area in the vertical
direction.
Therefore, according to this format, it is
therefore possible to determine whether there remain
unerased portions or not by effecting the EDC operation.
Specifically, if an unerased portion remains in one of
the two tracks, every other data for generating the EDC
are erroneous so that the EDC cannot be generated
correctly. Thus, the unerased portion can be detected
by checking the generated EDC values.
Next, the logical frame number LFNO will be
explained with reference to Fig. 5.
As described above, the logical frame number LFNO
is assigned to record the serial numbers (1 - 23) of
each frame, for example, with 23 frames being taken as a
unit. In other words, the frame numbers 1 to 23 repeat
at every 23 frames. As illustrated in Fig. 5, the LFNO
is formed of eight bits. The most significant bit of
the LFNO is a last frame ID (LASTF-ID) indicative of the
last frame in the unit, that is, the 23rd frame when the
unit is formed of 23 frames. The next most significant
bit is an ECC frame ID (ECCF-ID) indicative of an error
correcting code (ECC) frame for correcting errors. The
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remaining six bits represent the LFNO 1 - 23 in binary
combination. The number of frames in one unit can be
selected arbitrarily from the range of 1 to 64 in place
of the above-mentioned 23 frames. In such case the last
frame in one unit can be identified by the LASTF-ID.
The ECCF-I~ can be recorded in a plurality of frames,
instead of recorded only in one frame.
The use of such a frame unit provided with the
LFNOs can clearly delimit data by a predetermined
quantity, and accordingly the signal processing is
facilitated. Further, since the number of frames in one
unit can be appropriately selected by changing the
maximum value of the LFNO, the signal processing can be
effected more easily.
Next, an explanation will be given of the data
arrangement of the first and second sub-code portions in
the sub-area.
The first and second sub-code portions are
respectively formed of eight sub-code blocks in each of
which 2048 bits of data can be recorded.
Figs. 6A and 6B show, respectively, the
constructions of the even-numbered sub-code block (EVEN
block) and the odd-numbered sub-code block (ODD block),
in each of which a synchronizing signal, the areas Wl
and W2 and a parity, respectively formed of eight bits,
and 256 bits of sub-code data including a parity are
located in this order. The sub-code data is divided
into four packs formed of 64 (8 x 8) bits (eight
symbols), respectively.
As shown in Figs. 6A and 6B, the contents of W1 and
W2 in the EVEN block are different from those in the ODD
block, and the packs in the EVEN and ODD blocks are
alternately numbered from "1" to "7". The eighth pack
is assigned to record an error detecting code C1.
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In the EVEN block, the area W1 consists of a
four-bit control code (CTL-ID) and another four bits all
set at "O", while the area W2 consists of an upper bit
set at "1", a three-bit format ID and a four-bit block
address. On the other hand, in the ODD block, the area
W1 consists of program number codes (PNO-2 and PNO-3)
respectively formed of four bits, while the area W2
consists of an upper bit set at "1", a three-bit program
number code (PNO-1) and a four-bit block address.
The packs 1 - 7 are respectively divided into eight
words of eight bits each in which are recorded a variety -
of codes such as a code indicating the lead-in area of
the record starting portion on a tape, a code indicating
a lead-out area of the record terminating portion, a
code indicating the recording date, an absolute frame
number, a logical frame number and so on, with
parities.
Fig. 7 shows the construction of the pack 3 as an
example of one of these seven packs.
As can be seen from Fig. 7, the pack 3 consists of
eight, eight-bit words PCl - PC8. The upper four bits
of the word PCl are assigned to record a pack number
("0011" indicating the pack 3 in Fig. 7), and the lower
four bits of the same are assigned a format ID. The
word PC2 is indefinite. The upper four bits of the word
PC3 are assigned to record an area ID indicative of the
lead-in area or the lead-out area. A total 20 bit area
formed of the lower four bits of the word PC3 and the
words PC4 and PC5 is assigned to record the absolute
frame number (AFNO). The AFNO is the serial number
recorded in each corresponding frame in one volume of
tape. A total 16-bit area formed of the subseguent
words PC6 and PC7 is assigned to record a check data CD
which relates to the present invention. The word PC8 is
assigned to record a parity for the words PCl - PC7.
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The above 16-bit check data CD is the exclusive OR
o~ all the data (transferred from the host computer 3)
recoxded in the main area located in one o~ the tracks
TA and TB in which the pack 3 is provided.
Alternatively, the check data CD can be an error
detecting signal such as c~C for all the data recorded
in the main area.
- Check Data(+azimuth)=LOfRl+L2+R3-------+R1439
Check Data(-azimuth~=Ro+Ll+R2+L3-------+Ll439
1 o The ch-ck data can be recorded in su~-ri~posea
fashion in the word ~C1 and other indefini.e portions in
the words PC2 - PC7 to improve the reliability of the
data. In this case, since one trac~ has eight blocks of
the first and second sub-code portions and there are
seven packs available in a pair of EVEN and ODD blocks,
it is possible to record maximally 56 sets of the check
data CD in one track.
' The check data is utilized in the following cases.
,r Upon reproduction, the check data read out from one
track is compared with an exclusive OR of the main data
read out from the main portion of the same track. If,
as the result of this comparison, both data do not
coincide with each other, it can be determined that the
whole main area or the whole sub-area remains unerased
(previously recorded check data CD also remains). On
the other hand, if both data coincide with each other,
it can be determined that the whole main area and the
whole sub-area are either both correct or both are
erroneous. Next, it can be detected which of the main
; area and the sub-area is erroneous by the use of the
¦ LFNO and AFNO in the following manner.
Fig. 8 shows the seguence of such a determination,
as carried out by the system controller 13, wherein the
checking of items at steps Sl - S4 provide the
determination bases as shown in Fig. 9, from which
errors can be defined as shown in Fig. 10.
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In Fig. 8, it is first examined at step Sl whether
or not data recorded in the main area (hereinafter
simply called "the main data") was corrected by the
codes Cl and C2. If the correction was not possible, it
is determined on the bases of column C in Fig. 10 that
there is a drop-out in the main data on the track, and a
message indicative of the determination is transferred.
If it is detected at step Sl that the correction
was carried out, the process proceeds to the next step
lo S2 to examine the continuity of the LFNO in the main
area. If continuity is not found, it is determined on
the basis of the column B in Fig. 10 that the overwrite
was not correctly effected and hence unerased signals,
which had been previously recorded, are reproduced, that
is, a drop-in occurred in the concerned track, and a
message indicative of the determination is transferred.
If continuity is found in the LFNO, the process
terminates the check on the main area and proceeds to
the next step S3 to check the sub-area. Specifically,
the reproducibility of data in the packs of the sub-area
is examined by the error correcting code Cl, the
parities recorded in the packs, coincidence of data and
so on. If these checks cannot be effected, it is
determined on the basis of the row (5) in Fig. 10 that a
drop-out occurred in data in the sub-area (sub-data) and
the main data is correct.
If the reproducibility check has been effected, the
process proceeds to the next step S4 wherein the
continuity of the AFNO and the main data are checked,
the latter by the use of the check data CD, and the
determination bases shown in Fig. 9 are provided from
the respective check results. Thus, the determinations
in the column A of Fig. 10 can be obtained from the
bases of Fig. 9.
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The contents of respective determination are as
follows:
A - (1) ....... ...................The main data is correct.
A - (2) ....... ...................Drop-in occurred in both of the main
data and sub-data.
A - (3) .... Drop-in occurred in the main data.
The AFNO was continuous eventually.
A - (4) .... Drop-in occurred in the sub-data.
The AFNO is made to self-run and the
lo main data is regarded to be correct.
A - (5) .... Drop-out occurred in the sub-data.
The AFNO is made to self-run and the
main data is regarded to be correct.
Incidentally, a flag can be generated when the
drop-in is detected by the check data CD, whereby error
correction can be effected by an error correction code
ECC on the basis of this flag. Also, the above-
mentioned error detection by the check data CD can be
effected a plurality times to prevent misreading of the
check data CD and data in the main area.
According to the present invention, since the
sub-area is provided with check data CD for all of the
data in the main area of one track and the serial number
AFNO of the frame, it is possible to easily detect
errors such as a drop-in or the like which occur in the
entire main area or the entire sub-area and
specifically reveal the type of errors, whereby the
performance of the DAT used as a data recorder can be
highly improved.
The above description is given on a single
preferred embodiment of the invention but it will be
apparent that many modifications and variations could be
effected by one skilled in the art without departing
from the spirits or scope of the novel concepts of the
invention so that the scope of the invention should be
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determined by the appended claims only.
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