Note: Descriptions are shown in the official language in which they were submitted.
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PHYSICAL EXERCISE APPARATUS
This invention relates to physical exercise
apparatus.
Various forms of exercise apparatus are known, but
these mainly involve physical exertion without an.y
entertainment value for the user, or any means of
competition against a standard, or any positive
indication of the results in the sense of the
apparatus'itself providing an output of the result
achieved.
.
It is an object of the present invention to provide
physical exercise apparatus which enables the user to
simultaneously experience~ physical exertion which is
afforded by exercise apparatus as such, with the
enjoyment of a competitive sport as experienced by
players of racket games.
According to one aspect of the present invention there
is provided physical exercise apparatus comprising a
plurality of target members for arrangement at
discrete spaced locations in an array for use in
physical exercise by a user equipped with a playing
member; each target member being actuable in response
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to contact therewith by a playing member; signal
means associated with each target member for
indicating a first condition and a second condition
thereof; control apparatus for selectively causing
said signal means to be switchable from said first
- condition to said second condition; switch means
associated with each target member and responsive ~o
said contact by the playing member wi~h the target
member to change status, said change of switch means
~status permitting said signal means to change from one
to the other of said first and second conditions; the
control means being operable to cause said signal
means to change.
In an embodlment a change of status of said switch
means automatically changes the respective signal
means from one to the other of said first and second
conditions.
~ Alternatively, in another embodiment a change of
status of sa~id sw~tch means~ permits the respective
slgnal means to change from one to the other of said
first and second conditions subject to the status of a
.
control input controlled by said control means.
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; In~ this embodiment when said control means prevents a
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change in said signal means condition the control
means provides a signal indicating the change in
status of said switch means.
The array may be determined by supports for the target
members.
The supports may be arranged in a pluraliky of spaced
upright columns, and a series of said target members
are located in each column with a spacing
therebetwee~. The supports may also provide conduit
means for cabling to the control apparatus.
A said target member may comprise a housing
accommodating its signal means and arranged to actuate
its switch means. The signal means may be a lamp
- means which is illumina~ed in said second condition.
Alternatively (or additionally), the signal means may
emit an audible signal when in said second condition.
Various visual and audible means may be used and a
combination of both may prove attractive to some
users.
The switch means may be responsive to displacement of
the housing of the target member on impact thereof by
a user equipped with a playing member thereby to
return said signal means to said first condition. The
expression "impact" or ~strike~ is intended ~o include
a light touch since part of the housing may be formed
from a material which may damage if impacted with a
heavy blow. For example, the contact face of the
housing may itself be a displaceable cover face (e.g.
made of glass) of the lamp signal means. It may be
a housing formed of plas~ics material which when
displaced actuates a microswitch and which covers a
lamp which itself is not displaced. In such a case,
it will be of ,a material or construction which enables
the lamp condition to be visible i.e. either wholly or
partly formed of a material which transmits light or
formed with apertures or the like to permit the lamp
condition to be viewed.
.
The control apparatus may include an energising
circuit which is connected to the signal means of each
~ of said target members. The control apparatus may
include a switching circuit coupled to the signal
means of each target member and operable to switch in
sequence individual target members or groups of target
members from said first condition to said second
condition in accordance with a game selection.
~ This~` sw~itching circuit may be arranged to switch the
2~ J~
target members in sequence, and after switchiny one
target member or a group of target members and before
switching another taryet member or group of target
members, may await a signal indicative of a return of
signal means associated with said one target member or
group of target members to its or their first
condition in respect of impact thereof by the user.
Alternatively, the switching circuit may be arranged
to operate to continue the switching sequence after a
predetermihed interval whether or not the user has
impacted said one or group of target members. In this
event the control apparatus may also act to return the
signal means associated with said one target member to
lS its first condition. For example, the energising
circuit may be adapted to energise the signal means
for such predetermined interval on each occasion it is
energised in respect of the switching circuit of the
control apparatus. The control apparatus may include
means for generating a random sequence for the said
selective switching of the signal means.
The control apparatus may include user responsive
means ~or setting variable parameters for the use of
; the physical exerci8e apparatus: these may include
~ the choLce or selection of the "game" to be played and
. .
,
the choice of the ~skill level~ from a finite number
of choices.
The skill parameters may include user selectable
` S switching intervals. These parameters may also
include user selectable durations of play.
The control apparatus may include timing means
determining the duration of a user session on the
apparatus. The control apparatus may include counting
means for recording the number of user initiated
chànges in the instant condition of the switch
means.
The control apparatus may include a visual display
providing a display of counts related to the totalled
user -inLtiated changes. This may be in the form of a
~count~ or "score": the value given to each "impact"
or l'strike'' (i.e. user initiated changej may be
assigned by the game rules e.g. 10 points per impact.
Likewise the game may have provision for penalty
deductions from the "score" displayed e.g. for not
attalning a target performance.
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Different modes of operation of the control apparatus
are possible in accordance with game programs. The
control unit may include a microprocessor unit and -the
game programs may be stored in memory. In one mode
the user is given an indefinite period to impact a
target member in its second condition, In another
mode, the user has to impact the target members within
a predetermined time interval.
10 An embodiment of the invention will now be described
by way o~ example only, with reference to the
accompanying drawings, in which:-
Figure 1 shows schematically and in perspective view15 physical exercise apparatus according to an embodiment
together with an illustration of a player/user;
: ~ Figure~2 shows an enlarged view of a target member of
the apparatus of Figure 1,
Figure 3 shows an embodiment of a playing member for
use by a user with the apparatus of Figure 1; and
: ~ .
Flgure 4A is a block diagram of the control unit of
~ the apparatus;
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Figure 4B is a circuit diagram of the main central
processor logic board of the control unit;
Figures 4CA and 4CB show circuitry for the game input
and the score display;
Figure 4D shows the mechanics and wiring for the
lamps; -
Figure 4E shows part of the lamp drive circuit;
Figure 4F shows an interrupt circuit to produce
: interrupt signals from the lamps to the centralprocessor unit;
.
Figure 4G shows the lamp driver interface circuitry;
.
~and
Flgure 4H shows the sound processor circuitry.
~: 20
:
In thls ~embodiment of physical exercise apparatus,
: target:members 10 are arranged at discrete spaced
~: locations in an array 48 of target members 10 for use
: ~ ln:physlcal exercise apparatus by a player/user 20
25~ ~ equipped with a playing member 30. The playing member
30 is~a racket with a handle portion 31, shaft 32 and
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head 33 made for example of sponge rubber material for
striking the target members.
Each target member l0 is actuable in response to
contact therewith by a playing member. Signal means
ll (wholly inside a housing 14 of the target member lO
which transmits light) are associated with each target
member for indicating a first condition and a second
condition thereof. ~ach signal means of this
embodiment comprises lamps (see Fig. 4D) which
indicate the instant condition thereof. In the first
condition the lamps are OFF and in the second
condition the lamps are ON.
Control apparatus 40 (including a computer
programmable unit and a memory for storing game
programs) selectively causes the signal means ll to be
switched from the first condition to the second
condition.
Switch means 12 (Fig. 4D) is associated with each
target member l0. The switch means 12 is coupled to
the signalmeans ll. The housing 14 is displaceable in
response to~an impact thereon by the user's playing
member ~30. ~In consequencè, the switch means 12 is
respons1ve to sa1d~contact by the
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user~s playing member 30 with the target member l0 to
change status. This change of switch means status
permits the signal means ll to change from the second
~o the first condition subject to the status of a
S control input controlled by said control means (as
will be further described with reference to Figure 4E
- "cap out latch~ signal).
. . .
The control apparatus is operable to cause signal
means l1 to switch to the second condition in a
sequence to be followed by the user in accordance with
the game selection. The user follows the sequence of
illumination of the target members l0 as rapidly as
the user is able, tapping in sequence the illuminated
target members and as one associated signal means ll
switches back to the first condition (OFF) another
changes to the second condition (ON) presenting a
contLnuous challenge to the user for the duration of
the exercise session.
In this embodiment, the array is determined by
supports 50 for the target members l0. These supports
50 are arranged in eight spaced upright columns 6l to
68 each having six target members l0 located therein
with a spacing between each target member l0 in a
~ column. In this embodiment, the supports 50 also
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provide conduit means for cabling to the control
apparatus 40. The cabling provides the means of
energising the signal means 11 and control lines for
the swi*ch means 12.
As shown in Figure 2, the target means 10 comprises a
housing 14 accommodating its signal means 11. The
switch means 12 (Fig. 4D) is actuable by the housing .
14.
The control apparatus 40 includes an energising
circuit which is connected to the signal means 11 of
each of the target members 10 via the aforementioned
cabling means. The control apparatus 40 also includes
a switching circuit individually coupled by cabling
means to the signal means 12 of each target member 10
and operable to switch in seguence individual target
members or groups of target members 10 from the first
condition to the second condition in accordance with a
game selection, games being stored in a memory
associated with a programmable unit in the control
apparatus.
'
. The control apparatus 40 includes means for generating
25~ a random sec~uence for the selective switching of the
signal means 11. Each target member 10 in the array
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may be allocated a number (e.g. 1 to 4g) and the
generating means may include a number generator
generating the numbers 1 to 48 which is then used as
address data for the output of the energising circuit.
The control apparatus 40 includes user responsive
means such as buttons 41 to 43 and 44 to 46 or
setting variable parameters for the use of the
physical exercising apparakus e.g. "game" choice from
"1,2,3" and "skill level~' from ~low~, "medium" and
"high" as will be further described with reference to
Figures 4A~to 4H.
Alternatively, or additionally, the user responsive
means may set parameters which include user selectable
switching intervals selectable by the buttons 41 to
43, for example, to select intervals between switching
operations of the energising circuit of 5 seconds, 8
seconds and 10 seconds respectively. Another set of
parameters includes user selectable durations of play,
for example, 5 minutes, 10 minutes, 15 minutes.
Alternatively, the control apparatus 40 may include
timing means determining the duration o~ a user
session on the apparatus.
The control appara~us 40 includes counting means (not
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shown) for recording the nu~ber of user initiated
changes in the instant condition of the switch means
12. This count may be displayed on a visual display
47 providing a visual display of the counts related to
the totalled user initiated changes. Depending on the
electronic circuitry, the count display may be a
running total which changes progressively during ~he
user session or a final total displayed at the end of
the session.
It will be' appreciated by those skilled in the art
that many modifications to the apparatus described in
Figure 1 are possible.
Concerning the array 48, it would be possible to mount
the target members 10 on supports 50 which extend in
each column and have apertures for the cabling to
enter housings 14 of each of the target members 10.
Alternatively, the supports 50 can be in sections of
tubing which only extend between housings 14, these
housings being adapted at 15,16 to mechanically link
Wit}l the conduit support 50. Either such array would
have ;fixed locations for the target members 10. In
the Figure 1 embodiment, it is envisaged that each
,
column would be 8 feet in height and that the columns
~ ~ would be spaced apart by 2 feet intervals.
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Alternative provision for the array could be provided
by a backing panel with a series of connection points
thereon. The target members and connection points
could be adapted to link together mechanically.
Suitable devices could be provided for making
electrical connections between electrical carrier
means on the panel and the signal means 12 within 'the
target members 10. Such an arrangement could
facilitate the user making changes in the position of
the target means according to the height and reach of
the user.
Although it would increase the cost of production,
each target member may be mounted on an individual
track and may be displaceable by a motor associated
therewith. Control of the motor operation could be
another function of the control apparatus 40 which may
contain memory means and a microprocessor unit under
program control. This system could have the facility
for the user to input data relating to parameters such
as height and reach, whereby the target means would
then be spaced for optimum use by that user.
The control apparatus 40 may include a microprocessor
to generate the switching sequence for the signal
means 12. The microprocessor may also control the
~ 3
.
operation of the exercising apparatus in terms of the
selectable parameters and an interactive element can
be introduced. For example, the user may be asked to
input relevant data (e.g. height, weight, previous
performance) from which the microprocessor will
determine such parameters as the intervals between
switching of the signal means ll by the control
apparatus 40. The microprocessor may be used to
select different exercise routines (games) and
different illumination patterns. For example, instead
of the signal means ll being actuated in a to~ally
random sequence the microprocessor may ensure, for
example, that successively switched signal means ll
are in different columns or at a different height (or
lS both).
The playing member or racket design is intended to
ensure that the user strikes the target means lOwith
just a touch - where the word impact or strike is used
it is not intended that a significant force is
required. In an alternative embodiment, the signal
means may be an illuminated actuable lamp, e.g. of the
kind found on pin-ball machines, which both
illuminates and is displaceable to actuate a switch
means. In the described embodiment oi Figure 1 (where
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electrical connections are made by cabling) the switch
means 12 is a microswitch as mentioned below.
Instead of cabling, which in the Figure 1 embodiment
requires two leads to each target member from the
energising circuit of the control apparatus to carry
the electrical power and two leads to each signal'
means from the switching circuit of the control
apparatus to carry the switching signals to the
microswitches, computer technology could be introduced
in the '~orm of bus boards to carry digitised signals
to intelligent means at each signal means.
,
In describing the apparatus of Figure 1 reference was
made to control circuitry 40. With reference to
Figures 4A to 4H a description will now be given of a
control unit and related circuitry.
Referring to Figure 4A, the control unit comprises a
user interactive input 100 which is used to set the
level of game skill required and select the game to be
played. The input from this unit goes to the
microprocessor control unit 200. The user interactive
~input unit 100 may be in the form of a keyboard and
: 25 may also have an LCD or LE~ display to indicate the
choices which th~ user may make. In particular, the
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input unit 100 will have select switches for the user
to select from a choice of games and from a choice of
skill levels. The microprocessor control unit 200
performs all the digital logic functions necessary to
operate and make the game function. The unit 200
supervises all aspects of the apparatus. It controls
both the input e.g. switches, and output e.g.
sound/lamp/scoring/printer. In this embodiment, the
microprocessor control unit is based on the 8052AH
basic chip manufactured by the Intel Corporation of
USA. It islin the MCS-51 range of microcontroller
chips. The Intel publication for this component is
referenced under the number 270015-001.
The control unit 200 is interfaced with a sound
processor circuit 300 with its loudspeaker 301, a
score display circuit including an LED display 400 and
a lamp driver interface circuit 500.
The interface circuit 500 is to enable the control
unit to drive the lamps of the apparatus shown in
Figure 1. The power required for the lamps determines
that a power interface is required. Power
transistors/relaysJtriacs may be used for the
energisation of the tungsten filament lamps. In this
case it would be necessary to isolate the lamp driver
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2?lf~ "'3-~
interface circuit 500 from the computer logic
circuits. This is achieved through opto-isolation
techniques. In an embodi,ment the lamps are operated
on 24 volts and have a power rating of 21 watts.
The control unit 200 will now be described with
reference to Figure 4B. The main components are the
central processor unit 210 which is interfaced by,
means of an address decoder 220 with RAM memory 230
and 235 (there are two sections of RAM memory to
.
accommodate a memory capacity of 16K? and an EPROM
memory 240 which stores the game programs. In
addition, there is the address latch 250 which
` determines whether an address or data byte value is on
the CPU bus. There is a reset circuit 260 which has a
:
mechanical reset 261 operated for example by a coin
; ' mechanism. The circuit also contains the gates 262,
263 and 264. There is aIso a voltage level translator
270 which interfaces between the TTL levels and the
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~ 20 voltage levels required by an optional terminal or
:
VDU used for programming.
:
The clock pulses of the CPU 210 are determined by the
clock components 280. The outputs from the CPU 210 on
25 ~ the ports PO.O to PO.7 are pulled up by a bank of
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~ resistors 290.
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The address decoder 220 is a component 74~CT138. It
receives the three line address on lines A13 to A15
from the bus 212. It is then ablè to output the
memory address signals Y0 to Y7 for the purposes of
addressing the memory. In this embodiment, the memory
230,235 comprises two IC RAM circuits identified by
the chip numbers 6264. This capacity of RAN memory
enables this embodiment to be operated to input the,-
game programs through the RAM and after checking these
programs the programs may then be stored in the EPROM
240. ` '
The address latch 250 is a component 74HCT373. This
latch 250 lS a decoder which operates to indicate to
the memory 230,235 and 240 whether the information on
- the bus 212 is address information or data. The
address latch~ is enabled on pin 11 by means of an
address Iatch enable signal from the CPU 210 via the
' gate 262 which receives the output from the CPU marked
ALE (address latch enable). The CPU 210 on ports P1.0
to P1.7 has on Pl.7 and Pl.6 outputs to the printer
and the prlnter busy line respectively. On port Pl.2
there~ is a~"PWM" output. This output is a function of
the 8052 chlp and enables the CPU 210 to issue
~lnstructions regarding the pulse counting which
corresponda to "strikes" by the user of the apparatus
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and the rewards given for a strike. The PWM signal
enables two parameters to be controlled, namely the
number of pulses and the width of the pulses in a
given time interval. By way of example, the game may
require a reward of ten points for a "strike". It is.
then possible to set the PWM signal such that in a
given interval there are ten pulses of 100 ~us wide.
The signal on the port INT1 is an interrupting signal
from the microswitches of the lamp displ~y (see Figure
4D and Figure 4F). This signal stops the operation of
the CPU '210 which is required to service an
interrupt routine in the program. It is then
possible, for example, for the CPU 210 to poll the
lamps in order to ascertain their status, for example
after a ~strike~.
The voltage level translator 270 comprises an IC chip
known as MAX232 which is manufactured by Maxim
Electronics, U.S.A. This circuit component converts
TTL levels of 0 to 5 volts to the voltage levels for a
VDU terminal at plus or minus 12 volts. It takes the
signals from the CPU 210 at its right-hand inputs and
at its left-hand outputs, outputs voltage levels plus
or minus- 12 volts. By way of example, pin ll may
receive a pulse at 0 volts and output a signal of plus
12 volts on pin 14. The clock components 280 comprise
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a crystal oscillator X1 and capacitors C2,C3 which are
gated with the micro to set the internal oscillator of
the CPU 210 to operate at a frequency of 7.3278 MHz.
The port PO.O to PO.7 issues both address information
and data in a multiplexed fashion. There are also
lines P2.0 to P2.7 which are further address lines ~o
the bus, whereby there are sixteen address lines fox
the purpose of addressing the memory. The bank of
resistors 290 are pull-up resistors which enable the
sLgnals on the ports PO.O to PO.7 to operate
effectively on the bus 212.
A reset mechanism 260 includes a coin operated- reset
261 which is responsive to the interactive unit 100
which may contain a coin operated mechanism. Within
- the reset circuit 260 there is also a manual reset S1
which may be internal and may be screened for
- authorlsed use only. When the reset is made either by
the mechanism 261 (responsive to the user interactive
input 100) or whether an internal reset via the CPU
210, the control unit then actuates a program in the
EPROM 240 which enables the user to make selections at
; the~interactive input 100. These selections involve a
cholce of game: lamps will illuminate indicating to
the user that the user should "selec~ a game" and
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"select a skill level". In an embodiment, there will
be a choice of three games and three skill levels.
The program initially operated by the EPRO~ 240 will
enable the user to make this choice.
In the reset circuit 260 there is a capacitor C4, the
purpose of which is to ensure that the reset pin RST
of the CPU 210 is taken to 5 volts during the reset.
On release of the reset the capacitor C4 charges to
hold the line up for a few milliseconds in order that
. . .
- the CPU c~n,reset.
.
At the CPU 210 further outputs WR and RD and PSEN are
- signals whlch enable operations such as write, read
15and program store enable. It will be seen that these
~are gated approprlately by the gates 262 and 264. The
combination of the RD signal and the PSEN signal to
- the gate 264 enable a program to be run from the EPROM
~ 240. The-signal ALE (address latch enable) via the
20~gate 262 enables the address latch 250 to address the
RAM memory 230,235 or the EPRO~ memory 24,0.
Adjacent the gates 263~there is a component 265. The
~ component 265 indicates in dotted line a resistive
25link~ to plus 5 volts whlch is necessary if the EPROM
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240 is an IC 2764 but not required if the EPROM 240 is
an IC 27128.
The game input and scoring circuits of Figures 4CA and
4CB will now be described. The interactire input unit
100 comprises the game select switches 110 and the
skill select switches 112 which are user operable
switches. Game select switches 110 offer a choice of
three games and the user actuates the appropriaté
switch. The signals from these switches are connected
.
to a games,driver 120. Likewise, the skill select
switches 112 enable the user to actuate a switch to
select between a skill level of low, medium or high,
and these signals are sent to a skill driver 122. The
drivers 120,122 are IC components 74HCT175 and are
flip-flops. It will be noted that resistors are
connected to pull up the input signals~ The output
signals D1 to D6 are led back to the CPU 210 of Figure
4B to indicate to the CPU 210 the game and skill
choices made by the user. Further outputs from the
games driver 120 and the skill driver 122 are input to
a lamp driver 124 and together they ensure that there
is only one output possible for the choice of game and
cholce of skilI level. The output driver 124 is an IC
chip ULN 2803A manufactured by Sprague, and a power
:
buffer for the lamp array 126. It is employed here to
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control lamps in the indicator lamp array 126. The
array 126 has a lamp for each of the games 1,2,3 and
each of the skill levels H,~,L (high, medi~m and low).
There is also a "GO" lamp which indicates that the
user has pressed the "G0" button to initiate game
play.
~he "GO" button 128 is actuated by~the user after
setting the game and skill level switches. Until the
"GO"~ button 128 is depressed, the user can alter his
choices. It -will-- be noted that the "G0" switch
toggles between a normally closed and normally open
~; position. It sends a signal to a play latch 130 which
also receives an input from a reset "GO" flag from the
CPU 210 (Figure 4B). The play latch 130 is employed
; to latch the lamp driver 124 to indicate that the "G0"
conditlon~has been initiated. In addition, the play
latch 130 sends a signal to gate 132 from whlch a
further signal is sent to a reset gate 136 which sends
~ an output to reset the score counter. In addition,
the play;;latch 130 sets the "G0 flagl'~at the CPU 210.
In~the CPU 210 the "G0 flag~' signal causes the CPU
unit~210~ to~read the signals D1 to D3 and ascertain
which game has been selected and to read the signals
25~ ~D4~ to D6 and ascertain which skill level has been
selected. The gate 136 keeps the ~core counter reset
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during user selection (i.e. during the period when the
user is selecting his choice of game and his choice of
skill level). The user only presses the GO switch 128
after finalising his selection. There is a further
reset ~echanism 142 which is actuated by a coin
operated mechanism associated with the control unit.
It is envisaged that users/players will pay for the
games through a coin mechanism.
The gate 134 is employed to ensure that the reset gate
.
136 can output a signal to the counter to reset it
when the CPU 210 inputs a signal indicating that the
player should select a game. This supposes that the
player may have ended a game and may be in credit to
play another game. A signal from the CPU 210 "select
game~ then passes through the gate 134 to the reset
gate 136. This signal also passes to the transistor
138 and the indicator 140. The indicator 140 has a
- lamp for each of the selections "game" and "skill" and
these lamps illuminate when the player is required to
select by actuation of the switches 110 and 112 the
game and skill levels required.
In Figure 4CB the circuit for~the LEDs display of the
player's score is schematically illustrated. The LED
display 400 is driven by a display driver 410 which is
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an IC chip ZN1040E manufactured by Ferranti. This is
an up/down counter chip which enables the CPU 210 to
instruct the counter to "add" poi~ts or "deduct"
. - points according to the game program The output
signals of the display driver 410 to LED displays 430
pass via a bank of resistors 412. The resistors 412
are current limiting 75 ohm resistors. These lines
carry the logic information to the LEDs indicating the
numerical value to be displayed. The power for the
LEDs 430 is fed from the display driver 410 via
,
transistors'420 which control the power supply to the
LEDs 430. At the input to the display driver 410
there is an input on a line PL.2 DB13 which is taken
from the CPU 210 of Figure 4B. This signal is the
"PWM" signal which, as discussed above, can be
controlled to vary the parameters of pulse number and
.pulse width for the purposes of driving the LED
dlsplays. The ~'PWM" signal can be set so that a
~strike~ gives the user for example ten points or
; 20 other variations which are determined -by the game
: programs stored in the EPROM 430 o~ Figure 4B.
- .
; ~ The lamp mechanics of the apparatus associated with
: the control unit are shown in Figure 4D for the
25 ~ purpose of showing the operation of the switch means
: 12. The switch means 12 is sho~n as a microswitch
: but it could be another type of switch,
e.~. a reed switch. In the
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lamp 600, a housing 610 is displaceable relative to
the lamp bulb and its holder 620 to actuate the
switch means 12. In an earli~r embodiment, the bulb
itself was displaceable and associa-ted with the
microswitch. In this embodiment, the housing 610
actuates the switch means 12. me switch ~eans 12 has
lines 631,632 and 633. Line 631 carries a '~normall~
closed'~ signal. Line 632 is to earth. Line 633
carries a ~Inormally open~' signal. The lamp bulbs 620
operate at 24 volts a.c. and at a power rating of 21
watts. This requires a driver circuit which will be
described in part with reference to Figure 4E. It
will be noted that the power supply lines 640 go to
the power supply circuit of Figure 4E and that the
line 633 is connected to the memory capacitor supply
circult for capacitor 660. The line 631 is used to set
the status of the lamp 600 at the control circuit of
Figure 4B via an interrupt circuit to be described
with reference to Figure 4F.
Each lamp 600 is associated with a respective power
circuit 690 to be described with reference to Figure
4E. The power circuit of Figure 4E represents one
part of the lamp driver logic of Figure 4G (to be
described). The lines 633 from the swi~ch means 12 o~
Figure 4D are connected to an inpu~ for a power driver
:
~ '
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, " ' ~ " .
.
'3
latch 650. One wire of each lamp is common and
connected to 24 volts a.c. The other wire is
connected to its own triac 670. The input to the power
driver latch 650 i5 associated with a capacitor 660.
S Another input of the power driver 650 is associated
with a latch 680 which is closed by a signal
designated "cap out latch~ signal derived from the '
circuit of Figure 4B as will be further described with
reference to Figure 4G.
An interrupt'circuit 700 will now be described with
reference to Figure 4F. The interrupt circuit takes
the signals on output lines 631 from each of the
switch means 12 and providesan interrupt signalINT1 to
the CPU 210 of Figure 4B in order that the lamps can
be polled as~ to their status. It will be seen that
there is a series of 6 interrupt gates 710 each with
eight inputs for 8 lines 631. It will be readily
appreciated that this corresponds to an array of 48
lamps arranged in 8 columns with 6 lamps in a
column. The inputs on lines 631 arranged in groups of
8 to an interrupt gate 710 are intended to produce an
output signal on line 711 whenever one of the~ lamps
changes state due to the player striking the lamp. The
interrupt gates~ 710 are NOR gates and the IC component
is HC4078. When the switch means 12 of Figure 4D
.
.
- 29 -
changes state due to the lamp being struck by a
player, the line 631 which usually carries the NC
signal (normally closed signal) changes state to an
open state. In consequence, the signal on line 631
goes up to 5 volts and the input on gate 710 goes up
to 5 volts also. Output lines 711 from each of the
gates 710 go to a NAND gate 720. This NAND gate 720 is
an IC component 74LS30 which is operated as a latch
and an inverter. When the output lines 711 go to
ground, then the output 721 of the NAND gate will also
change state. This output line 721 goes to a test
circuit 750 with a lamp 751 that indicates the change
- of state of the line 721. This is especially useful for
diagnostic purposes when engineers are maintaining the
system. The signal on line 721 also goes to a
monostable circuit 730. Monostable circuit 730
comprises an IC circuit HEF4001. This provides an
input to a buffer 740 which is actually an NOR gate of
the IC chip ~EF4001. The buffer 740 provides the
interrupt signal as an input to the CPU 210.
The lamp dr1ver interface circuit 500 will now be
described with reference to Figure 4G.
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- 30 -
An addressable decoder 220 receives the inputs A13 to
A15 which are addresses from the CPU 210. These are
output as signals Y0 to Y7 as shown in Figure 4B. By
way of example, the output Y3 has the value 6000H to
7FFFH. It is input to a demultiplexer 530. The
demultiplexer 530 is an IC chip HCT154. It also
receives signals A8 to A11 from the CPU 210. As can
be seen from the drawing, its outputs Q-R to E-~ are
output to the pulse stretcher 840. Further outputs
are designa~ed game output latch, game input read, and
sound chip enable. An addressable latch 540 comprises
an IC chip HCT259. The latch 540 receives an input
from gate 545. Gate 545 is an IC component HCT32.
This gate receives a write signal from the CPU 210 and
a signal star 16. Further inputs DO and AO, A1, A2
are data and address signals from the bus 212 of the
- CPU 210. ~he addressable latch 540 is central to the
operation of the lamp driver logic circuit. Its
outputs which are identified Ln the drawing control
` 20 the operations of this circuit. Output game select
goes to the interactive user input 100. The "enable
matrlx" signal goes to a zero cross switch which via
the zero cross line 830 ensures switching of the lamps
at the zero crossing point of the power supply. The
output ga~e select DB10 goes to the circuit of Figure
4CA and in particular to the transistor 138 associated
.... , ` 2 3f~
31 -
with the status. indicator 140. Likewise the signal
reset GO flag DB9 goes to the play latch 130 in
Figure 4CA. The signals "input latch", "output
latch", ~flash on/off" and "lamp enable~ are signals
which are employed in the operation of the lamp
driver.
The buffer latch 550 is employed as a buffer between
the CPU 210 with its signals DB1 to DB6 and the "GO"
10 flag signal DB8 to a bus 860 which carries the output
slgnals DO~to D7. The signals DB1 to DB6 as aforesaid
represent the game selected (games 1 to 3) and the
... skill le~el selected (high, medium or low). The "GO"
; flag signal DB8 indicates that the user has initiated
play by pressing the "GO" button 128 of Figure 4CA.
It will be noted that a further input is arranged to
coaple a manual switch for testing the lamps. This is
: internal to the control unit and not accessible ~o the
: : :. normal user.
~:
;20~:
The output slgnals DO to D7 onto the bus 860 are used
: ~ to address an array of driver circuits. It will be
noted that there are -6 identical driver circuits
each driving 8 lamps. Each driver circuit comprises a
logic switch 810, gates 812 and 814 and a latch 820.
In addition, they also comprise the buf~er 650,
. .
,.. ... . . . .
- 32 -
capacitor 660, triac 670 and cap out latch 680
previously described with reference to ~igure 4E.
power supply takes the form of a transformer unit 560
for the power supply to the lamps 610 (of Figure 4D)
as already shown in Figure 4E and as also shown in
this Figure. The power ~ransformer 560 is associated
with a quad opto-coupler 565. This coupler 565 passes
to a Schmidt trigger 570 to clean the pulses of the
power supply. The output of the Schmidt trigger 570
then proceeds to a zero cross switch 580 linked to the
.
zero cross line 830. The zero cross line ensuras (in
known manner) that the lamps are switched on and off
at the zero point of the 24 volt a.c. supply cycle.
It is to be noted that with the lamp 610 operating at
24 volts a.c. and a power rating of 21 watts, then
the peak voltage is 40 volts and it is advantageous to
arrange for zero cross switching. This ensures that
the life span of the lamps is maximised and it also
eliminates the effects of interference which might
:20 otherwlse arise at alternative switching points. The
zero cross enable switch 580 is an IC component
HEF4066 and is a switch which is operated under the
control of signals from the CPU 210 via the
addressable latch 540.
The Schmidt trigger 570 is also linked to an indicator
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array setter 590 which is used to provide an override
signal to the entire array of lamps 610. The input to
the setter 590 for the flash on/off signal is derived
from the flash on/off output of the addressable latch
540. This signal is designed to flash the entire
array of lamps and can be used in a program for a
game, for example to initiate the game or for example
as a reward for achieving a particular target.
The zero cross switch 580 which is an IC component
HEF4066 isl a CMOS logical switch and is addressed by
the address latch 540. Similarly, the rate of
flashing set by the setter 590 is adjustable according
to the signal output from the addressable latch 540.
Turning to the lamp circuits with the logic switches
810, transparent latches 820 and the
previously-mentioned buffers 650, these are arranged
in units each to control 8 lamps. The logic switch
810 acts as a flip-flop in response to the CPU bus
signals DO to D7. The switch 810 is an IC component
74HCT574 which is described as an octal D-type
flip-flop. It has an input via the gate 812 which
cauples a signal from the demultiplexer 530 and a
write signal from the CPU 210. The outputs of the
logic sw.tch 810 are inpu to a transparent latch 820.
- 3~ -
Latch 820 is an IC chip 74HCT573. Its main purpose is
to enable the CPU 210 to poll the lamp array to
ascertain the current status of any of the lamps. An
enable signal for the transparent latch 820 is derived
from the gate 814 which receives a respective input
e.g. E-F ~rom the demultiplexer 530 and also 2 read
signal from the CPU 210. It also receives the "cap
input latch" signal from the addressable latch 540~ As
explained with reference to Figure 4E, the lamp
circuit also comprises the buffer 650 and as already
explained,;this provides the control input to the
triac 670. Likewise, the cap out latch 680 receives
the signal "cap output latch" from the addressable
latch 540.
: At the input to the gate 812 prior to the logic switch
:~ 810, there is the signal'WR. When signal WR i.s low,
it puts a ~true~ signal to the ga~e. This enables the
ou'tputs of the logic switch 810 to go to "highl' or "l"
and charge the capacitor 660. When the player/user
hits a lamp 610 and changes its state, the change is
effected by means of the switch means 12 arranged in
: parallel across the capacitor 660 (s~itch means 12
~: : being shown in the circuit of Figure 4D). The
: : 25 capacitor is then able to discharge and sends a signal
through the buffer 650 to the triac 670. Thus, the
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35 -
capacitor 660 is charged in response to signals from
the CPU 210 and discharged in response to the lamp
being struck by a player and changing the stake of the
switch means 12.
In the lamp circuits the logic switches 810 are
arranged in a firsk bank and they are effective for
turning the lamps on and off in accordance with
signals of the CPU 210 and of coursé in accordance
with a program stored in the EPROM 240 (Figure 4B).
The transparent latches 820 are the means by which the
CPU 210 can poll the circuits to interrogate them and
enquire whether the state of the lamp has been changed
by a player striking the lamp to alter the condition
of switch means 12. The buffers 650 are the means by
which the triacs 670 are switched in response to
signals from the CPU 210 and the switch means 12
respectively. If the program decides that the lamp is
not to be extinguished when the user "strikes" the
respective housing, this is accommodated by the
~cap-out latch~'. By means of the ~cap-out latch"
being set to ~low~ the capacitor can be discharged
without switchlng off the lamp. For this purpose the
cap-out latch is set by a signal 10 from the
addressable latch 540. Then the lamp 610 stays on
after a "strike~.
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- 36 -
The triacs 670 are arranged to drive the lamps 610 at
the zero cross point. The s~itching frequency is
related to the normal power supply cycle (in UK the 50
Hz cycle).
s
The cap out latch 680 is actuated by the respective
signal from the addressable latch 540.
The pulse stretching circuit 840 comprises an IC
74HCT541 which has a technical specification of an
. .
octal driver.; It receives the CPU pulses EF to QR via
the demultiplexer 530. The pulse stretcher 840
extends the duration of pulses from the demultiplexer
530 to 2.5 ms. The purpose of extending the duration
of these pulses is to provide the inputs OEl to OE6
for the series of logic switches 810. Note that each
of the 6 logic switches 8l0 has a separate one of
these inputs OE1 to OE6. The necessity of extending
the pulses is in order to ensure that the pulses are
long enough for the capacitors 660 to charge up, to
trigger the triacs 670. In addition, the pulse
stretcher 840 has an input signal ~lamp enable~ which
again comes from the addressable latch 540.
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- 37 -
The sound processor circuit 300 is illustrated in
Figure 4H. The main component is a sound emulator
310 which comprises an IC chip AY8912 manufactured by
General Instruments which receives input signals D0 to
D7 via the data bus 212 from the CPU 210. It also
receives a signal BCI and a signal BDIR on further
logic inputs from the CPU A0 and Al which have been
gated. The gating takes place in a driver circuit 330
which is an IC chip HCTO2. A further input comes from
I0 a clock generator circuit 320 which is an IC chip
.. . .
4001BE. The clock generator is set to run at a
frequency of 2 MHz onto pin 15 of the sound emulator
310. The sound emulator 310 has 16 registers. The
data input from the CPU 210 determines the sound
emulation signals which are combined and output from
the sound emulator 310. The data input signals are
able to select a register within the emulator 310 and
also to attach a value to that register (by means of
hexadecimal signals). The signals to the driver 330
.
are the write signal W~ from the CPU 210 and the
signal *14 from the decoder 220 on the lamp driver
circuit of Figure 4G. Output channels of the emulator
; 310 take three outputs which are strapped in order to
be connected to an amplifier 340 for mixing. A
control switch 390 enables the apparatus to be
operated without sound if it is actuate~ accordingly.
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- 38
The amplifier 340 is an IC chip LM386 manufactured by
National Semiconductor. Its outpu~ goes to
loudspeaker 350 by way of a Zobel unit 360 which
prevents oscillation. This Zobel unit 360 has a 10
S ohm resistor and a 0.1 capacitor. It is also
associated with a volume control 370. The volume
control 370 is internal to the unit and would n~rmally
be operated by the proprietor. There is also an
internal tuner 380 on the input side of the amplifier
340
The Use of the Apparatus for ~Games n
~j~}~ .
Reference is made to the drawings, particularly
Figures l and 4A.
Initlally, to start a game, a metal token is entered
- into a type S10 coin mechanism which may form part of
the user interactive input 100 (Figure 4A) on a wall
mounted enclosure 40 (Figure 1). A voltage pulse from
thls mechanism is used in the Reset mechanism 260
(Figure 4B) to signal the CPU 210 that a game is about
to start.
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At the present time, one of 3 games (see ~igure 4CA)
is khen selected at one of 3 skill levels namely low,
medium or high by way of depressing front panel
buttons/switches on the control box 40 (Fiyure 1). As
the button is depressed, it lights up to indicate the
selection (see array 126 in Figure 4CA). During this
~input stage~, the player may change his mind at any
time by choosing a different game and skill level in
which case the appropriate game and skill lamp in
array 126 will be illuminated. Also, at this skage
(and indeed at any time even during play) there is a
SOUND ONjoFF button which may be toggled on/off as
desired. After making a selection, the user actuates
a GO switch 128 (Figure 4CA). At this stage, it is
not possible to change the selected game. If a player
inserts the token and for some reason, say in error,
tries to select the "GO" switch- 128 without first
selecting a game and skill level, then the control
electronics will detect this condition and wait for a
valid entry to be made.
Presently all games software is written in both
"Control Basic" high level computer language and
machine code (where speed is important) and runs on
the INTEL 8052AH type microprocessor chip (CPU 210).
.
- 40 -
When the CPU 210 detects a "GO" condition, loglcal
instructions are sent to the programmable sound
processor circuit 300 (Figur~ 4H) to play a suitable
introduction to the selected game. The low level
output is amplified by an integrated circuit chlp 340
and fed to two 3 Watt extension speakers 350, one at
- each side of the array of target members 10.
- Currently the volume level is preixed internally of
the control unit 40 (Figure 1) by the volume control
370 (Figure 4H). Presently the musical "INTRO" is
simply a "COUNT-DOWN" type of musical introduction.
In essence, the object of all the games played with
the apparatus is to keep fit and at the same time to
have enjoyment in the process. The game programs
stored in the memory 240 (Figure 4B) control all
aspects of play. Any program may be written such that
an infinite number of game sequences is possible
depending on what is actually required. The four
games detailed here, therefore, are only
representative of the large number possible.
.
Game 1 - nRANDOM FIVE'
In this game the CPU 210 will light up 5 lamps 620 of
2 ~
- 41 -
Figure 4D at random, each larnp 620 being associated
with a target member l0 of the array of Figure l.
These 5 lamps 620 illuminate at selected locations on
the array as separate entities. As the 5 lamps 620
light up, the CPU 210 instructs the sound processor
circuit 300 (Figure 4H) to produce a "LAMPS-ON BLIP"
for the awareness of the player. The player now has a
fixed length of time to extinguish all the illuminated
lamps 620 one after another with the playing member
30. The length of time available .is programmable. It
is directly related to ~SKILL LEVEL~ switches 112 of
Figure 4CA on the control box 40. The ~low~, "medium"
and ~high~ skill level times would be l5, l0 and 5
seconds respectively. The lamps 620 may be
15 ; extinguished by contacting the housing 14 of the
target member l0 with the playing member 30. This
action activates the switch means~12 whose
actua~t1on is used to put the lamp 620 out (as
~ described with reference to Figure 4D). As the player
? 20 hits each housing 14, an audible ~HIT" instruction
is sent to the sound processor c~ircuit 300 and hence
through the~amplifier to the speakers 350; also a
"SCORE" of~say l0 points is registered on the display
~ ~00 (Figure~4CB). Failure to extinguish all the lamps
25~ 610 in the~allotted time period results in the CPU 210
generating a signal to the sound processor circuit 300
`:
- ` 2 '~ ?"r3 ~'J ~j '3
- ~2 -
to cause a low pitched "FAILURE" sound to be
generated. Success in terms of the player striking
all the required housings 14 in the available time
gives rise to a mini ~FANFARE~ sound. A further
sequence of 5 lamps 620 illuminated at random is then
repeated with the same timing. The game length is
predetermined for 5 minutes play. At the conclusion
of the game, a printout of the scores may be made
available to the player by means of the addition of a
printer (not shown).
Game 2 - ~ONE OF A KIND~
This game relies on the player exercising at his or
her own pace. The CPU 210 first causes one lamp 610
selected at random to be illuminated. The player -is
required to strike the associated housing 14 of the
respective target member 10 to record a ~HIT~ and to
register "SCORE" as mentioned above. The ~HIT~ causes
the associated switch means 12 to turn off the lamp
620. The CPU 210 then causes another lamp 610 to be
illuminated at random. Again, this lamp 620 will
remain illuminated until the player strikes the
associated target member 10. By proceeding in this
way over a game period of say 5 minutes, it is obvious
that the faster the player moves the more lamps 620
~ 2 ~ ~ ~3 ~!^3 !~3
- 43 -
are extinguished in the playing time. The ~kill level
may include a provision to determine how far the
illuminated lamp 620 will be apart thereby making more
stretching necessary for the more experienced player.
The final score reflects how fast the player has gone.
Each time the game is played an improvement can be
achieved up to some maximum fitness level for the
particular player based on e.g. age, height, weight.
Game 3 - "RANDO~ WALR n
The game starts with ~he CPU 210 causing a "SNAKE" of
lamps 620 to illuminate so that at any time up to S
lamps are illuminated in the array of target members
10 of Figure 1. The "SNAKE" progresses at random
around the array in a snake-like fashion. The player
proceeds by extinguishing any part of the snake and
scores high or low points according to which part is
hit. The sound effects and game time follow a similar
pattern to those described earlier and the skill level
determines how fast the snake moves.
Game 4 - ~AYOCALY~S~ 1~
- 44 -
This game is the most difficult to play. In essence,
the object of this game is to prevent destruction of
home territory by preventing the line of lamps 620
associated with the bottom row of the target members
10 in the array of Figure 1, from ever lighting up.
The CPU 210 lights lamps 620 down each column of the
array at random one after the other in an attempt to
illuminate the bottom lamp 620 in any respective
column. More than one column is progressing at any
one time, so the player is kept activ~ all the time.
The object~is for the player to extinguish the leading
lamp 620 in any column to prevent the bottom lamp 620
from lighting up. Points are scored for each
successful "HIT~' and appropriate sounds are emitted.
If the CPU 210 succeeds in lighting a bottom row lamp
620 associated with the bottom row of target members
10, then several things happen. Firstly, the game
program interrupts play and the whole array of lamps
610 of the target members 10 illuminate and begin to
flash. After suitable sound effects, an explosive
sound is heard from the loudspeaker 350. Points are
then deducted from the player's total score at the
display 400 tFigure 4CB). Then the game continues.
The skill level determines how fast the ~missiles"
progress down each column.
.
2 ~
~ ~5
It is to be appreciated -that the embodiment
of the invention described above with reference to the
accompanying drawings has been given by way of example
only and that modifications may be effected Thus,
for example, the physical exercise apparatus may ~e
provided with a speech facility. The physical exercise
apparatus may also be provided with printout means ~or
printing out games results or other information relating
to the use of the physical exercise apparatus and/or
results obtained from the physical exercise apparatus
The physical exercise apparatus shown in the
drawings is of a type for-mounting-on a wall or other
support surface. If desired however the physical exercise
apparatus may be in the form of free standing equipment.
~ It was mentioned above that the control apparatus
40 includes a switching circuit operable to switch in
sequence~individual tar8et members or groups of target
members 10 from the first condition to the second condition
in accordance with a game selection, games being stored
ln a memory associated with a programmable unit in the
control apparatus. As an alternative but more usually in
addition, the physical exercise apparatus may have input
means by which a game from an e~ternal memory cartridge
can be nput into the apparatus Thus, for example, as
; 25 shown in Figure 4A, there may be provided a separate plug
~ in devlce 101 ~or an external memory games cartridge. As
: :
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an al-ternative to using the above mentioned user
responsive means to set user selectable durations of
play, a separate games cartridge containing three
games for example may be plugged into the control
apparatus 40. Where a games cartridge is employed,
the memory in the cartridge may be updated automatically
by a microprocessor i~ desired. The EPROM memory 240
could be provided in the games cartridge. Instead of
storing programmes in the EPROM 240, they may be
transferred to the games cartridge. Thus, for example,
during operation, the control unit may activate a
- - programme in ,the EPROM 240 or in the games cartridge,in order to enable the user to make selections at the
interactive input 100. In the above described embodiment
of "selecting a skill leveli', the programme initially
operated by the ~PROM 240 or a games cartridge, may
- enable the user to make the required choice. It will
thus be apparent that various games programmes can be
stored in the EPROM240 and/or in a games cartridge.
Where a games cartridge is employed, this will obviously
need to be inserted into the control unit case initially
at the start of a game, for example just before or just
after the metal token is entered into the type S10 coin
mechanism.
It was mentioned above that depending upon the
el-ctFonic oircuitry, the count display may be a running
- - 2 ~ X ~ J ~
total which changes progressively during the user
session or a ~inal total displayed at the end of the
session, Alternatively, i~ desired, two displays m~y
be used for two players, mounted separately on a
gantry part of the physical exercise apparatus i-tsel~.
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