Note: Descriptions are shown in the official language in which they were submitted.
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PROTECTION CIRCUIT FOR MULTIPLE
PHASE POWER SYSTEM
BACKG~OUND OF THE INVENTIQN
When electric motors are used within three-phase
power distribution systems, the motor can become over-
heated upon the occurrence of a condition commonly
known as "single-phasing~'. The single-phasing occurs
when a fuse in one phase operates to isolate the phase
or the wiring within one of the phases becomes other-
wise disconnected. The remaining two phases continue
to feed the motor causing the motor to overheat.
Although the circuit current increases during the
overheating conditions, most circuit interruption
devices are not sufficiently sensitive to respond to
the increased current resulting in eventual damage to
the motor.
Most devices employed to interrupt circuit current
upon the occasion of a single-phasing condition require
separate sensing devices to measure the voltage across
a set of fuses or to measure the current imbalance
within the motor itself.
U.S. Patent 4,06Q,843 discloses separate sensing
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means coupled to three-phase power lines for determin-
ing the occurrence of single-phasing. U.S. Patent
4,0~1,703 describes the use of a DC ripple detecting
device capable oE being utili~ed on a tllree-phase air-
cuit to detect phase imbalance. U.S. Patent ~,837,654
teaches the use of signal amplifying transistors con-
nected in a serial amplification configuration to
detect single-phasing.
One purpose of the instant invention is to describe
a circuit capable of detecting both phase loss and
phase imbalance without requiring separate sensing
devices apart from tha current transfoxmers used within
electronic overcurrent circuit interrupt'on devices.
SUMMARY OF THE INVENTION
The invention comprises a phase loss and phase
imbalance detection circuit employing a plurality of
ground referenced operational amplifiers connected with
current transformers to provide a trip signal output
when the phase loss or phase imbalance is detected.
The operational amplifiers are arranged in accordance
with a pairwise comparison algorithm and can be used
independently from or in combination with standard
electronic overcurrent circuit interruption devices.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a diagrammatic representation of a
combined overcurrent, phase imbalance and phase loss
protection circuit according to the invention;
Figure 2 is a diagrammatic representation of a
simplified circuit for detecting phase imbalance and
phase loss; and
Figure 3 is a schematic representation of a circuit
,
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interruption circuit including an add-on modular phase
loss and phase i~balance accessory in accordance with
an alternative embodiment of the circuit of Figure 1.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An integrated protection circuit 9 is shown in
Figure 1 and includes a phase loss and imbalance detec-
tion circuit lo connected with a power supply and trip
circuit 11 and with a signal conditioniny clrcuit 12.
The signal conditioning circuit is connected with a
- three-phase power system, one conductor of which is
represented at 13, by means of a current transformer 14
that includes a primary winding 15, core 16, and sec-
ondary winding 17. There are three such phase conduc-
tors and current transformers although only one phase
conductor is shown herein for purposes of illustration.
The secondary winding is connected with a bridge recti-
fier 18 consisting of diodes D1-D4 and from there to a
burden resistor R1 to generate a DC voltage propor-
tional to the current through the first phase conduc-
tor. Similar bridge rectifiers 19, 20 and diodes
Ds-D12 connect with separate burden resistors R2 and
R3 and diode D13 to provide a voltage indication of the
current through the remaining two phase conductors (not
shown). The voltage generated across the burden resis-
tors is transmitted to the power supply and trip cir-
cuit 11 over conductors 21-23. The trip circuit is
similar to that described within V.S. Patent 4,589,052
entitled "Digital I2T Pickup, Time bands and Timing
Control Circuits for Static Trip Circuit Breakers",
which Patent is incorporated herein for purposes of
reference. Upon the occurrence of an overcurrent con-
dition in any of the three-phase conductors, a trip
signal is generated and the circuit is interrupted in
accordance with the teachings of the aforementioned
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~nited states Patent. The voltage generated across the
burden resistors is also applied to the inputs of three
operational amplifiers 24-26 in the following manner.
The voltage generated across R1 is applisd to the
negative input terminal of amplifier 24 through resis-
tor R4 and directly to the positive input terminal of
amplifier 26. The voltage appearing across R2 is
directly applied to the positive input terminal of am-
plifier 24 and to the negative input terminal of
amplifier 25 through resistor Rs. The voltage
appearing across R3 is directly applied to the positive
input terminal of amplifier 25 and to the negative
input terminal of amplifier 26 through resistor R6.
The other side of resistors Rl-R3 is connected with the
power supply and trip circuit 11 as well as with sys-
tems ground. Integration capacitors C1-C3 are
respectively connected across the negative inputs of
the operational amplifiers 24-26 and their outputs as
indicated. The negative input to operatlonal amplifier
24 is connected through resistor R7 and R8 to the
negative input of operational amplifier 25 and through
- resistor Rg to the negative input of operational
amplifier 26. The negative inputs of tLe three ampli-
fiers are commonly connected to one stage of a voltage
divider consisting of resistors R11-R13 by means of
conductor 29. The outputs of the three operational
amplifiers are connected in common through diodes
D14-D16 and conductor 30 to the positive input terminal
of a comparator 27 and commonly connected to ground
through resistor Rlo. The negative input to comparator
27 is connected to a second stage of the voltage di-
vider Rll-R13 to provide a threshold comparison voltage
to the comparator. A resistor R14 is connected between
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the positive input to the comparator and the comparator
output which connects over conductor 28 to the power supp~y
and trip circuit 11 to provide a trip si~nal thereto upon
the occurrence of a phase loss on phase imbalance conditios.
Phase i~Dbalance and phase loss are determined within
phase imbalance and the phase loss circuit lo by means of
the followinq simple pairwise comparison algorithm:
PhLoss/Imbalance = B < (A-K) or A < (C-~) or C < (B-K)
where A, B and C are the three phase
currents and
K is minimum imbalance level, or
threshold.
The phase currents A, B, C are represented by the
voltages generated across burden resistors Rl, R2 and
R3 described earlier with respect to the signal condi-
tioning circuit 12. The K factor in the expression for
the phase loss algorithm constitutes a setpoint or
threshold to prevent spurious and nuisance tripping
caused by harmonic variations of a temporary nature
unless the imbalance exceeds the setpoint by ten per-
cent, for example. The current in phase B is compared
to the current in phase A within the operational
amplifier 24 such that the result of the comparison is
directed over line 30 to the positive input to compara-
tor 27 which is compared to the threshold value applied
to the negative input by the second stage of the volt-
age divider. In the event that the current in phase B
is less than that of phase A by the amount of the
threshold value K, a trip signal is generated at the
output of the comparator and operates the trip circuit
via conductor 28. The current in phase C is compared
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to the current in phase B within operational amplifier
2S and when the current in phase C is less than that of
phase B, a similar trip signal is generated. The
current in phase A is compared to the current in phase
C within operational amplifier 26 and a similar trip
signal is outputted when the currellt in phase A is less
than that of phase C.
A detailed arrangement of the phase loss and phase
imbalance circuit 32 is depicted in Figure 2 wherein a
threshold voltage is applied at Tl and the voltage
representing phase A is applied at T2 with the voltage
representing phase B applied to T3. In this arrange-
ment the K factor which represents a setpoint or
threshold voltage value is applied at the negative
input to the ground-referenced operational amplifier
33, configured as an integrator, with the integrating
capacitor C1 connecting between the output and the
negative input terminal. Resistor Rl represents the
voltage value of the K factor whereas the combination
of the integrating capacitor Cl, less the voltage
developed across the input resistor R2, sets the level
of imbalance and the short time integration respec-
tively. If desired, both the integratina capacitor and
the input resistor can be made variable to set the
values over a wide range of operating conditions. RMS
or peak detection could also be used to determine the
comparison rather than the averaging method determined
by means of the operational amplifier 33. In the event
that phase A and phase ~ currents are equal in ampli-
tude, the average siynal into the operational amplifier
is zero, and the K factor assures a net negative input
to the operational amplifier such that the output to
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the diode Dl remains at ground value vi~ resistor R3.
When the net voltage value of phase A exceeds the
average of the phase B voltage plus the K factor, the
output ramps in the positive direction and provides an
input to the second comparator 34 where it is compared
to a four volt reference supplied to the negative
terminal. If it exceeds the four volt reference
voltage, a trip signal is outputted onto ~he trip line
28.
A combined overcurrent protection, phase loss and
phase imbalance circuit 59 is depicted in Figure 3
wherein the phase loss and phase i~alance circuit 48
comprises a stand-alone module which is plugged into
the signal conditioning and power supply circuit 45 and
the overcurrent trip circuit 50. The signal condi-
tioning and power supply circuit 45 as ~ell as the trip
circuit 50 are all included within ~he circuit breaker
trip unit described in U.S. Patent 4,754,247 entitled
"Molded Case Circuit Breaker Accessory Enclosure",
which Patent is incorporated herein for purposes of
reference. In the circuit breaker described in this
Patent, the trip unit 60 and the actuator 57 are
arranged within the circuit breaker case and are acces-
sible through an accessory cover. It is contemplated
that the phase loss and phase imbalance circuit 48
could be arranged in a separate recess within the
circuit breaker cover and provided as an add-on acces-
sory. In this arrangement, the three phases of a
three-phase power circuit comprising conductors 36, 37
and 38 are protected by means of the circuit breaker
contacts represented as switches Sl-S3 within each of
the separate phases. Current transformers 39-41 con
nect with the signal conditioning and power supply 45
.
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over conductors 42-44 to provide signals to the trip
circuit 50 over conductors 51, 52 for overcurrent
determination. The same representative voltage signals
are inputted to the phase loss and phase imbalance
circuit 48 over conductors 46 and 47. ~1hen a phase
loss or imbalance condition is ascertained, an output
signal is provided to the trip circuit 'i0 over
conductor 49. The output of the overcurrent
determination from the trip circuit is inputted over
conductor 53 to OR GATE 55. The output from the trip
unit relative to the presence of a phase loss or phase
imbalance condition is inputted to the OR GATE over
conductor 5~. Upon the occurrence of either an
overcurrent condition or a phase loss or a phase
imbalance condition, a trip signal is applied over
conductor 55 to the actuator unit 57. The actuator
then interrupts the curren~ through all three conduc-
tors 36-38 by means of the operative connection between
the actuator and switches Sl-S3 as indicated by the
control line 5B.
A simple phase loss and phase imbalance circuit has
herein been described as a stand-alone circuit, an
integral part of an overcurrent protection circuit as
well as in the form of an add-on accessory to existing
circuit breakers. The phase loss and phase imbalance
circuit implements an algorithm that determines the
occurrence of a phase lcss or phase imbalance condition
and outputs a trip signal to interrupt all three phases
of a protected three-phase power supply.
