BINARY PHASE SHIFT KEYING MODULATION SYSTEM AND/OR FREQUENCY MULTIPLIER

SYSTEME DE MODULATION POUR DEPLACEMENT BINAIRE DE PHASE ET/OU MULTIPLICATEUR DE FREQUENCE

English Abstract

A low cost spread spectrum modulator for BPSK, or Binary
Phase Shift Keying capable of outputting the high modulation
rate and suppressed carrier output needed in spread spectrum
systems. The present invention provides high quality BPSK
modulation without the double balance mixers as required in
the prior art, thereby dispensing with the necessity of
complex transistor/potonciometer or diode/transformer
arrangements. The present invention provides BPSK modulation
utilizing only one transformer, which can be adjusted for
carrier suppression and two transistors, FET's, or digital
logic gates or the like, allowing the present system to be
driven from low power CMOS logic levels, yet producing eight
db of gain. The present invention may also be utilized as a
frequency multiplier, with the utilization of the appropriately
high frequency transistor, FET, digital logic gate, or
the like.

Claims

The embodiments of the invention in which an
exclusive property or privilege is claimed are defined as
follows:

1. A BPSK Modulator circuit, comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an
output leg, second induction means having first and second
leg outputs, said transformer configured such that said
first and second leg outputs of said second induction means
modulates at opposite phases of 180 and 0 degrees, forming
"MOD +" and "MOD -", respectively, relative a carrier
signal supplied to said carrier input of said first
induction means;
first and second phase selection means configured to
modulate via input of said first and second outputs of said
second induction means, said first and second phase
selection means further comprising first and second load
transistors or their equivalent, respectively, each having
an emitter, and a base or the equivalent, said base of said
first transistor in circuit with said first output of said
second inductor, receiving said "MOD +" , said base of said
second transistor in circuit with said second output of
said second inductor, receiving said "MOD -".
2. A BPSK Modulator circuit having a tunable slug or
core to adjust carrier suppression in a spread spectrum
system, comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an
output leg, second induction means having first and second
leg outputs, and a tunable slug or core in communication
with said first and second induction means, said
transformer configured such that said first and second leg
outputs of said second induction means modulates at
opposite phases of 180 and 0 degrees, forming "MOD +" and
"MOD -", respectively, relative a carrier signal supplied
to said carrier input of said first induction means;




first and second phase selection means configured to
modulate via input of said first and second leg outputs of
said second induction means, said first and second phase
selection means further comprising first and second load
transistors, respectively, each having an emitter, a
collector, and a base, said base of said first transistor
in circuit with said first output leg of said second
inductor, receiving said "MOD +", said base of said second
transistor in circuit with said second output leg of said
second inductor, receiving said "MOD -".

3. A BPSK Modulator circuit utilizing a loosely coupled
transformer to adjust carrier suppression in a spread
spectrum system, comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an
output leg, second induction means loosely coupled with
said first induction means, said second induction means
having first and second leg output, said transformer
configured such that said first and second leg outputs of
said second induction means modulates at opposite phases of
180 and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative a carrier signal supplied to said
carrier input of said first induction means;
first and second capacitors, said first capacitor in
parallel circuit with said carrier input leg and grounded
output leg of said first induction means, said second
capacitor in parallel circuit with said first and second
leg outputs of said second induction means, first and
second phase selection means configured to modulate via
input of said first and second outputs of said second
induction means, said first and second phase selection
means further comprising first and second load transistors,
respectively, each having an emitter, a collector, and a
base, said base of said first transistor in serial circuit
with said first leg output of said second inductor,
receiving said "MOD +", said base of said second transistor


in serial circuit with said second leg output of said
second inductor, receiving said "MOD -".

4. The BPSK Modulation System of claim 3, wherein there
is further included a tunable slug or core in communication
with said first and second inductors.

5. The BPSK Modulation System of claim 4, wherein there
is further included resonator capacitor means in parallel
circuit with said first and said second leg outputs of said
second induction means, said resonator capacitor
transformer coupling means configured to provide band pass
filtering for previous stage harmonic suppression.

6. A BPSK Modulator circuit having a tightly coupled
transformer having no center tap and a single parallel
resonate capacitor on the secondary to provide BPSK
modulation, comprising:
a transformer, said transformer further
comprising first induction means having a carrier input leg
and an output leg, second induction means tightly coupled
to said first induction means, said second induction means
having first and second leg outputs, said transformer
configured such that said first and second leg outputs of
said second induction means modulates at opposite phases of
180 and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative a carrier signal supplied to said
carrier input of said first induction means;
band pass filter means for filtering harmonic
suppression from said transformer, said band pass filter
means further comprising a resonate capacitor in parallel
circuit with said first and second leg outputs of said
second induction means;
first and second phase selection means configured to
modulate via input of said first and second outputs of said
second induction means, said first and second phase
selection means further comprising first and second load




transistors, respectively, each having an emitter, a
collector, and a base, said base of said first transistor
in circuit with said first leg output of said second
inductor, receiving said "MOD +", said base of said second
transistor in circuit with said second output of said
second inductor, receiving said "MOD -".

7. The BPSK Modulation System of claim 6, wherein said
system further comprises adjustment means for adjusting
carrier suppression, said adjustment means further
comprising a tunable slug or core in communication with
said first and second induction means.

8. The BPSK Modulation System of claim 6, wherein there
is further included resonator capacitor means in parallel
circuit with said first and said second leg outputs of said
second induction means, said resonator capacitor means
configured to provide band pass filtering for previous
stage harmonic suppression.

9. The BPSK modulation System as set forth in claim 3,
further including a fixed transformer and a variable tuning
capacitor, said fixed transformer in communication with
said first and second induction means.

10. The BPSK modulation system as set forth in claim 6,
further comprising adjustment means for adjusting carrier
suppression, said adjustment means including a fixed
transformer and a variable tuning capacitor, said fixed
transformer in communication with said first and second
induction means.

11. A frequency multiplier circuit utilizing a loosely
coupled transformer to adjust carrier suppression,
comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an




output leg, second induction means loosely coupled with
said first induction means, said second induction means
having first and second leg output, said transformer
configured such that said first and second leg outputs of
said second induction means modulates at opposite phases of
180 and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative a carrier signal supplied to said
carrier input of said first induction means;
first and second capacitors, said first capacitor in
parallel circuit with said carrier input leg and grounded
output leg of said first induction means, said second
capacitor in parallel circuit with said first and second
leg outputs of said second induction means,
phase selection means configured to modulate via
input of said first and second outputs of said second
induction means, said phase selection means having a F t > 1
GHz, and further comprising an emitter, and first and
second bases or the equivalent, said first base in circuit
with said first output of said second inductor, receiving
said "MOD +", said second base in circuit with said second
output of said second inductor, receiving said "MOD -".

12. A frequency multiplier circuit, comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an
output leg, second induction means having first and second
leg outputs, said transformer configured such that said
first and second leg outputs of said second induction means
modulate at opposite phases of 180 degrees and 0 degrees,
forming "MOD +" and "MOD -", respectively, relative to a
carrier signal supplied to said carrier input of said first
induction means; and
phase selection means configured to modulate via
input of said first and second outputs of said second
induction means, said phase selection means having a F t > 1
GHz, and further comprising an emitter, and first and
second bases or the equivalent, said first base in circuit



with said first leg output of said second induction means,
receiving said "MOD +", said second base in circuit with
said second leg output of said second induction means,
receiving said "MOD -".

13. A frequency multiplier circuit utilizing a loosely
coupled transformer to adjust carrier suppression,
comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an
output leg, second induction means loosely coupled with
said first induction means, said second induction means
having first and second leg outputs, said transformer
configured such that said first and second leg outputs of
said second induction means modulate at opposite phases of
180 degrees and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative to a carrier signal supplied to said
carrier input of said first induction means;
first and second capacitors, said first capacitor in
parallel circuit with said first and second leg outputs of
said second induction means; and
phase selection means configured to modulate via
input of said first and second outputs of said second
induction. means, said phase selection means having a F t > 1
GHz, and further comprising an emitter, and first and
second bases or the equivalent, said first base in circuit
with said first output of said second induction means,
receiving said "MOD +", said second base in circuit with
said second output of said second induction means,
receiving said "MOD -".

14. A BPSK Modulator circuit having a fixed transformer
and a variable tuning capacitor, the fixed transformer and
variable tuning capacitor to adjust carrier suppression in
a spread spectrum system, comprising:
a transformer, said transformer further comprising
first induction means having a carrier input leg and an




output leg, second induction means having first and second
leg outputs, a fixed transformer, and a variable tuning
capacitor, the fixed transformer in communication with said
first and second induction means, said transformer
configured such that said first and second leg outputs of
said second induction means modulate at opposite phases of
180 degrees and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative to a carrier signal supplied to said
carrier input of said first induction means; and
first and second phase selection means configured to
modulate via input of said first and second outputs of said
second induction means, said first and second phase
selection means further comprising first and second load
transistors, respectively, each having an emitter, a
collector, and a base, said base of said first transistor
in circuit with said first output leg of said second
induction means, receiving said "MOD +", said base of said
second transistor in circuit with said second output of
said second induction means, receiving said "MOD -".

15. The method of modulating a carrier between a 0
degree phase shift and a 180 degree phase shift, comprising
the following steps:
a. providing a transformer, said transformer
further comprising first induction means having a carrier
input leg and an output leg, and second induction means
having first and second leg outputs, and a tunable slug or
core in communication with said first and second induction
means;
b. tuning said slug or core such that said first
and second leg outputs of said second induction means
modulates at opposite phases of 180 and 0 degrees, forming
"MOD +" and "MOD -", respectively, relative a carrier
signal supplied to said carrier input of said first
induction means;
c. providing first and second phase selection means
configured to modulate via input of said first and second




leg outputs of said second induction means, said first and
second phase selection means further comprising first and
second load transistors, respectively, each having an
emitter, a collector, and a base;
d. configuring said base of said first transistor
in circuit with said first output leg of said second
inductor, receiving said "MOD +", said base of said second
transistor in circuit with said second output leg of said
second inductor, receiving said "MOD -".

16. The method of utilizing a loosely coupled
transformer to adjust carrier suppression, modulating a
carrier signal between a 0 degree phase shift and a 180
degree phase shift, comprising the following steps:
a. providing a transformer, said transformer
further comprising an inductor having first induction means
having a carrier input leg, an output leg, and windings,
and second induction means having first and second leg
outputs and windings;
b. coupling said windings of said first and second
induction means to a >0.6 and <0.3 coupling coefficient;
c. modulating said inductor at opposite phases of
180 and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative a carrier signal supplied to said
carrier input of said first induction means;
d. providing first and second phase selection means
configured to modulate via input of said first and second
leg outputs of said second induction means, said first and
second phase selection means further comprising first and
second load transistors, respectively, each having an
emitter, a collector, and a base;
e. configuring said base of said first transistor
in circuit with said first output leg of said second
inductor, receiving said "MOD +", said base of said second
transistor in circuit with said second output leg of said
second inductor, receiving said "MOD -".




17. The method of claim 16, wherein there is included
the further step of providing first and second capacitors,
said first capacitor in parallel circuit with said carrier
input leg and grounded output leg of said first induction
means, said second capacitor in parallel circuit with said
first and second leg outputs of said second induction
means.

18. The method of multiplying a carrier to provide a
higher frequency harmonic, comprising the following steps:
a. providing a transformer, said transformer
further comprising first induction means having a carrier
input leg and an output leg, and second induction means
having first and second leg outputs, and a tunable slug or
core in communication with said first and second induction
means;
b. tuning said slug or core such that said first
and second leg outputs of said second induction means
modulates at opposite phases of 180 and 0 degrees, forming
"MOD +" and "MOD -", respectively, relative a carrier
signal supplied to said carrier input of said first
induction means;
c. providing phase selection means configured to
modulate via input of said first and second outputs of said
second induction means, said phase selection means having a
F t > 1 GHz, and further comprising an emitter, and first
and second bases or the equivalent, said first base in
circuit with said first output of said second inductor,
receiving said "MOD +", said second base in circuit with
said second output of said second inductor, receiving said
"MOD -"; and
d. configuring said first base in circuit with said
first output leg of said second inductor, receiving said
"MOD +", and said second base in circuit with said second
output leg of said second inductor, receiving said "MOD -",
multiplying the carrier to provide a higher frequency
harmonic.




19. The method of utilizing a loosely coupled
transformer to adjust carrier suppression, modulating
a carrier signal between a 0 degree phase shift and a
180 degree phase shift, and multiplying a carrier to
provide a higher frequency harmonic, comprising the
following steps:
a. providing a transformer, said
transformer further comprising an inductor having
first induction means having a carrier input leg, an
output leg, and windings, and second induction means
having first and second leg outputs and windings;
b. coupling said windings of said first
and second induction means to a >0.6 and <0.3
coupling coefficient;
c. modulating said inductor at opposite
phases of 180 degrees and 0 degrees, forming "MOD +"
and "MOD -", respectively, relative to a carrier
signal supplied to said carrier input of said first
induction means;
d. providing phase selection means
configured to modulate via input of said first and
second outputs of said second induction means, said
phase selection means having a F t > 1 GHz, and
further comprising an emitter, and first and second
bases or the equivalent, said first base in circuit
with said first output of said second inductor,
receiving said "MOD +", said second base in circuit
with said second output of said second inductor,
receiving said "MOD -".
e. configuring said first base in circuit
with said first output leg of said second inductor,
receiving said "MOD +", and said second base in
circuit with said second output leg of said second
inductor, receiving said "MOD -", multiplying the
carrier to provide a higher frequency harmonic.




20. The method of claim 19, wherein there is
included the further step of providing first and
second capacitors, said first capacitor in parallel
circuit with said carrier input leg and grounded
output leg of said first induction




means, said second capacity in parallel circuit with said
first and second leg outputs of said second induction
means.

21. The method of multiplying a carrier to provide a
higher frequency harmonic, comprising the following steps:
a. providing a fixed transformer, said
transformer further comprising first induction means having
a carrier input leg and an output leg, and second induction
means having first and second leg outputs, and a variable
tuning capacitor, said fixed transformer in communication
with said first and second induction means:
b. tuning fixed transformer and variable tuning
capacitor such that said first and second leg outputs of
said second induction means modulates at opposite phases
of 180 degrees and 0 degrees, forming "MOD +" and "MOD -",
respectively, relative a carrier signal supplied to said
carrier input of said first induction means:
c. providing phase selection means configured to
modulate via input of said first and second outputs of said
second induction means, said phase selection means having a
F t > 1 GHz, and further comprising an emitter, and first
and second bases or the equivalent, said first base in
circuit with said first output of said second induction
means, receiving said "MOD +", said second base in circuit
with said second output of said second induction means,
receiving said "MOD -"; and
d. configuring said first base in circuit with said
first output leg of said second induction means, receiving
said "MOD +", and said second base in circuit with said
second output leg of said second induction means, receiving
said "MOD -", multiplying the carrier to provide a higher
frequency harmonic.




22. A method for modulating a carrier frequency signal
by using a transformer to produce a zero degree phase shift
and a 180 degree phase shift of the carrier frequency
signal, said method comprising the steps of:
selectively enabling a zero degree input leg of the
transformer in response to a first binary phase shift
keying (BPSK) signal;
selectively enabling 180 degree input leg of the
transformer in response to a second BPSK signal; and
supplying a carrier signal to the transformer via
said zero degree input leg and said 180 degree input leg,
wherein the zero degree input leg and the 180 degree input
leg are alternately selected by said first and second BPSK
signals to produce BPSK modulation of said carrier
frequency signal at an output of the transformer.

23. The method according to claim 22, wherein the steps
of selectively enabling each include a step of:
biasing a selection means into a linear region of
operation.

24. The method according to claim 22, wherein each of
the steps of selectively enabling each produce a harmonic
of the carrier frequency signal.

25. The method according to claim 24, wherein the steps
of selectively enabling each include a step of:
biasing a selection means to produce a predetermined
harmonic.

26. The method according to claim 22, further comprising
the step of tuning the transformer to a predetermined
output carrier frequency.




27. The method according to claim 26, wherein said step
of tuning is performed using at least one of a capacitor on
a primary winding of the transformer and a capacitor on a
secondary winding of the transformer.

28. The method according to claim 22, further comprising
the step of:
amplifying the carrier frequency signal within each
of said zero degree input leg and said 180 degree input
leg.

29. The method according to claim 22, further comprising
the step of:
loosely coupling and tuning the transformer to a
predetermined output carrier frequency.

30. The method according to claim 22, further comprising
the steg of:
amplifying the selectively enabled carrier signal.

31. The method according to claim 22, wherein the
selection means is enabled to source or sink current.

32. The method according to claim 22, wherein the zero
degree input leg and the 180° input leg are included in a
primary winding of the transformer, said primary winding
having a center tap leg.

33. The method according to claim 22, wherein the steps
of selectively enabling each include a step of:
biasing a selection means into a non-linear region
of operation.

Description

~~~~~~'~3
BACKGROUND of INVENTION
1. Field of Invention
The present invention relates to modulators, and more
particularly to an improved spread spectrum BPSK, or Binary
Phase Shift Keying, Modulation system designed for providing
gain, low cost and suppressed carrier output, as well as
compatibility with CMOS low power logic modulation drive
circuitry. The present invention also teaches a Frequency
Multiplier circuit, which is much less costly than tradition-
al designs currently known.
The present system teaches a new, superior, and less
costly BPSK modulator and/or frequency multiplier than that
contemplated by the prior art, providing a less complicated
system while outputting increased gain over prior art
modulators.
2. Prior Art & General Background
Previous spread spectrum BPSK modulators required
conventional balance mixers to produce carrier suppression.
These conventional modulators utilized either 1) a complex
transistor array in conjunction with a transformer tunable
with a potonciometer or 2 ) two center tapped 'transformers and
four diodes, which arrangement required a high level drive
circuit to modulate it, typically +7 to +15 dBM.



2~E~3~'~~
Besides the greater expense, increased complexity
thereby contributing the probability of failure, and incom-
patibility with low power -10 dB CMOS logic drive circuitry,
the prior art modulators typically praduced on the order o.f
six dB of signal loss, resulting in considerably less
satisfactory overall performance when compared to the present
invention.
3. General, Summary Discussion of the Invention
A low cost spread spectrum modulator is an essential
component of a commercially viable spread spectrum communica-
Lions system. While a low cost, high performance modulator
has not been contemplated until now, the present invention
describes the ideal modulator, designed specifically for
Binary Phase Shift Keying or BPSK.
The present invention is designed to provide a low cost,
efficient., quality and reliable modulation system having
sufficiently high BPSK modulation rate, coupled with the
suppressed carrier output needed in spread spectrum communi-
ration systems and the like.
Unlike the prior art, which required balance mixers of
the sort discussed in the background section supra, the
present invention provides a BPSK modulator utilizing only
one transformer having the capability of adjusting for
maximum carrier suppression, in conjunction with two bipolar
transistors, which allows the modulator to be driven from the
PatApp. H.B. Sanderford, Jr. --Page 2 -BPSK Modulator




ys a ~ f
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low power logic levels found in CMOS circuitry -10 dBM. The
present invention in its preferred embodiment produces eight
dB of gain, much superior in performance over the prior art,
which performs at a six dB signal loss.
Further, the present invention is not limited to
utilizing two bipolar transistors as discussed su ra and may
utilize in an equivalent fashion any device which provides
sufficient gain at the desired frequency or operation, as
well as having sufficiently fast switching capabilities.
For example, other acceptable, equivalent devices which
may be utilized in place of the two transistors in the
present invention may include high frequency field effect
transistors (FET's), or digital logic gates, which are biased
into a linear region utilizing common techniques. These
devices may be incorporated into the system of the present
invention, replacing in effect the transistors, utilizing
common engineering techniques.
The present invention, in an alternative use, may be
utilized as a frequency multiplier. For example, i.f the
transistor, or its equivalent, is adequately fast, for
example, Ft>1GHZ, the system may be utilized to create at its
output a higher frequency harmonic.
As is known in the art, it is a common radio design
practice to utilize a non-linear device such as a diode,
transistor, or the like to perform frequency multiplication.
This is desirable because only lower frequency crystals are
PatApp. H.B. Sanderford, Jr. -Page 3 -BPSK Modulator

R
readily available, and as such, the lower frequency must then
be translated into the higher, desired frequency.
When the modulation transistor arrangement is addition-
ally. utilized in the present invention in the frequency
modulation capacity, less subsequent stages are required.
This servca to lower both the cost and complexity of a
frequency multiplier system, when compared to the prior art
systems.
It is thus an object of the present invention to provide
a low cost, high quality BPSK modulator compatible for use in
spread spectrum-type communications systems.
It is another object of the present invention to provide
a BPSK modulation system which is compatible with low power
logic input, such as that driven by CMOS circuitry.
It is still another object of the present invention to
provide a BPSK modulator which utilizes a single transformer
and two transistors, adjusts for carrier suppression, and
provides eight db+ of gain.
PatApp. H.B. Sanderford, Jr. -Page 4 -BPSK Modulator




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BRIEF DESCRIPTION of the DRAWINGS
For a further understanding of the nature and objects of
the present invention, reference should be had to the
following detailed description, taken in conjunction with the
accompanying drawings,. in which like parts are given like
reference numerals, and wherein:
Figure 1 is a Schematic Illustration of the preferred
embodiment of the BFSK Modulator of the present invention.
Figure 2 is Schematic Illustration of an alternative,
less costly embodiment of the BPSK Modulator of Figure 1.
PatApp. H.B. Sanderford, Jr. -Page 5 -BPSK Modulator
. _



r--- Nat I Lo.m nfc. FUGH~F1SSOC 504999536id; F.~J2
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The described modulator uses only one transformer ~lich
also adjusts for carrier suppression and two transistorsy and
as such can be driven from low power CMOS logic l~rels
producing a full eight dH of gain.
BPSK modulation seeks to alternate a carrier betTaeen a
0 dsgree phase shift and a 180 degree phase shift, the phase
shift of the carrier providing the modulation. As illustrat-
ed in Figure a of the present invention, the outputs o~ the
transformer "A", when the center tap "B" is grounderl~ are
inherently at opposite phases, 0 degrees and 180! de-
grees.
Transistor C and D can then be alternately selecte~3 by
biasing the MOD + or MOD - inputs to on. Thus, either the 0
degree phase shift or 180 degree phase shift can be sele~ed,
which provides BPSK modulatioiz with 8 dB of gain.
An alternative embodiment to the present invention
obviates with the need for the costly center tap :Lr~ the
transformer) further simplifying the present design. ;This
circuit is based upon the premise that an induct:dr at
resonance has outputs 180 degrees out of phase, produc~.ng 0
and 180 degrees outputs. The 0 degree and 180 degree outputs
are sel9cted using the same MOD -, MOD + biasing a~ de-
scribed above.
PatApp. H.B. Sa~nderford, Jr. --Pege S -BPSK Module;t~r




y3 .3 rw Iv
Through extensive experimentation,the present inventor
has determined that either tight (>.6 coupling coefficient)
or loose (<.3 coupling coefficient) coupling of the trans-
former windings can be used to produce suitable 0 degree and
180 degree phase shifts for BPSK modulation.
As illustrated in Figure 2, in the embodiment implement-
ing the loosely coupled 'transformer, both capacitors G and
F must be configured to resonate in conjunction with the
carrier frequency to be modulated. The resonate point in
this circuit may be fine adjusted by varying the transforme-
r's inductance, by turning the tunable core or slug o.f
transformer E.
In a tightly coupled transformer, capacitor G can be
eliminated and transformer E must be only resonate with
capacitor F. Fine tuning is again achieved by adjusting the
slug or core of transformer E. The value of capacitor F must
be such that it resonates with transformer E at the frequency
to be modulated.
Both embodiments of the invention perform identically
when properly configured and can produce excellent BPSK
spread spectrum modulation with adjustable carrier suppres-
sion.
As discussed above, the value of the resonate capac~ tors
to be used is dependent upon the transformer inductance and
carrier frequency. In the present invention, if a 1 1/2
primary turn to 2 1/2 secondary turn transformer is used with
a carrier frequency of 300 MHz, then practical resonate
PatApp. H.B. Sanderford, Jr. -Page 7 -BPSK Modulator



7 ~ s~ 'i
~~ rJ Y 1
capacitor values are 2.2 to 6.8 pf for G & E. The series
coupling capacitors must be relatively small to minimize
coupling of transistor base to collector capacitance.
Practical values are from 2.2 to 8.2 pf.
The transformer turns ratio is selected to match the
impedance of the driving carrier CKT to the input impedance
of the gain/phase selection transistors.
Since Figure 2 must be in resonance to function, the
overall Q of the CKT and transformer coupling can be chosen
to optimize performance as a tuned filter. t~ is primarily
effected by the transformer slug loss. Further loosely
coupled transformers provide optimum filtering characteris-
tics. This function can filter out undesirable harmonics
from previous RF stages, eliminating otherwise required
additional filter components.
The overall 8 dB of gain realized is a product of sums
of both gain and losses of the entire circuit. The trans-
former produces 2 to 4 dB of loss, the coupling capacitors
produce 1 dB of loss, the transistors provide 12 to 13 dB of
gain. The average circuit gain is determined as the minimum
overall gain ( 12-4-1 ) - 7 dB to a maximum overall gain of
(13-2-1) = 10 dB of gain.
As discussed infra, the present invention's design is
not limited to use in BPSK modulation. The present inven-
tion, in an alternative use, may be utilized as a frequency
multiplier.
PatApp. H.B. Sanderford, Jr. -Page 8 -BPSK Modulator




1 1 6
~~.i~~.~'~~;
For example, if the transistor( s), or their equivalents,
as utilized in the present invention, is adequately fast, for
example, Ft>1GHZ, the system may be utilized to create at its
output a higher frequency harmonic. The circuit layout, and
implementation of this alternative embodiment would remain
substantively the same as set forth in 'the figures shown.
As is known in the art, it is a common radio design
practice to utilize a non-linear device such as a diode,
transistor, or the like to perform frequency multiplication.
This is desirable because only lower frequency crystals are
readily available, and as such, the lower frequency must then
be translated into the higher, desired frequency.
When the modulation transistor arrangement is addition-
ally utilized in the present invention in the frequency
modulation capacity, less subsequent stages are required.
This serves to lower both the cost and complexity of a
frequency multiplier system, when compared to the prior art
systems.
The embodiments) described herein in detail for
exemplary purposes are of course subject to many different
variations in structure, design, application and methodology.
Because many varying and different embodiments may be made
within the scope of the inventive concepts) herein taught,
and because many modifications may be made in the embodi-
ment s) herein detailed in accordance with the descriptive
requirements of the law, it is to be understood that the
PatApp. H.B. Sanderford, Jr. -Page 9 -BPSK Modulator



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details herein are to be interpreted as illustrative and not
in a limiting sense.
As a further example, other acceptable, equivalent
devices may be utilized in place of the two transistors in
the present invention. These may include high frequency
field effect transistors (FET's), or digital logic gates,
which are biased into a linear region utilizing common
techniques. These devices may be incorporated into the
system of the present invention, .replacing in effect the
transistors, utilizing common engineering techniques.
~~tApp. H.B. Sandar~p~.~~. fir. -Page 10 -BPSK Modulator

Representative Drawing