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Patent 2091993 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 2091993
(54) English Title: FAULT TOLERANT COMPUTER SYSTEM
(54) French Title: SYSTEME INFORMATIQUE INSENSIBLE AUX DEFAILLANCES
Status: Expired
Bibliographic Data
(51) International Patent Classification (IPC):
  • G06F 11/20 (2006.01)
  • G06F 11/16 (2006.01)
(72) Inventors :
  • MAJOR, DREW (United States of America)
  • POWELL, KYLE (United States of America)
  • NEIBAUR, DALE (United States of America)
(73) Owners :
  • NOVELL, INC. (United States of America)
(71) Applicants :
(74) Agent: RICHES, MCKENZIE & HERBERT LLP
(74) Associate agent:
(45) Issued: 1998-12-22
(86) PCT Filing Date: 1991-08-09
(87) Open to Public Inspection: 1992-03-25
Examination requested: 1994-07-04
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): Yes
(86) PCT Filing Number: PCT/US1991/005679
(87) International Publication Number: WO1992/005487
(85) National Entry: 1993-03-18

(30) Application Priority Data:
Application No. Country/Territory Date
586807 United States of America 1990-09-24

Abstracts

English Abstract



A method and apparatus for providing a fault-tolerant backup system
such that if there is a failure of a primary processing system, a replicated
system can take over without interruption. The invention provides a
software solution for providing a backup system. Two servers are provided,
a primary and secondary server. The two servers are connected via a
communications channel. The servers have associated with them an
operating system. The present invention divides this operating system into
two "engines." An I/O engine is responsible for handling and receiving all
data and asynchronous events on the system. The I/O engine controls and
interfaces with physical devices and device drivers. The operating system
(OS) engine is used to operate on data received from the I/O engine. All
events or data which can change the state of the operating system are
channeled through the I/O engine and converted to a message format. The
I/O engine on the two servers coordinate with each other and provide the
same sequence of messages to the OS engines. The messages are provided to
a message queue accessed by the OS engine. Therefore, regardless of the
timing of the events, (i.e., asynchronous events), the OS engine receives all
events sequentially through a continuous sequential stream of input data.
As a result, the OS engine is a finite state automata with a one-dimensional
input "view" of the rest of the system and the state of the OS engines on
both primary and secondary servers will converge.


French Abstract

L'invention est constituée par une méthode et un appareil permettant d'obtenir un système de sauvegarde insensible aux défaillances tel que, en cas de défaillance du système de traitement primaire, un système jumeau puisse prendre la relève sans interruption. L'invention permet d'obtenir un logiciel de sauvegarde. Deux serveurs sont utilisés, un serveur primaire et un serveur secondaire. Ces deux serveurs sont connectés par l'intermédiaire d'un canal de communication. Un système d'exploitation est associé à ces serveurs. La présente invention divise ce système d'exploitation en deux «moteurs». Un moteur d'entrée-sortie est responsable de la prise en charge et de la réception de toutes les données et de tous les événements asynchrones dans le système. Ce moteur commande les dispositifs physiques et leurs pilotes et est interfacé avec eux. Le moteur du système d'exploitation est utilisé pour opérer sur les données reçues du moteur d'entrée-sortie. Tous les événements ou toutes les données qui peuvent provoquer un changement d'état du système d'exploitation sont canalisés par l'intermédiaire du moteur d'entrée-sortie et sont convertis en un format de message. Les moteurs d'entrée-sortie des deux serveurs sont coordonnés l'un avec l'autre et fournissent les mêmes suites de messages aux moteurs du système d'exploitation. Ces messages sont mis dans une file d'attente accessible aux moteurs du système d'exploitation. Par conséquent, quel que soit la chronologie des événements (c.-à-d. des événements asynchrones), chaque moteur du système d'exploitation reçoit tous les événements séquentiellement sous la forme d'une chaîne séquentielle continue de données. Comme résultat, ce moteur est un automate à états finis comportant une «vue» d'entrée unidimensionnelle du reste du système et les états des moteurs du système d'exploitation des serveurs primaire et secondaire convergent.

Claims

Note: Claims are shown in the official language in which they were submitted.


31
The embodiments of the invention in which an exclusive property or
privilege is claimed are defined as follows:

1. A method for providing a fault tolerant computer system comprising the
steps of:
providing a first processing means for operation of said computer
system, said first processing means comprising a first operating system (OS)
engine and a first input/output (I/O) engine;
providing a second processing means, said second processing means
comprising a second operating system (OS) engine and a second input/output
(I/O) engine;
determining a state of said first processing means and providing said state
to said second processing means;
defining an operation that can change said state of said first OS engine as
an event;
providing a plurality of events to said first I/O engine and converting
each of said events into a message;
providing said message to a first message queue in said first OS engine
and to a second message queue in said second OS engine;
executing said message in said first OS engine and said second OS engine;
and
switching said computer system operation to said second processing
means upon failure of said first processing means, such that no loss of
operation of said computer system occurs during said switch-over.

2. The method of claim 1 further including the steps of:

32
providing each event to said second I/O engine when said first
processing means does not operate;
converting each of said events to a message in said second I/O engine;
and
providing said message to said second message queue in said second OS
engine for execution by said second OS engine.

3. The method of claim 1 wherein said steps of determining the state of
said first processing means and providing said state to said second processing
means comprises the steps of:
executing in said first OS engine any messages available to said first OS
engine until said first OS engine has achieved a stable state; and
transferring a memory image of said first OS engine through said first
I/O engine to said second processing means.

4. The method of claim 1 wherein said first processing means comprises at
least one processor.

5. The method of claim 1 wherein said second processing means comprises
at least one processor.

6. The method of claim 1 further including the steps of:
generating a request in said OS engine, said request for accomplishing an
input/output operation;
providing said request to a first request queue in said first I/O engine for
execution by said first I/O engine; and

33
generating a reply to said first OS engine to indicate execution of said
request.

7. The method of claim 1 wherein said event is asynchronous.

8. A fault tolerant computer system comprising:
first processing means for operation of said computer system, said first
processing means comprising a first operating system (OS) engine and a first
input/output (I/O) engine;
second processing means comprising a second operating system (OS)
engine and a second input/output (I/O) engine;
said first I/O engine coupled to said second I/O engine on a first bus;
said first I/O engine including a converting means for converting
operations that can change said state of said first OS engine into a message;
said first I/O engine for providing said message to a first message queue
in said first OS engine and to a second message queue in said second OS engine;
said first OS engine and said second OS engine including means for
executing said message; and
means for switching said computer system operation to said second OS
engine upon failure of said first processing means such that no loss of operation
of said computer system occurs during said switch-over.

9. The computer system of claim 8 wherein said first processing means
comprises at least one processor.

34
10. The computer system of claim 8 wherein said second processing means
comprises at least one processor.

11. The computer system of claim 8 further including a first storage means
coupled to said first processing means, said first storage means storing a
memory image corresponding to said state of said first OS engine.

12. The computer system of claim 11 further including a second storage
means coupled to said second processing means, said second storage means
storing a memory image corresponding to said state of said second OS engine.

13. The computer system of claim 8 wherein said first OS engine controls
execution of instructions of said computer system.

14. The computer system of claim 13 wherein said second OS engine
controls execution of instructions of said computer system when said first OS
engine cannot execute said instructions.

15. The computer system of claim 8 wherein said I/O engine controls
communication with input and output devices.

16. The computer system of claim 8 wherein said message comprises
synchronous and asynchronous events.

17. A method for providing a fault tolerant computer system comprising the
steps of:


providing a first processing means for operation of said computer
system, said first processing means comprising a first operating system (OS)
engine and a first input/output (I/O) engine;
providing a second processing means comprising a second operating
system (OS) engine and a second input/output (I/O) engine;
determining a state of said first processing means and providing said state
to said second processing means;
defining an operation that can change said state of said first OS engine as
an event;
providing a plurality of events to said first I/O engine and serializing
said events into an event sequence;
providing successive events in said event sequence to said first OS engine
and to said second OS engine;
executing said successive events in said first OS engine and said second
OS engine; and
switching said computer system operation to said second processing
means upon failure of said first processing means, such that no loss of
operation to said computer system occurs during said switch-over.

18. The method of claim 17 further including the steps of:
providing each event to said second I/O engine when said first
processing means does not operate;
serializing said events into an event sequence in said second I/O engine;
and
providing successive events of said event sequence to said second OS
engine for execution by said second OS engine.

36
19. The method of claim 17 wherein said step of determining the state of
said first processing means and providing said state to said second processing
means comprises the steps of:
executing in said first OS engine any successive events available to said
first OS engine until said first OS engine has achieved a stable state; and
transferring a memory image of said first OS engine through said first
I/O engine to said second processing means.

20. The method of claim 17 wherein said first processing means comprises at
least one processor.

21. The method of claim 17 wherein said second processing means comprises
at least one processor.

22. The method of claim 17 further including the steps of:
generating a request in said OS engine, said request for accomplishing an
input/output operation;
providing said request to a first request queue in said first I/O engine for
execution by said first I/O engine; and
generating a reply to said first OS engine to indicate execution of said
request.

23. The method of claim 17 wherein said plurality of events are
asynchronous.

24. A fault tolerant computer system comprising:

37
first processing means for operation of said computer system, said first
processing means comprising a first operating system (OS) engine and a first
input/output (I/O) engine;
second processing means comprising a second operating system (OS)
engine and a second input/output (I/O) engine;
said first I/O engine coupled to said second I/O engine on a first bus;
said first I/O engine including a converting means for converting
operations that can change said state of said first OS engine into an operation
sequence;
said first I/O engine for providing said operations in sequence to said
first OS engine and to said second OS engine;
said first OS engine and said second OS engine including means for
executing said operations; and
means for switching said computer system operation to said second OS
engine upon failure of said first processing means such that no loss of operation
of said computer system occurs during said switch-over.

25. The computer system of claim 24 wherein said first processing means
comprises at least one processor.

26. The computer system of claim 24 wherein said second processing means
comprises at least one processor.

27. The computer system of claim 24 further including a first storage means
coupled to said first processing means, said first storage means storing a
memory image corresponding to said state of said first OS engine.

38
28. The computer system of claim 27 further including a second storage
means coupled to said second processing means, said second storage means
storing a memory image corresponding to said state of said second OS engine.

29. The computer system of claim 24 wherein said first OS engine controls
execution of instructions of said computer system.

30. The computer system of claim 29 wherein said second OS engine
controls execution of instructions of said computer system when said first OS
engine cannot execute said instructions.

31. The computer system of claim 24 wherein said I/O engine controls
communication with input and output devices.

32. The computer system of claim 24 wherein said sequence comprises
synchronous and asynchronous operations.

33. A method of disk mirroring in a computer system, comprising the steps
of:
providing a first processing means for operation of said computer
system;
providing a second processing means for operation of said computer
system;
providing said first processing means with primary mass storage;
providing said second processing means with secondary mass storage;
providing a first manager for control of said primary mass storage;

39
providing a second manager for control of said second mass storage;
synchronizing said primary mass storage and said secondary mass storage
using said first manager and said second manager;
marking said primary mass storage and said secondary mass storage with
a current synchronization level counter value to indicate that said primary massstorage and said secondary mass storage are fully synchronized; and
changing said current value synchronization level counter when there is
a change to synchronization state.

34. The method of claim 33 further including the steps of:
determining whether both processing means will perform a disk
operation using said first manager;
completing said disk operation by said first processing means and waiting
until it has receive completion confirmation from said second processing means
when both I/O engines perform said disk operation;
determining by said first manager which processing means will perform
said disk operation when said first manager determines that only one processing
means will perform said disk operation; and
transferring data by the processing means that performs said disk
operation to the other processing when only one processing means performs
said disk operation.

35. The method of claim 33 wherein said first processing means tracks
which memory blocks have been changed.

36. The method of claim 33 further including the steps of:


changing said current synchronization level counter value by a surviving
processing means upon the failure of the other processing means;
tracking memory blocks written to disk by said surviving processing
means;
verifying that the failed processing means has the same data as before
said failure upon said failed processing means being brought back on line; and
synchronizing a repaired processing means by transfer to said repaired
processing means the memory blocks that were changed while it was out of
service.

37. A method for executing an operation in a fault tolerant computer system
comprising the steps of:
providing a first processing means for operation of said computer
system, said first processing means comprising a first operating system (OS)
engine and a first input/output (I/O) engine;
generating a request by said first OS engine to said first I/O engine and
said first OS engine waiting for a reply from said first I/O engine; and
executing in said first I/O engine the requested operation as specified by
said request and matching an initial I/O event by matching it with said request.

38. The method of claim 37 further including the steps of:
providing a second processing means, said second processing means
comprising a second operating system (OS) engine and a second input/output
(I/O) engine;
determining by said first I/O engine that there is an event for said first
OS engine;

41
building said event into a message by said first I/O engine and
communicating said message to said second I/O engine;
waiting by said first I/O engine until said second I/O engine accepts said
message before providing said message to said first OS engine;
accepting said message from said first I/O engine by said second I/O
engine if said second I/O engine is ready;
sending an acknowledgement of said message by said second I/O engine
to said first I/O engine and placing said event in the event queue of said second
OS engine;
placing the event in the event queue of said first OS engine after
acceptance of said message by said second I/O engine;
executing said event by said first I/O engine;
determining if said event should be executed by said second processing
means;
waiting by the first I/O engine for the completion of said event by said
second processing means if secondary execution is necessary;
executing said request by said second processing means if said secondary
execution is necessary;
informing said first I/O engine of completion of said request by said
second processing means if said secondary execution is necessary;
determining by said first I/O engine if said event generates a completion
event;
generating said completion event by said first I/O engine if said
completion event is necessary; and
waiting by the second I/O engine for said completion event from said
first I/O engine if said completion event is necessary.

42
39. A method for synchronous management of timer interrupts, comprising
the steps of:
providing a first processing means for operation of a computer system,
said first processing means comprising a first operating system (OS) engine and
an input/output (I/O) engine;
defining a timer interrupt as an event;
placing said timer interrupt in an event queue;
relinquishing control of said first OS engine by a task currently running on
said first OS engine; and
executing said first timer interrupt by said first OS engine when said OS
engine reaches a message in said event queue.

40. A method of defining the states of a fault tolerant computer system
comprising the steps of:
providing a first processing means for operation of said computer
system, said first processing means comprising a first operating system (OS)
engine and a first input/output (I/O) engine;
providing a second processing means, said second processing means
comprising a second operating system (OS) engine and a second input/output
(I/O) engine;
providing a first state to define the status of the fault tolerant computer
to identify when said first engine is operational but said first engine is not
operational called No Server Active State;
providing a second state to define the status of the fault tolerant
computer to identify when said first I/O engine is operational but said second
I/O engine is not called Primary System With No Secondary State;

43
providing a third state to define the status of the fault tolerant computer
to identify when said first I/O engine is running in a mirrored primary system;
providing a fourth state to define the status of the fault tolerant
computer to identify when said first I/O engine is running in a mirrored
secondary system;
allowing a transition from said first state to said second state when said
first OS engine is activated;
allowing a transition from said second state to said third state when said
first processing means is synchronized with said second processing means;
allowing a transition from said first state to said fourth state when said
second OS engine is synchronized with said first processing means;
allowing a transition from said fourth state to said second state when
said first processing means fails; and
allowing a transition from said third state to said second state when said
second processing means fails.

41. A fault tolerant computer system comprising:
a first processing means for operation of said computer system, a second
processing means for operation of said computer system, wherein said second
processing means is a backup processing means for said first processing means,
and a first bus connecting said first processing means and said second processing
means,
characterized in that said first processing means comprises a first
operating system (OS) engine and a first input/output (I/O) engine, said first
OS engine comprising a first message queue, said first message queue coupled to
said first I/O engine for receiving messages, and that said second processing

44
means comprises a second OS engine and a second I/O engine, said second OS
engine comprising a second message queue, said second message queue coupled
to said second I/O engine for receiving messages;
that said first bus connects said first I/O engine and said second I/O
engine for transferring messages; and
wherein said first I/O engine is configured to convert operations that
can change the state of said first OS engine into messages, said messages
provided to said first message queue and to said second message queue for
subsequent execution by said first OS engine and said second OS engine,
respectively.

42. The computer system of claim 41 wherein said first processing means
comprises at least one processor.

43. The computer system of claim 41 wherein said second processing means
comprises at least one processor.

44. The computer system of claim 41 further including a first storage means
coupled to said first processing means, said first storage means storing a
memory image corresponding to said state of said first OS engine.

45. The computer system of claim 44 further including a second storage
means coupled to said second processing means, said second storage means
storing a memory image corresponding to said state of said second OS engine.


46. The computer system of claim 41 wherein said first OS engine controls
execution of instructions of said computer system.

47. The computer system of claim 41 wherein said I/O engine controls
communication with input and output devices.

48. The computer system of claim 46 wherein said second OS engine
controls execution of instructions of said computer system when said first OS
engine cannot execute said instructions.

49. The computer system of claim 41 wherein said message comprises
synchronous and asynchronous events.

Description

Note: Descriptions are shown in the official language in which they were submitted.


209199~
wO 92/05487 ~ I Pcr/uS9l/05679

,_
FAULT TOLERANT COMPUTER SYSTEM

BACKGROUND OF THE INVENTION

5 1. FIELD OF THE INVENTION

This invention relates to the field of operating system software-based
fault-tolerant computer systems utilizing multiple processors.

10 Z. BACKGROUND ART

In computer system applications, it is often desired to provide for
continuous operation of the computer system, even in the event of a
component failure. For example, personal computers (PC's) or workstations
15 often use a computer network t~ allow the sharing of data, applications,
files, processing power, communications and other resources, such as
printers, modems, mass storage and the like. Generally, the sharing of
resources is accomplished by the use of a network server. The server is a
processing unit dedicated to managing the centralized resources, managing
20 data, and sharing these resources with client PC's and workstations. The
server, network and PC's or workstations combined together constitute the
computer system. If there is a failure in the network server, the PC's and
workstations on the network can no longer access the desired centralized
resources and the system fails.
To maintain operation of a computer system during a component
~ failure, a redundant or backup system is required. One prior art backup
system involves complete hardware redundancy. Two identical processors
are provided with the same inputs at the hardware signal level at the same

Wo 92/05487 2 0 ~ 1 9 9 3 2 Pcr/US9l/05679

time during operation of the computer system. Typically, one processor is
considered the primary processor and the other is a secondary processor. If
the primary processor fails, the system switches to the secondary processor.
An example of such a hardware redundancy system is described in Lovell,
U.S. Patent No. 3,444,528. In Lovell, two identical computer systems receive
the same inputs and execute the same operations. However, only one of the
computers provides output unless there is a failure, in which case the
second computer takes control of the output. In operation, the output
circuits of the backup computer are disabled until a malfunction occurs in
10 the master computer. At that time, the outputs of the backup computer are
enabled.

The use of identical processors or hardware has a number of potential
disadvantages. One disadvantage is the complexity and cost of
15 synchronizing the processors at a signal level.

Another prior art method of providing a backup system is referred to
as a "checkpoint" system. A checkpoint system takes advantage of a
principle known as "finite state automata." This principle holds that if two
20 devices are at the same state, identical inputs to those devices will result in
identical outputs for each device, and each device will advance to the same
identical state.

In a checkpoint system, the entire state of a device, such as the
25 processor state and associated memory, is transferred to another backup
processor after each operation of the primary processor. In the event of a
failure, the backup processor is ideally at the most recent valid state of the
primary processor. The most recent operation is provided to the backup
processor and operation continues from that point using the backup

WO 92/05487 2 ~ 9 1 g ~ 3 PCI'/US9l/05679
,_

processor. Alternatively, the state information is provided to mass storage
after each operation of the primary processor. In the event of a failure, the
stored state information is provided to a backup processor which may or
may not have been used for other operations prior to that event.

One prior art checkpoint system is described in Glaser, U.S. Patent No.
4,590,554. In Glaser, a primary processor is provided to perform certain
tasks. A secondary processor is provided to perform other tasks.
Periodically, the state of the primary processor is transferred to the secondary10 processor. Upon failure of the primary processor, any operations executed
by the primary processor since the last synchronization of the primary and
backup processors are executed by the backup processor to bring it current
with the primary processor. The system of Glaser, as well as other
checkpoint systems, suffer a number of disadvantages. One disadvantage is
15 the amount of time and memory required to transfer the state of the
primary system t( the secondary system. Another disadvantage of
checkpoint systems is the interruption of service upon failure of the
primary system. The secondary system must be "brought up to speed" by
execution of messages in a message string.
One prior art attempt to solve this problem is to update only those
portions of the state of the primary system that have been changed since the
previous update. However, this requires compiex memorv and data
management schemes.
It is an object of the invention to provide a backup system that does
not require specialized hardware for the synchronization of the backup
system.

WO 92/05487 2 0 9 19 9 3 PCI/US91/05679

It is another object of the invention to provide a backup system which
is transparent to asynchronous events.

It is still another object of the present invention to provide an
5 improved backup system for network server operation.

It is another object of the present invention to provide continuous
service through a single hardware component failure.

WO 92/05487 ~ 0 9 ~ 9 ~ 3 Pcr/uS9l/OS679

.~
SUMMARY OF THE INVENTION

The invention is a method and apparatus for providing a fault-
tolerant backup system such that if there is a failure of a primary processing
5 system, a replicated system can take over without interruption. The
primary and backup processing systems are separate computers connected by
a high speed communications channel. The invention provides a software
solution for synchronizing the backup system. The present invention is
implemented as a network server, but the principles behind the invention
10 could be used in other processing environments as well. Each server may
utilize one or more processors. The servers use a specially architected
operating system. The present invention divides this operating sys'~m into
two "engines." An input/output (I/O) engine is responsible for handling
and receiving all data and asynchronous events on the system. The I/O
15 engine controls and interfaces with physical devices and device drivers. The
operating system (OS) engine is used to operate on data received from the
I/O engine. In the primary server, these engines are referred to as the
primary I/O engine and the primary OS engine.

All events or data which can change the state of the operating system
are channeled through the I/O engine and converted to a message format.
The messages are provided to a message ~ueue accessed by the OS engine.
Therefore, regardless of the timing of the events, (i.e., asynchronous events),
the OS engine receives all events sequentially through a continuous
25 sequential stream of input data. As a result, the OS engine is a finite stateautomata with a one-dimensional input "view" of the rest of the system.
Thus, even though the OS engine is operating on asynchronous events, the
procession of those events is controlled through a single-ordered input
sequence.

._ 6


On startup, or when a secondary processor is first provided, the
primary processor is "starved," that is, all instructions or other state-
cll~nging events are llalted until the OS engine reaclles a stable state. At tllat
point, tlle slate is transferred to the OS engine of the backup system. From
5 tllat point on, identical messages (events) are provided to each OS engine.
Because botll systems begin at an identical state and receive identical inp7lts,the OS engine part of the systems produce identical outputs and advance to
identical states.

The backup system also divides the operating system into a secondary
OS engine alld a secondary l/O engine. The secondary I/O engine is in
communication witl- tlle primary I/O engine. Upon failure of the primary
system, the remainder of the computer system is switched to the secondary
sys(em wi~h virlually no interruption. This is possiL~le because each evenl is
15 executed substantially simultaneously by the backup system and the primary
system. Tllus, tllere is no loss of system operation during a component
failure. In addition, no transfer of state is required once initial
synchrollization has been achieved. This reduces system complexity,
reduces memory managing requirements and provides for uninterrupted
20 service.

Accordingly, in one of its aspects, the present invention resides in a
method for providing a fault tolerant computer system comprising the steps of:
providing a first processing means for operation of said computer system, said
25 first processing means comprising a first operating system (OS) engine and a
first input/output ~I/O) engine; providing a second processing means, said

6a
second processing means comprising a second operating system (OS) engine and
a second input/output ~[/O) engine; determining a state of said first processingmeans and providing said state to said second processing means; ~efining an
operation that can change said state of said first OS engine as an event;
5 providing a plurality of events to said first I/O engine and converting each of
said events into a message; providing said message to a first message queue in
said first OS engine and to a second message queue in said second OS engine;
executing said message in said first OS engine and said second OS engine; and
switching said computer system operation to said second processing means
10 upon failure of said first processing means, such that no loss of operation of
said computer system occurs during said switch-over.

In a further aspect, the present invention provides a fault tolerant
computer system comprising: first processing means for operation of said
15 computer system, said first processing means comprising a first operating
system (OS) engine and a first input/output (I/O) engine; second processing
means comprising a second operating system (OS) engine and a second
input/output ~/O) engine; said first I/O engine coupled to said second I/O
engine on a first bus; said first I/O engine in~ ing a converting means for
20 converting operations that can change said state of said first OS engine into a
message; said first I/O engine for providing said message to a first message
queue in said first OS engine and to a second message queue in said second OS
engine; said first OS engine and said second OS engine inrlll~ling means for
P~e~lting said message; and means for switching said computer system
25 operation to said second OS engine upon failure of said first processing means

6b
such that no loss of operation of said computer system occurs during said
switch-over.

In a still further aspect, the present invention resides in a method for
5 providing a fault tolerant computer system comprising the steps of: providing
a first processing means for operation of said computer system, said first
processing means comprising a first operating system (OS) engine and a first
input/output (i/O) engine; providing a second processing means comprising a
second operating system (OS) engine and a second input/output (i/O) engine;
10 determining a state of said first processing means and providing said state to
said second processing means; clefining an operation that can change said state
of said first OS engine as an event; providing a plurality of events to said first
I/O engine and seri~li7.ing said events into an event sequence; providing
successive events in said event sequence to said first OS engine and to said
15 second OS engine; executing said successive events in said first OS engine and
said second OS engine; and switching said computer system operation to said
second processing means upon failure of said first processing means, such that
no loss of operation to said computer system occurs during said switch-over.

A further aspect of the invention resides in a method of disk mirroring
in a computer system, comprising the steps of: providing a first processing
means for operation of said computer system; providing a second procecsing
means for operation of said computer system; providing said first processing
means with primary mass storage; providing said second processing means with
25 secondary mass storage; providing a first manager for control of said primarymass storage; providing a second manager for control of said second mass

6c
storage; synchronizing said primary mass storage and said secondary mass
storage using said first manager and said second manager; marking said primary
mass storage and said secondary mass storage with a current synchronization
level counter value to in~1ic~te that said primary mass storage and said
5 secondary mass storage are fully synchronized; and ch~nging said current valuesynchronization level counter when there is a change to synchronization state.

A still further aspect of the invention resides in a method for e~recllting
an operation in a fault tolerant computer system comprising the steps of:
10 providing a first processing means for operation of said computer system, said
first processing means comprising a first operating system (OS) engine and a
first input/output ~/O) engine; generating a request by said first OS engine to
said first I/O engine and said first OS engine waiting for a reply from said first
I/O engine; and executing in said first I/O engine the requested operation as
15 specified by said request and m~tching an initial I/O event by m~tching it with
said request.

In a further aspect, the present invention resides in a method for
~ fining the states of a fault tolerant computer system comprising the steps of:20 providing a first processing means for operation of said computer system, said
first procescing means comprising a first operating system (OS) engine and a
first input/output ~l/O) engine; providing a second processing means, said
second processing means comprising a second operating system (OS) engine and
a second input/output a~O) engine; providing a first state to define the status
25 of the fault tolerant computer to identify when said first engine is operational
but said first engine is not operational called No Server Active State; providing

6d
a second state to define the status of the fault tolerant computer to identify
when said first I/O engine is operational but said second I/O engine is not
called Primary System With No Secondary State; providing a third state to
define the status of the fault tolerant computer to identify when said first I/O5 engme lS runmng m a mlrrored prlmary system; provldmg a fourth state to
define the status of the fault tolerant computer to identify when said first I/Oengine is running in a mirrored secondary system; allowing a transition from
said first state to said second state when said first OS engine is activated;
allowing a transition from said second state to said third state when said first10 processing means is synchronized with said second processing means; allowing a
transition from said first state to said fourth state when said second OS engineis synchronized with said first processing means; allowing a transition from said
fourth state to said second state when said first processing means fails; and
allowing a transition from said third state to said second state when said second
15 processing means fails.

In a still further aspect, the present invention provides a fault tolerant
computer system comprising: a first processing means for operation of said
computer system, a second processing means for operation of said computer
20 system, wherein said second processing means is a backup processing means forsaid first processing means, and a first bus connecting said first processing
means and said second processing means, characterized in that said first
processing means comprises a first operating system engine (OS) and a first
input/output (~/O) engine, said first OS engine comprising a first message
25 queue, said first message queue coupled to said first I/O engine for receiving
messages, and that said second processing means comprises a second OS engine

6e 7~
and a second I/O engine, said second OS engine comprising a second message
queue, said second message queue coupled to said second I/O engine for
receiving messages; that said first bus connects said first I/O engine and said
second I/O engine for transferring messages; and wherein said first I/O engine
5 is configured to convert operations that can change the state of said first OSengine into messages, said messages provided to said first message queue and to
said second message queue for subsequent execution by said first OS engine and
said second OS engine, respectively.




~ ~.

wO 92/05487 2 0 9 1 9 ~ 3 Pcr/US9l/05679

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a block diagram of the preferred embodiment of the
present invention.




Figure 2 is a detailed view of the I/O engine of Figure 1.

Figure 3 is a detailed view of the OS engine of Figure 1.

Figure 4A is a flow diagram illustrating OS engine operation during
execution of requests and events.

Figure 4B is a flow diagram illustrating operation of primary and
secondary I/O engines during execution of events.
Figure 4C is a flow diagram illustrating operation of primary and
secondary I/O engines during execution of requests.

Figure 5 is a diagram illustrating state transitions of this invention.
Figure 6 is a flow diagram illustrating primary and secondary system
synchronization .

Figure 7 is a block diagram of an alternate embodiment of this
25 invention.

Wo 92/05487 2 0 9 1 9 9 3 Pcr/US91/05679

DETAILED DESCRIPTION OF THE INVENTION

A fault-tolerant system used as a network server is described. In the
following description, numerous specific details are set forth in order to
5 provide a more thorough description of the present invention. It will be
apparent, however, to one skilled in the art, that the present invention mav
be practiced without these specific details. In other instances, well-known
features have not been described in detail so as not to obscure the invention.

1~ BLOCK DIAGRAM OF THIS INVENTION

A block diagram of the preferred embodiment of this invention is
illustrated in Figure 1. The invention provides a primary processor and
operating system generally desigrlated by those elements within dashed
15 lines 21 and a backup or secondary processor and operating system generally
designated by those elements falling within dashed lines 22. The primary
operating system 21 comprises an operating system (OS) engine 10 coupled
to an input/output (I/O) engine 12. The I/O engine and OS engine
communicate via "event" and "request" queues. The I/O engine writes
20 events onto the event queue and the OS en~gine reads the events. The OS
engine writes requests onto the request queue and the I/O engine reads the
request.

The backup 22 includes its own OS engine 16 that communicates
25 through event queue 17 and request queue 42 to I/O engine 18. I/O engine
12 communicates with I/O engine 18 through a high speed communications
bus 15A and B. 15A and B are one hardware channel that is used to
communicate two types of messages, A and B. The high speed
communications bus is used to transfer events from the primary server to

i~ V ~
WO 92/05487 9 Pcr/US9l/OS679

the secondary server (15A). It is also used for other communication between
the I/O engines (15B). I/O engine 12 also may access mass storage 14
through line 13. I/O engine 12 is also coupled to other devices, such as
timers, keyboards displays, etc., shown symbolically as block 44A coupled to
5 I/O engine 12 through bus ~4. I/O engine 18 is coupled through line 19 to
mass storage 20. The I/O engine 12 and I/O engine 18 are each connected to
network 23. I/O engine 18 is coupled to block 44B (timers, keyboards,
display, etc.) through bus 65.

The I/O engine 12 receives data and asynchronous events from the
computer system of which it is a part. For example, if the invention is used
as a network server, the I ~ engine 12 receives LAN packets from other
devices coupled to the network. The I/O engine also controls and interfaces
with physical devices and device drivers, such as mass storage device 14, a
15 keyboard or a timer.

The OS engines operate on data received from the I/O engines via the
event queues 11 and 17. After a desired operation has been performed, the
data is returned to the I/O engines via the request queues 41 and 42 for
20 output to other system devices.

The primary server 21 receives data or events from the network 23 on
input line 24. The I/O engine 12 converts these events or data into a
"message" format. Each message represents data or an event which can
25 change the state of the operating system. The I/O engine 12 provides these
messages first to bus 15A, and when I/O engine 18 signals that it has
received the message, the message is then given by I/O engines 12 and 18 to
both the OS engines through the event message queue buses 11 and 17.
These messages are executed sequentially by OS engines 10 and 16. By

wO 92/05487 2 0 9 1 9 Y 3 lo Pcr/US9l/05679

queueing the messages, time dependency is removed from the system so
that all asynchronous events are converted into a synchronous string of
event messages. By separating the OS engine from the I/O engine, the OS
engine is made to operate as if it were a finite state automata having a one
5 dimensional view of the system (i.e., the event message queue).

The buses 15A and 15B linking the primary I/O engine 12 to the
secondary I/O engine 18 utilize a bi-directional communications channel.
Ideally, the buses 15A and B provide high speed communications, have low
10 latency and low CPU overhead. Any suitable communications channel can
be utilized with this invention, including bus extenders and local area
network (LAN) cards.

The OS engine and I/O engine can be implemented with a single
15 processor if desired. Alternatively, separate processors, one for the OS
engine and one for the I/O engine, can be lltili7er~. Additional OS engines,
using additional processors, can also be utilized in this invention. The
states of all OS engines are then mirrored.

Regardless of whether one or two processors is utilized for the OS
engine and I/O engine, system RAM memory is divided between the two
engines. The I/O engine can access OS engine memory but the OS engine
cannot access I/O engine memory. This is because memory buffer addresses
may be different for the primary and secondary I/O engines, leading to the
25 state of the primary and secondary OS engines becoming different if they
were allowed to access addresses in I/O engine memory.

It is not necessary for the primary and backup servers to have
identical processors. The performance of the processors should be similar

W O 92/05487 11 2 ~9 ~ 9 3 PC~r/US91/05679

,~_

(CPU type, CPU speed) and the processors must execute instructions in the
same manner, not necessarily at the pin and bus cycle level but at the values
written to memory and the instruction sequencing level. For example, an
80386 microprocessor manufactured by Intel Corporation of Santa Clara,
5 California, could be used in the primary server with an Intel 80486 in the
secondary server. The secondary engine is required to have at least as much
RAM as is being used by the primary OS engine. In addition, both the
primary and secondary servers should have the same amount and
configuration of disk storage.
Hardware and/or software upgrades and changes can be made to the
system without loss of service. For example, a user may wish to add more
I~AM to the primary and secondary servers. To accomplish this, the
primary or secondary server is taken out of the system. If the primary server
15 is taken off line, the secondary server will treat that occurrence as a failure
and will begin to operate as the primary server, such that there is no
dlsruption or interruption of the operation of the system. The off-line
server can then be upgraded and placed back on-line. The servers are then
resynchronized and the other server is taken off line and upgraded. After
20 upgrade of the second server, it is placed back on-line and the servers are
resynchronized and both start using the newly added RAM. Thus, hardware
and software upgrades can ~ made without loss of service. Although the
invention is described in relation to network servers, it has equal
application to general purpose computer systems.
To initialize the secondary operating system, all new events are
~vithheld from the primary OS engine 10 until it has reached a stable state.
At that point, the state of the OS engine 10 (embodied in the memory image
of the OS engine 10) is transferred through message bus 15B to the OS

W092/05487 - ~~919(~,3) 12 Pcr/US9l/05679

engine 16 of the backup operating system. The OS engine 10 then has a state
identical to OS engine 16. At this time, all messages generated by I/O engine
12 that are provided to OS engine 10 are also provided on bus 15A to I/O
engine 18 for transfer to OS engine 16. Since both OS engines 10 and 16
5 begin in an identical state and receive identical inputs, each OS engine will
advance to an identical state after each event or message.

In the present invention, identical messages produce identical states
in the primary and backup operating system engines, such that prior art
10 check-pointing operations are not required. Time dependent considerations
are minimized, and synchronization of the respective OS engines for
simultaneous operation is unnecessary because synchronous and
asynchronous events are provided to a message queue, the message queue
serving as a method to convert asynchronous events to synchronous
15 events.

If there is a failure of a primary system, the I/O engine 18 of the
secondary operating system is coupled to the network 23. The secondary I/O
engine 18 is then used to generate messages which are provided to the
20 secondary OS engine 16. Because the backup operating ~ystel~l is at the same
state as the primary operating system, no loss of operation to the clients
using the server occurs during a server switchover.

I/O ENGINE/OS ENGINE SEPARATION
In the present invention, the I/O engine and OS engine are
substantially logically independent. To prevent unwanted state changes that
cannot be mirrored on the backup OS engine, data shared by the I/O and OS
engines is controlled, as further described below. Each engine has its own

20~199~
WO 92/05487 13- PCr/US91/OS679

stand-alone process scheduler, command interpreter, memory management
system, and code associated with tha. portion of the OS essential to its
function.

The division between the OS engine and I/O engine is made above
the hardware driver level at the driver support layer. The driver support
layer software is duplicated in both the I/O engine and the OS engine and
maintains the same top-level interface. The support layer software is
modified for the I/O engine and the OS engine. The driver support la~er of
the I/O engine maintains driver level interfaces and communicates to
physical hardware drivers. It converts hardware driver level events into
messages which are provided to the event queue of the OS engine.

The OS engine has no hardware driver interface support routines,
15 such as for registering interrupts or allocating I/O port addresses. When the OS engine requests an operation involving a hardware component (e.g.,
writing or reading from disk), the driver s~ ~port layer software in the OS
engine converts the action into a request and provides it to the I/O engine
request queue for execution. The results of that request are then returned to
20 the OS engine as an event message generated by the I/O engine driver
support layer.

I/O ENGINE

~. ferring now to Figure 2, the I/O engine consists of three levels, a
driver level, a management software level and a message level. Device
drivers 26A-26E drive hardware elements such as printers, storage devices
(e.g., disk drives), displays, LAN adaptors, keyboards, etc. The management
software level includes controllers for device drivers. For example, the disk

~V~1993
wo 92/05487 14 Pcr/US9l/05679

block 27 controls the disk device driver (e.g., disk device driver 26a). Disk
block 27 controls the initiation of disk reads and writes. In addition, disk
block 27 tracks the status of a disk operation. The disk block 27 of the
primary I/O engine (i.e., I/O engine 12) communicates the status of disk
5 operations to the backup I/O engine. The primary mass storage 14 and the
secondary mass storage 20 are substantially identical systems. If the primary
I/O engine executes a read from disk 14, it communicates to I/O engine 18
that the read has been completed. If the primary I/O engine completes the
read first, the data may be sent as a message on bus 15B to the secondary I/O
10 engine 18. Alternatively, I/O engine 18 reads the data from its own disk
drive 20.

The LAN block 28 controls external communications such as to a local
area network. This invention is not limited to local area networks,
15 however, and any type of communication may be utilized with this
invention. The LAN controller receives information packets from the
network and determines whether to provide that packet to the OS engine.

The display block 29 controls communications to a display device
20 such as a CRT screen through device driver 26C. The timer block 30 drives
the system time clock and keyboard block 31 provides an interface and
communication with a keyboard.

Message block 47 converts system events into messages to provide to
25 the event queue of the OS engine and dequeues requests from the OS
engine. A message consists of a header field and a data field. The header
field indicates the type of message or operation. The data field contains the
data on which the operation is to be executed. The message level
communicates event messages with the I/O engines through event bus 15A.

WO 92/05487 2 0 319 3 ~ Pcr/us9l/o5679

" _


OS ENGINE

Referring to Figure 3, the OS engine includes message level 32 to
5 dequeue event messages received from the I/O engine in sequential order
and to enqueue requests to provide OS engine requests to the request block
47 of the I/O engine. The OS engine also includes management software
corresponding to the management software of the I/O engine. For example,
the OS engine includes disk management software 33, LAN management
10 software 34, message management software 35, timer management software
36 and keyboard software 37. The top level 48 of the OS engine is the
operating system of the computer system using this invention.

The disk management software 33 controls the mirrored copies of
15 data on ~he redundant disks 14 and 20. When a disk operation is to be
~e~fo~ ed, such as a disk read operation, the disk management software 33
determines whether both I/O engines 12 and 18 will perform a read
operation or whether the primary I/O engine 12 will perform a read and
transfer the data to the secondary I/O engine 18. The timer management
20 software 36 controls timer events. Generally, an operating system has a
timer that is interrupted periodically. Often this timer interruption is used
for time dependent operations. In this invention, a timer interrupt is itself
an event on the input queue. By turning the timer interrupt into a message,
the timer events become relative instead of absolute. Time events are
~5 changed from asynchronous to synchronous events. The LAN block 34,
display block 35 and keyboard block 37 control network, display and
keyboard events, respectively.

OPERATION

W O 92/05487 2 U 919 ~ 3 16 PC~r/US91/05679


When the OS engine receives an event message, several changes can
occur to the state of the OS engine and these changes can take some finite
time to occur. In this invention, once a message has been accepted by the OS
5 engine, the OS engine performs all operations that can be performed as a
function of the message. After all such operations are performed, the OS
engine checks the message queue to determine if another message is
available for execution. If there is no other message available, the OS engine
becomes inactive until a message is available. This method of operation is
10 required so that the primary OS engine and the second OS engine remain
synchronized. New messages can be given to the primary and secondary OS
engines at different times because the I/O engines are asynchronous.
Therefore, the presence or absence of a new event cannot be acted upon or
lltili7e(1 to change the state of the OS engine.
In the preferred embodiment of the present invention, the OS
environment is defined to be non pre-empting. Pre-emption is inherently
an asynchronous event. In the prior art, an executing task can be
interrupted and replaced by another task by a timer interrupt. Because the
20 present system executes a single message at a time, the timer interrupt or
pre-emption request does not affect the OS engine until it reaches that
message in the message queue. The task running on the OS engine must
relinquish control before the timer event can be received and executed by
the OS engine.
INTERENGINE COMMUNICATION

In the present invention, communication between the OS engine and
I/O engine is controlled. The invention is designed to preserve a single

Z~9~Y ~J ~
WO 92/05487 17 pcr/us91/o~679

.~

source of input to the OS engine, thereby preventing time dependent events
and changes made by the I/O engines from affecting the state of the OS
engine.

Communication between the I/O engine and OS engine is
characterized as follows:

1. The OS engine can only access its own OS engine memory. All
communication between the OS engine and the I/O engine must occur in
the memory of the OS engine. The OS engine cannot access memory
designated as I/O engine memory. Memory coherency is preserved. The
primary OS engine and secondary OS engine are mirrored in this invention,
but the primary I/O engine and secondary I/O engine are not. Therefore,
memory contents of each I/O engine can be different. So long as the OS
15 engines do not access the I/O memory, the state synchronization is
maintained.

2. When the OS engine requests that a block of memory be
modified by the I/O engine, the OS engine may not access that memory
20 block until the I/O engine sends back an e~rent notifying the OS engine that
the modification had been done. The primary and secondary OS engines do
not operate in exact synchronization. There may be some skewing and
divergence of their operations (although the states always converge). In
addition, the primary and secondary I/O engines may modify the OS engine
25 memory at different times. If decisions were then made by the OS engine
related to the current value of a memory location in the process of being
changed by the I/O engine and the memory locations contain different data
due to the different modification times, the synchronization of the states
between the two OS engines would be lost.

Wo 92/05487 ~ 2 ~'9 1 9 ~ 3 18 Pcr/US9l/05679


In actual operation, if the OS engine requires a copy of data from the
I/O engine, it allocates a work buffer to hold the data and provides the
address of the work buffer to the I/O engine. The I/O engine copies the
5 requested data into the work buffer and generates an event to the OS engine
confirming that the data has been placed. The OS engine copies the data
from the work buffer to its ultimate destination and releases the work
buffer.

3. The I/O engine cannot change memory designated as OS
engine memory unless it has been given explicit control over that memorv
location by the OS engine. Once the I/O engine has transferred control of
the OS engine memory back to the OS engine, (via an event) the I/O engine
cannot access that memory.
4. The OS engine software cannot "poll" for a change in a
memory value without relinquishing control of the processor during the
poll loop, because the OS engine cannot be preemptive or interrupt driven
in the present implementation. All changes are made via events, and new
20 events are not accepted until the processor is relinquished by the running
process.

When the primary server fails, the secondary server becomes the
primary server. The address of the OS engine does not change, but messages
25 received from the "network" are re;outed to direct the messages to the
secondary server.

W O 92/05487 i9 2 0 ~ 1 9 9 3 PC~r/US91/05679

DISK MIRRORING

The primary storage 14 and the secondary storage 20 must be mirrored
for operation of this invention. When a new secondary engine is brought
5 on line, the disk system maps the drives on the secondary engine to the
corresponding drives on the primary engine. The drives on the two engines
are marked with a "current synchronization level" counter that can be used
to indicate which drive is more current or that two drives are already fully
synchronized. If there is any change to the synchronization state (i.e. ~he
10 other server has failed) the current synchronization level is incremen,~.. by the surviving server. The surviving engine also starts tracking memory
blocks which are written to disk. When the failed engine comes back on
line, after verifying that it has the same media as before, the repaired er -inecan be resynchronized by transferring over only the memory blocks that
15 were changed while it was ou of service. When the system is first brought
up and the original primary engine is brought on line, it tracks which disk
blocks have been changed for the same reasons.

PRIMARY AND SECONDARY I/O ENGINE COMMUNICATION
The I/O engine of the primary system determines the sequence of
events provided ts~ the primary OS engine and the secondary OS engine. An
event plus any data that was modified in the primary OS engine memory is
communicated to the secondary OS engine before the primary OS engine is
25 given the event in its event queue. This communication is over bus 15A.
The secondary system's I/O engine modifies the secondarv OS engine
memory and provides the event to the secondary OS engine.

wO 92/05487 2 0 9 1 9 9 3 20 Pcr/US91/05679

In addition to communicating events, the primary and secondarv I/O
engines communicate other information. Mechanisms are provided so that
various driver layer support routines can communicate with their
counterparts in the other system. This communication is bi-directional and
5 is over bus 15B. Examples of such communication include completion of
disk I/O requests and communication of disk I/O data when the data is onlv
stored on one of the systems due to disk hardware failure.

There are two procedures used for communications between the OS
10 engines. "AddFSEvent" is used by the I/O engine to give an event to the OS
engine and "MakeIORequest" is called by the OS engine to communicate a
request to the I/O engine. AddFSEvent can only be called by the primary I/O
engine. Both calls use a request type or event type to identify the request or
event being made. In addition, both calls pass a parameter defined in a
15 function-specific manner. For example, it may be a pointer to a data
structure in the OS engine memory.

When the primary system I/O engine modifies a data structure in the
OS engine, the same modification needs to be made in the secondary OS
20 engine as well before the event can be given to the OS engine. AddFSEvent
can be given pointers to data structures in the OS engine that will be
transferred to the secondary server along with events to transfer OS engine
data modifications to the secondary system.

In the secondary system, there are handler procedures in the I/O
engine, one per request type, that are called when events are received from
the primary server. The handler procedure is called with the original
parameter, and pointers to the areas in the OS engine that need to be
modified.

~ v ~
Wo 92/05487 21 Pcr/US9l/05679

" _


The secondary I/O engine event handler procedures have the
option of accepting or holding off the events. Hold off would be used if the
event is in response to a request from the OS engine and the secondary
5 system has not got the request yet. If the event wasn't held off, then
potentially memory could be prematurely changed in the OS engine.
Usually, the event handlers in the secondary I/O engine remove an
outstanding request that they have been tracking and signal to accept the
event. After the data is copied, the event is given to the secondary OS
10 engine. Note that the secondary system event handlers can do other
modifications to OS engine memory if necessary by the implementation.

It is important for the primary I/O engine to wait until the secondary
system receives an event before giving the event to the primary OS engine.
15 Otherwise, the primary OS engine could process the event and provide a
response before the original event has been transferred to the secondary
system (the event could be delayed in a queue on the primary system
waiting to be sent to the secondary ~y~le~ll). If the primary system generated
a request that was a function of the event not yet transferred to the
20 secondary system, then if the primary system failed, its state, as viewed from
an external client, would not be synchronized with the secondary system.

SERVER STATES OF OPERATION AND TRANSITIONS

The I/O engine software runs in four states: no server active state,
primary system with no secondary state, primary system with secondary
state, and secondary system state. In addition, the I/O engine makes the
following state transitions: no server active to primary system no secondary,
primary system no secondary to primary system with secondary, and

WO 92~05487 2 0 9 1 9~9 ~ 22 PCI/US9l/05679

secondary system to primary system. There are some additional states that
occur during the synchronization of a secondary system.

The states of the system of this invention are illustrated in Figure ~.
5 As noted, the I/O engine operates in one of four states S1, S2, S3 and S4.
State S1, no server engine, occurs when the I/O engine is operational but the
OS engine is not. State 2, primary no secondary, occurs when both the I/O
engine and OS engine are loaded, but the system is not mirrored. When the
system is mirrored, it will become the primary OS engine and the I/O
10 engine will act as the primary I/O engine.

State 3 is referred to as primary with secondary. In this state, the I/O
engine is running in a mirrored primary system. State S4, secondary with
primary, occurs when the I/O engine is running in a mirrored secondary
15 system.

There are five possible state transitions that can be experienced by the
I/O engine. These are indicated by lines T1-T5. The first transition T1 is
from state S1 to state S2. This transition occurs after the OS engine is
20 activated.

The second transition T2 is from state S2 to state S3 and occurs within
the primary system when it is synchronized with the secondary system.
Transition T3 is from state S1 to state S4 and occurs within the secondary
25 system when the OS engine is synchronized with the primary system.

Transition T4 is from state S4 to state S2 and occurs when the primar~
system fails. Transition T5 is from state S3 to state S2 and occurs when the
secondary svstem fails.

W O 92/05487 2~9~19 ~ ~ P(~r/US91/05679

_.

SECONDARY SERVER TRACKING AND EXECUTION OF REQUESTS

The secondary system I/O engine receives requests from its own OS
5 engine but usually does not execute them. Instead, it enqueues the request
and waits until the primary I/O system responds to the request, then gets a
copy of the response (the Event generated by the primary I/O system),
unqueues its own copy of the request and allows the response "event" to be
given to its own OS engine.
The secondary I/O engine has to enqueue the requests from the OS
engine for several reasons. First of all, the OS engine usually expects some
sort of response "event" from every one of its requests. If the primary
system fails, then the secondary system (now primary system) completes the
15 request and generates the appropriate response event. Another reason is
that the secondary system has to wait until it has received the request before
it can approve receiving the response event (a case which can occur if the
primary system is significantly ahead of the secondary system), otherwise
the secondary system may transfer data to its OS engine that the OS engine is
20 not yet prepared to received. If the secondary system has enqueued the
request it will accept the response event; if not it signals the primary system
to "hold off" and try again.

There are requests given by the OS engine that may need to be
''5 executed by both servers and then have the actual completion "event"
coordinated by the primary system. One example of this is disk writes. The
secondary system has to signal the primary system when it is done with the
request; the primary system waits until it has completed the write and has

WO 92/05487 2 0 9 1 9 9 3 24 Pcr/US9l/05679

received completion confirmation from the secondary system before it
generates the completion "event."

A flow diagram illustrating the execution of events and requests is
5 illustrated in Figures 4A-4C. Referring first to Figure 4A, the operation of
the OS engines is illustrated.

The operation of the OS engine when it generates a request is shown
at steps 51 and 52. The operation of the OS engine when it receives an event
10 is shown at steps 53 and 54. At step 51, the management layer of the OS
engine determines that there is a need to perform an I/O operation. At step
52, the OS engine generates a request for the I/O engine and enters a wait
mode, waiting for a reply event from the I/O engine.

At step 53, an event is received from the I/O engine in the event
queue of the OS engine. The event is given to the appropriate management
layer block such as the disk block, LAN block, keyboard block, etc. At step 54,
the management layer completes the initial I/O event by matching it with
the original request.
A flow chart illustrating the operation of the I/O engine during event
processing states is illustrated in Figure 4B. Steps 55-58 illustrate the
primary I/O engine and steps 59-63 illustrate the secondary I/O engine. At
step 55, the management layer of the primary I/O engine determines there is
25 an event for the OS engine. At step 56, this event is built into a message and
communicated to the secondary I/O engine. The primary I/O engine then
waits until the secondary I/O engine has acknowledged the event before
providing the message to the primary OS engine. At decision block 57, a
decision is made as to whether the event has been accepted by the secondary

wo92/05487 25 2~ 9~3 Pcr/ussl/os679

OS engine. If the event has not yet been accepted, the primary I/O engine
waits until acknowledgement has been made. If the secondary I/O engine
has accepted the event, satisfying the condition of decision block 57, the I/O
engine places the event in the primary OS engine event queue at step 58.




The secondary I/O engine, at step 59, waits for an event from the
primary I/O engine. At decision block 60, the secondary I/O engine
determines whether it is ready for the received event. If the secondary I/O
engine is not ready, it sends a don't accept message to the primary I/O
10 engine at step 61 and returns to step 59 to wait for another event. If the
secondary I/O engine is ready to take the event, and the conditions at
decision block 60 are satisfied, the secondary I/O engine sends an
acknowledgement of the event to the primary I/O engine at step 62. The
secondary I/O engine then places the event in the secondary OS engine
15 event queue at step 63.

Figure 4C illustrates the processing state of the I/O engine when
processing requests generated by the OS engine. Steps 70-74 illustrate the
state of the primary I/O engine during these operations and steps 75-81
20 illustrate the secondar~ I/O engine during these operations. At step 70, the
message level of the I~ O engine determines that there is a request available
in the request queue. At step 71, the request is executed by the I/O engine.
This request may be a disk write operation, sen~l a packet on the LAN, etc.
At decision block 72, it is determined whether execution of the request by
25 the secondary I/O engine is also required. If ~ other execution is required,
the primary I/O engine proceeds to step 74. If a secondary execution is
required, the primary I/O engine proceeds to decision block 73. If the
secondary processor is completed, the primary I/O engine proceeds to step
74A. If the secondary step is not completed, the primary I/O engine waits

W O 92/05487 2 0 g 1 9 ~ 3 P(~r/US91/05679

until the secondary step has been completed. At decision block 74A,
determination is made as to whether the request generates a completion
event. If the answer is yes, the primary I/O engine proceeds to step 74B and
generates the completion event. If a completion event is not required, the
5 primary I/O engine proceeds to step 74C and is done.

At step 75, the secondary I/O engine message level determines that
there is a request available from the OS engine. At decision block 76,
determination is made as to whether the secondary processor is required to
10 execute the request. If the secondary I/O engine is to execute the request, asecondary I/O engine proceeds to step 77 and executes the request. After
execution of the request, the secondary I/O engine informs the primary I/O
engine of completion. If the secondary I/O engine is not to execute the
request, the secondary I/O engine proceeds to decision block 79 and
15 determines whether the request generates a completion event. If there is no
completion event generated by the request, the secondary I/O engine
proceeds to step 80, and is done. If the request does generate an event, the
secondary I/O engine awaits the corresponding event from the primary I/O
engine at step 81.
SERVER SYNCHRONIZATION SEQUENCE

During the synchronization of the secondary system with the primarv
system, the entire "state" of the OS engine, as well as the state of the primar~~5 I/O engine pertaining to the state of the OS engine, must be communicated
to the secondary system. To initiate the synchronization of the primarv and
secondary systems, the primary OS engine system is "starved" of new
events. That is, no new events are provided to the event queue of the
primary system. After the message queue of the primary system is empty,

~ U ~ ' ~ J ~
W O 92/05487 27 PC~r/US91/05679
-



the primary system OS engine loo~s, waiting for a new event. When the OS
engine is waiting for a new event, .t again is in a stable state and remains
consistent until a new event is encountered. The entire state of the OS
engine is then contained in the memory image of the OS engine; the
memory image is then simply transferred to the secondary system.
Eventually, both of the OS engines are given the same set of new events and
begin mirroring each other.

A flow diagram illustrating the synchronization sequence of this
10 invention is illustrated in Figure 6. Steps 85-89 represent the states and
transitions of the primary server. Steps 90-93 represent the states and
transitions of the secondary server. The primary server is initially at state S~at step 85 and the secondary server is initially at state S1 (I/O engine only) at
step 90.
The I/O engines coordinate the synchronization sequencing. When
the servers are given a command to synchronize, the management software
of the primary I/O engine prepares for synchronization at step 86. This
allows the various driver support layers to communicate with the OS
20 engine and complete any tasks that would prevent synchronization. The
primary system starts "starving" the OS engine and stops taking requests
from the OS engine, as well.

Next, any outstanding requests that are being executed by the I/O
~5 engine are completed (and the appropriate completion event transferred to
the OS engine memory image but is hidden and not given at this time to the
OS engine). At step 87 and 91, the I/O engines exchange state information.
The primary I/O engine provides its state information to the secondary I/O
engine so that the I/O engines are aware of the state of each other plus the

Wo 92/05487 28 PCI/US91/05679
2091993

secondary I/O engine becomes aware of any outstanding state from the OS
engine. This step is represented by step 91 of the secondary I/O engine
sequence.

At step 88, the primary I/O engine transfers the OS engine memory
image to the secondary server. This corresponds to step 92 of the secondary
server sequence in which the secondary I/O engine receives the OS engine
memory image from the primary server.

At step 89, the synchronization is complete and the primary system is
in state S3, (primary with secondary). Similarly, corresponding step 93 of the
secondary server, the synchronization process is complete and the secondary
server is in state S4.

There can be server or communications failures during the
synchronization sequence. If the primary system fails or the server-to-
server communication link fails, the secondary system must quit as well. If
the secondary system fails or if the communication link fails, the primary
system must recover and return back to the "PrimaryNoSecondary" S2 state.
20 These failures are signaled at different times during the synchronization
sequence. After the change happens, the hidden and queued up events are
given back to the OS engine and the I/O engine starts processing requests
from the OS engine again. If a failure occurs during synchronization, the
I/O engine management software needs to undo whatever changes have
25 been done to synchronize and return back to the non-mirrored state.

TRANSITION DUE TO PRIMARY SERVER FAILURE

wO 92/05487 2 0 91 9 3 3 PCr/US91/05679

When the primary system fails, the secondary system must be able to
step in and assert itself as the server, with the only thing that changed being
the LAN communications route to reach the server. Packets being sent to
the server at the time of failure can be lost. However, all LAN
- 5 communication protocols must be able to handle lost packets. Thesecondary I/O management support layers are notified of the failure.

When the failure occurs, the driver support layers need to take any
outstandi~g requests they have from the OS engine and complete executing
them. The secondary-turned-primary system's AddFSEvent procedure is
activated prior to the failure notification so that new events can be given to
the OS engine. Any messages being sent to the former primary system are
discarded. Any requests from the OS engine that were waiting data or
completion status from the primary ~ysLeln are completed as is. There is a
15 need to use a special event to notify the OS engine that the servers were
changed. For example, a special event is used to tell the OS engine to send a
special control packet to all of the clients, indicating that the change
occurred. This can accelerate the routing level switchover to the new
server.
TRANSITION DUE TO SECONDARY SERVER FAILURE

When there is a secondary system failure, all messages queued to be
sent to the secondary system are discarded. If the messages are OS engine
25 events, they are simply provided to the OS engine. The driver support layer
of the I/O engine completes any requests that were waiting pending
notification from the secondary system.

WO 92/05487 2 0 9 1 9 ~ 3 30 Pcr/US9l/05679

MULTIPLE OS ENGINES AND EXTRA PROCESSORS

The present invention has been described in terms of primary and
secondary servers that each have a single OS engine. An alternate
5 embodiment of the present invention is illustrated in Figure 7 in which the
primary and/or secondary server can have one or more OS engines.
Referring to Figure 7, the primary server is comprised of three processors.
Processor 1 implements the I/O engine of the primary server. A first and
second OS engine are implemented on processor 2 and processor 3,
1 0 respectively.

Similarly, the secondary server has a first processor implementing an
I/O engine and second and third processors implementing first and second
OS engines. In operation, multiple event queues are maintained for each
15 OS engine so that each OS engine operates on the same events. In this
manner, the states of each OS engine can be maintained substantially
identical so that upon failure of one server, another can begin operation.

Thus, a fault tolerant computer system has been described.


Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Administrative Status , Maintenance Fee  and Payment History  should be consulted.

Administrative Status

Title Date
Forecasted Issue Date 1998-12-22
(86) PCT Filing Date 1991-08-09
(87) PCT Publication Date 1992-03-25
(85) National Entry 1993-03-18
Examination Requested 1994-07-04
(45) Issued 1998-12-22
Expired 2011-08-09

Abandonment History

There is no abandonment history.

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Application Fee $0.00 1993-03-18
Maintenance Fee - Application - New Act 2 1993-08-09 $100.00 1993-03-18
Registration of a document - section 124 $0.00 1993-12-17
Maintenance Fee - Application - New Act 3 1994-08-09 $100.00 1994-05-06
Maintenance Fee - Application - New Act 4 1995-08-09 $100.00 1995-07-11
Maintenance Fee - Application - New Act 5 1996-08-09 $150.00 1996-05-15
Maintenance Fee - Application - New Act 6 1997-08-11 $150.00 1997-07-24
Maintenance Fee - Application - New Act 7 1998-08-10 $150.00 1998-07-23
Final Fee $300.00 1998-08-07
Maintenance Fee - Patent - New Act 8 1999-08-09 $150.00 1999-07-20
Maintenance Fee - Patent - New Act 9 2000-08-09 $150.00 2000-07-20
Maintenance Fee - Patent - New Act 10 2001-08-09 $200.00 2001-07-19
Maintenance Fee - Patent - New Act 11 2002-08-09 $200.00 2002-07-18
Maintenance Fee - Patent - New Act 12 2003-08-11 $200.00 2003-07-21
Maintenance Fee - Patent - New Act 13 2004-08-09 $250.00 2004-07-21
Maintenance Fee - Patent - New Act 14 2005-08-09 $250.00 2005-07-20
Maintenance Fee - Patent - New Act 15 2006-08-09 $450.00 2006-07-17
Maintenance Fee - Patent - New Act 16 2007-08-09 $450.00 2007-07-25
Maintenance Fee - Patent - New Act 17 2008-08-11 $450.00 2008-07-17
Maintenance Fee - Patent - New Act 18 2009-08-10 $450.00 2009-07-21
Maintenance Fee - Patent - New Act 19 2010-08-09 $450.00 2010-07-19
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
NOVELL, INC.
Past Owners on Record
MAJOR, DREW
NEIBAUR, DALE
POWELL, KYLE
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Description 1998-03-20 35 1,412
Description 1994-04-09 30 1,145
Claims 1998-03-20 15 478
Abstract 1995-08-17 1 81
Cover Page 1994-04-09 1 17
Abstract 1998-03-20 1 39
Abstract 1994-04-09 5 128
Drawings 1994-04-09 10 184
Cover Page 1998-12-21 2 94
Representative Drawing 1998-12-21 1 10
Fees 1997-07-24 1 39
Fees 1998-07-23 1 46
Correspondence 1998-08-07 1 40
International Preliminary Examination Report 1993-03-18 13 340
PCT Correspondence 1993-04-14 1 37
Office Letter 1994-08-15 1 37
Office Letter 1993-09-20 1 52
Prosecution Correspondence 1994-07-04 1 32
Prosecution Correspondence 1997-08-13 4 96
Examiner Requisition 1997-02-21 2 72
Fees 1996-05-15 1 38
Fees 1995-07-11 1 41
Fees 1994-05-06 1 43
Fees 1993-03-18 1 49