Note: Descriptions are shown in the official language in which they were submitted.
CA 02221~02 1997-12-19
SEMICONDUCTOR PACKAGE
This is a divisional application based on Canadian Patent
Application No. 2,139,266, filed on December 29, 1994.
This invention relates to a semiconductor package having a heat
sink, which package has an integrated circuit chip and, more particularly, to a
5 multi-chip package which enables cooling of a multi-chip module and to a
shielding package which enables shielding of a multi-chip module from
electromagnetic interference.
A conventional multi-chip package has been proposed in a paper
contributed to a technical report, Vol.1985.7.15, pages 270-278, under the title10 of "NIKKEI ELECTRONICS". That conventional multi-chip package comprises
a plurality of integrated circuit chips, a ceramic subslldte, a heat sink, and aplurality of inpuVoutput pads. The integrated circuit chips are mounted on a
lower surface of the ceramic substrate. The heat sink is fixed on an upper
surface of the ceramic substrate. Each of the integrated circuit chips generates15 heat which is conducted to the heat sink through the ceramic substrate. The
heat conducted to the heat sink dissipates in the air.
Another conventional multi-chip package has been proposed in a
paper contributed to a technical report, Vol.1993.8, pages 61 -63, under the title
of "NIKKEI MICRODEVICES". That second conventional multi-chip package
20 comprises a microprocessor chip, a ceramic substrate having a cavity section
at a lower surface thereof, a plurality of surface-mount-type packages, and a
plurality of inpuVoutput pins. The surface-mount-type packages are mounted
on an upper surface of the ceramic substrate. Each of the surface-mount-type
packages includes a static RAM. The microprocessor chip is held in the cavity
25 section. The microprocessor chip generates more heat than that which is
generated from the static RAMs.
A conventional shielding package has been disclosed in a
European PatentApplication, Publication Number: 0 340 959. That conventional
shielding package comprises a wiring board, a plurality of large-scale integrated
CA 02221~02 1997-12-19
(LSI) circuit chips, a heat sink, a screw, and a nut. Both the LSI circuit chipsand the heat sink are mounted on the wiring board. The heat sink is fixed to
the wiring board by the screw and the nut. Any electromagnetic wave
generated from the LSI circuit chips is shielded by the heat sink.
However, the above-mentioned semiconductor package has the
following problems.
In the above-mentioned second conventional multi-chip package,
when the heat sink is fixed on the ceramic substrate so that the heat sink is
located just above the microprocessor chip, the cooling efficiency of the surface-
mount-type package is poor, because the surface-mount-type package is
located to the leeward of the heat sink.
To solve the above-mentioned problem, a potting has been
previously formed around each of the surface-mount-type packages so that the
heat was conducted to the ceramic substrate. However, in such case, it is
difficult to detach the surface-mount-type packages. When each of the surface-
mount-type packages is modified into a bare chip, similarly, it is difficult to
detach the bare chip.
In the above-mentioned conventional shielding package, since the
heat sink is fixed to the wiring board by the screw and the nut, a long time is
taken to detach and attach the heat sink.
It is therefore an object of this invention to provide a semi-
conductor package which improves the cooling efficiency of the surface-mount-
type packages.
It is another object of this invention to provide a semiconductor
package from which is easy to detach the surface-mount-type packages.
It is still another object of this invention to provide a semiconductor
package for which it does not take a long time to detach and attach the heat
sink.
The invention is a shielding package for shielding a semiconductor
device from electromagnetic interference. The semiconductor device comprises
a substrate having upper and lower surfaces and having a plurality of
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inpuVoutput pins, and an integrated circuit chip mounted on the lower surface
of the substrate. The shielding package comprises a heat spreader mounted
on the upper surface of the substrate. A heat sink is thermally connected to theintegrated circuit chip through the heat spreader. The heat sink has electrical
conductivity. The heat sink comprises a base plate and at least one connecting
member which perpendicularly extends from the base plate. A wiring board has
a plurality of contact holes and a plurality of contact slits. A connector is
mounted on the wiring board. The connector has a plurality of contacts. The
contacts comprise a plurality of socket portions and a plurality of terminal
portions. The contacts are connected to the inpuVoutput pins, with the
inpuVoutput pins inserted into the respective socket portions. The terminal
portions are inserted into the respective contact holes. The connector has at
least one ground contact. The at least one ground contact comprises a ground
socket portion and a ground terminal portion. The at least one ground contact
is electrically connected to the at least one connecting member, with the
connecting member inserted into the ground socket portion. The ground
terminal portions are inserted into the contact slits.
The invention will next be more fully described by means of
preferred embodiments utilizing the accompanying drawings, in which:
Figure 1 is a front view showing the constitution of a conventional
multi-chip package;
Figure 2 is a partial sectional view showing the constitution of
another conventional multi-chip package, with a heat sink absent;
Figure 3 is a partial cross-sectional view showing the constitution
of a conventional shielding package;
Figure 4 is a perspective view showing the constitution of a multi-
chip package according to a first embodiment, with a portion cut away;
Figure 5 is a plan view showing the constitution of a multi-chip
module according to a first embodiment of this invention;
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Figure 6 is a partial sectional view showing the constitution of a
multi-chip package according to a first embodiment of this invention, with a heat
sink absent;
Figure 7 is a partial plan view showing the constitution of a heat
5 sink according to a first embodiment of this invention;
Figure 8 is a partial sectional view showing the constitution of a
multi-chip package according to a first embodiment of this invention;
Figure 9 is a sectional view showing the constitution of a multi-chip
package according to a second embodiment of this invention;
Figure 10 is a sectional view showing the constitution of a multi-
chip package according to a third embodiment of this invention;
Figure 11 is a partial sectional view showing the constitution of a
shielding package according to a fourth embodiment of this invention;
Figure 12 is a partial sectional view showing the constitution of a
shielding package according to a fifth embodiment of this invention; and,
Figure 13 is a perspective view showing the constitution of a multi-
chip shielding package according to a sixth embodiment of this invention, with
a portion cut away.
Referring to Figures 1, 2, and 3, both a conventional multi-chip
package for cooling a multi-chip module and a shielding package for shielding
a multi-chip module from electromagnetic interference will first be described inorder to facilitate an understanding of the present invention. The multi-chip
module consists of a wiring board and a plurality of integrated circuit chips
mounted on the wiring board.
Figure 1 is a front view showing the constitution of a conventional
multi-chip package. Figure 2 is a partial sectional view showing the constitution
of a second conventional multi-chip package, with a heat sink absent. Figure
3 is a partial cross-sectional view showing the constitution of a conventional
shielding package.
In Figure 1, the conventional multi-chip package comprises a
plurality of integrated circuit chips 11, a ceramic substrate 12, a heat sink 13,
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and a plurality of inpuVoutput pads 14. The integrated circuit chips 11 are
mounted on a lower surface of the ceramic substrate 12. The heat sink 13 is
fixed on an upper surface of the ceramic substrate 12. Each of the integrated
circuit chips 11 generates heat which is conducted to the heat sink 13 through
5 the ceramic substrate 12. The heat conducted to the heat sink 13 dissipates in the air.
In Figure 2, another conventional multi-chip package comprises
microprocessor chip 21, a ceramic substrate 22 having a cavity section at a
lower surface thereof, a plurality of surface-mount-type packages 23, and a
10 plurality of inpuVoutput pins 24. The surface-mount-type packages 23 are
mounted on an upper surface of the ceramic substrate 12. Each of the surface-
mount-type packages 23 includes a static RAM. The microprocessor chip 21
is held in the cavity section. The microprocessor 21 generates more heat than
that which is generated from the static RAMs.
In Figure 3, the conventional shielding package comprises a wiring
board 25, a plurality of large-scale integrated (LSI) circuit chips 26, a heat sink
27, a screw 28, and a nut 29. Both the LSI circuit chips 26 and the heat sink
27 are mounted on the wiring board 25. The heat sink 27 is fixed to the wiring
board 25 by the screw 28 and the nut 29. Any electromagnetic wave generated
20 from the LSI circuit chips 26 is shielded by the heat sink 27.
Referring to Figure 4, the description will now proceed to a multi-
chip package for cooling the multi-chip module according to a first embodiment
of the present invention. Figure 4 is a perspective view showing the constitution
of a multi-chip package according to a first embodiment, with a portion cut
25 away. As shown in Figure 4, a multi-chip package comprises a dissipation
section 37 and a multi-chip module 38. The dissipation section 37 comprises
a heat spreader 33 and a heat sink 35. The multi-chip module 38 comprises a
substrate 22, a primary integrated circuit chip 31, and secondary integrated
circuit chips (not shown). It is to be noted that the primary integrated circuit30 chip 31 generates more heat than the secondary integrated circuit chip.
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The substrate 22 has upper and lower surfaces. The substrate 22
has a cavity section 49 at the lower surface. The primary integrated circuit chip
31 is mounted on the lower surface of the substrate 22 with the primary
integrated circuit chip 31 held in the cavity section 49. It is desirable that the
5 primary integrated circuit chip 31 is a bare chip, because this raises the heat-
dissipating efficiency. The secondary integrated circuit chips are mounted on
a predetermined region of the upper surface of the substrate 22.
As shown in Figures 5 and 6, each of the secondary integrated
circuit chips are received within a surface-mount-type package 23. The surface-
10 mount-type package 23 is mounted on the upper surface of the substrate 22 by
soldering. The multi-chip module 38 consists of the substrate 22 and the
surface-mount-type packages 23 mounted on the substrate 22. The heat
spreader 33 is mounted on a remaining region of the upper suface of the
substrate 22. A heat transfer sheet 41 is coated on the heat spreader 33. The
heat sink 35 is mounted on the heat transfer sheet 41. The heat sink 35 is
thermally connected to the primary integrated circuit chip 31 through the heat
spreader 33. The heat sink 35 has at least one heat sink hole 35a. The heat
spreader 33 is a thermally conductive mounting plate having a threaded hole 32.
The heat sink 35 is fixed to the thermally-conductive mounting plate 33 by
means of a screw 39 screwed into the threaded hole 32. A flexible thermally-
conductive member 30 is inserted between the surface-mount-type packages
23 and the heat sink 35. The heat sink 35 is thermally connected to the
secondary integrated circuit chips 23 through the flexible thermally-conductive
members 30, since both the heat sink 35 and the surface-mount-type package
23 are bonded to the flexible thermally-conductive members 30. The heat sink
35 is thermally connected to the primary integrated circuit chip 31 through the
heat spreader 33 and the heat transfer sheet 41, since the heat sink 35 and the
primary integrated circuit chip 31 are bonded to the heat transfer sheet 41 and
the heat spreader 33, respectively.
In the event, since the flexible thermally-conductive members 30
have excellent thermal conductivity as described in the following, a first
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thermally-conductive path between the heat sink 35 and the surface-mount-type
package 23 is low in heat-resistance. Similarly, since the heat spreader 33, theheat transfer sheet 41, and the adhesive 34 have an excellet thermal
conductivity as described in the following, a second thermally-conductive path
between the heat sink 35 and the primary integrated circuit chip 31 is also low
in heat-resistance.
Each of the surface-mount-type packages 23 is a small outline
package (SOP), a small outline j-lead package (SOJ), a thin small outline
package (TSOP), or a similar package. It is desirable that the height of each
of the surface-mount-type packages 23 is the same for connecting fixedly to the
heat sink 35. Each of the secondary integrated circuit chips is a cache memory
and a peripheral circuit in which the heat generation amount is small. The heat
generation amount of each secondary integrated circuit chip is about one-tenth
of that of the primary integrated circuit chip 31. The heat spreader 33 is
opposed to the primary integrated circuit chip 31, and is located just above
same. The height of the heat spreader 33 is higher than that of each of the
surface-mount-type packages 23. The heat spreader 33 consists of a material
having both excellent thermal conductivity and excellent mechanical strength.
The heat spreader 33 needs excellent thermal conductivity so as to easily
conduct the heat of the primary integrated circuit chip 31 to the heat sink 35.
The heat spreader 33 needs excellent mechanical strength to prevent distortion,
since the heat sink 35 is fixed to the heat spreader 33 by screwing. Preferably,the material of the heat spreader 33 is an alloy of aluminium, a sintered alloy
of copper and molybdenum, a sintered alloy of copper and tungsten, or a similar
material. The heat spreader 33 is fixed to the substrate 22 by an adhesive 34.
The adhesive 34 must consist of an excellent thermally-conductive material. For
example, the adhesive 34 may be a solder.
As shown in Figures 7 and 8, the heat sink 35 covers over the
multi-chip module 38. The heat sink 35 consists of a plurality of fins and a base
plate. The heat sink 35 has two holes 35a to insert the screw 39 at a center
thereof. The heat sink 35 may consist of aluminium, which is an excellent
CA 02221~02 1997-12-19
thermally-conductive material. The flexible thermally-conductive members 30
consist of an excellent thermally-conductive and flexible material. The flexiblethermally-conductive members 30 need the excellent thermal conductivity, since
it facilitates conduction of the heat of the surface-mount-type packages 23 to the
heat sink 35. The flexible thermally-conductive members 30 need excellent
flexibility, since they must absorb both the variation of height of the surface-mount-type packages 23 and warping of the heat sink 35. Preferably, the
material of the flexible thermally-conductive members 30 is a silicon-rubber
sheet consisting of a silicon resin and fine particles. The material of the fine10 particles is metal oxide, silicon carbide, boron nitride, or the like. The heat
transfer sheet consists of a soft material which has excellent thermal
conduction. For example, the heat transfer sheet 41 is a silicon-rubber sheet,
a lead foil, solder foil, or the like.
The description will next proceed to thermal conduction according
15 to the first embodiment. The heat generated from the primary integrated circuit
chip 31 is conducted in the following order: the primary integrated circuit chip31, the substrate 22, the adhesive 34, the heat spreader 33, the heat transfer
sheet 41, and the heat sink 35.
The heat reaching the heat sink 35 is dissipated into the air. The
20 heat generated from the surface-mount-type packages 23 is conducted in the
following order: the surface-mount-type packages 23, the flexible thermal
conductive member 30, and the heat sink 35. The heat reaching the heat sink
35 is dissipated into the air.
According to the first embodiment, since both the first thermally-
25 conductive path and the second thermally-conductive path are formed
simultaneously in the multi-chip package, it is possible to cool simultaneously
the surface-mount-type packages 23 and the primary integrated circuit chip 31.
In detail, according to the first embodiment, there can be obtained five
advantageous effects as follows.
Firstly, since the first thermally-conductive path is formed by the
heat spreader 33, it is possible to dissipate effficiently the heat of the primary
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integrated circuit chip 31 in which the rate of heat generation is large.
Secondly, since the second thermnally-conductive path is formed by the flexible
thermally-conductive member 30, it is possible to dissipate efficiently not onlythe heat of the primary integrated circuit chip 31 but also that of the surface-
5 mount-type packages 23. Thirdly, since it is possible to dissipate effficiently the
heat of the surface-mount-type packages 23, it is unnecessary to cover the
surface mount-type packages 23 by potting and to constitute the surface-mount-
type packages 23 as a bare chip. Therefore, it is possible to easily attach and
detach the surface-mount-type packages 23. Fourthly, since it is not necessary
10 to constitute the surface-mount-type packages 23 as a bare chip, it is possible
to easily inspect the secondary integrated circuit chips received in the surface-
mount-type packages 23. In addition, since it is possible to inspect the surface-
mount-type packages 23 before mounting same, the yield of the multi-chip
module 38 improves. Fifthly, since the heat sink 35 is fixed to the heat spreader
33 by screwing the screw 39 into the threaded hole 32, it is easy to detach the
heat sink 35. Therefore, it is easy to change the surface-mount-type packages
23 in the event of a failure.
Referring to Figure 9, the description will next proceed to a multi-
chip package for cooling a multi-chip module according to a second embodiment
of the present invention. The illustrated multi-chip package is similar to that
illustrated in Figure 4, except that the dissipation section 37 is modified into a
dissipation section 47. The similar parts are represented by the same
references as in Figures 1 to 8.
As shown in Figure 9, the dissipation section 47 comprises a heat
sink 45, a stud member 43, and a nut 48. The heat sink 45 has a convex
section 46. The convex section 46 is opposed to the primary integrated circuit
chip 31. The heat sink 45 is thermally connected to the primary integrated
circuit chip 31 through the convex section 46. The convex section 46 has a
hole 45a at a center thereof. The stud member 43 comprises a rod section and
a board section for fixing the heat sink 45 to the substrate 22, with the rod
section inserted in the hole 45a and with the board section disposed between
CA 02221~02 1997-12-19
the heat sink 45 and the substrate 22. The rod section has a threaded end.
The stud member 43 is composed of an excellent thermally-conductive material.
The stud member 43 needs the excellent thermal conductivity in order to easily
conduct heat from the primary integrated circuit chip 31 to the heat sink 45.
The stud member 43 is fixed to the substrate 22 by an adhesive 34. A heat
transfer sheet 41 is coated on the board section. The heat sink 45 is mounted
on the heat transfer sheet 41. The heat sink 45 is thermally connected to the
secondary integrated circuit chips (not shown) and to the primary integrated
circuit chip 31 through the stud member 43. The heat sink 45 is fixed to the
substrate 22 by screwing the nut 48 to the threaded end. The flexible thermally-conductive members 30 are disposed between the surface-mount-type packages
23 and the heat sink 45. The heat sink 45 is thermally connected to the
secondary integrated circuit chips 23 through the flexible thermally-conductive
members 30, since both the heat sink 45 and the surface-mount-type package
23 are bonded to the flexible thermally-conductive members 30. The heat sink
45 is thermally connected to the primary integrated circuit chip 31 through the
stud member 43 and the heat transfer sheet 41, since the heat sink 45 and the
primary integrated circuit chip 31 are bonded to the heat transfer sheet 41 and
the stud member 43, respectively.
In the event, since the flexible thermally-conductive members 30
have excellent thermal conductivity as described in the following, a first
thermally-conductive path between the heat sink 35 and the surface-mount-type
package 23 is low in heat resistance. Similarly, since the stud member 43, the
heat transfer sheet 41, and the adhesive 34 have excellent thermal conductivity
as described in the following, a second thermally-conductive path between the
heat sink 45 and the primary integrated circuit chip 31 is low in heat resistance.
The heat generated from the primary integrated circuit chip 31 is conducted in
the following order: the primary integrated circuit chip 31, the substrate 22, the
adhesive 34, the stud member 43, the heat transfer sheet 41, and the heat sink
45. The heat reaching the heat sink 45 is dissipated in the air. The heat
generated from the surface-mount-type packages 23 is conducted in the
CA 02221~02 1997-12-19
following order: the surface-mount-type packages 23, the flexible thermal
conductive member 30, and the heat sink 45. The heat reaching the heat sink
45 is dissipated in the air. According to this second embodiment, there can be
obtained advantageous effects similar to those of the first embodiment.
Referring to Figure 10, the description will now proceed to a multi-
chip package for cooling a multi-chip module according to a third embodiment
of the present invention. The illustrated multi-chip package is similar to that
illustrated in Figure 4 except that the flexible thermally-conductive member 30
is modified into a thermally-conductive spring 54. The similar parts are
10 represented by the same references as in Figures 1 to 8.
In Figure 10, each of the thermally-conductive springs 54 is
inserted between the surface-mount-type packages 23 and the heat sink 35.
The heat sink 35 is thermally connected to the secondary integrated circuit chips
23 through the thermally-conductive springs 54, since both the heat sink 35 and
15 the surface-mount-type page 23 are secured to the thermally-conductive springs
54 by elastic displacement. The heat generated from the surface-mount-type
packages 23 is conducted in the following order: the surface-mount-type
packages 23, the thermally-conductive spring 54, and the heat sink 35. The
heat reaching the heat sink 35 is dissipated in the air.
The thermally-conductive springs 54 are composed of an excellent
thermally-conductive material. The thermally-conductive springs 54 need the
excellent thermal conductivity in order to easily conduct the heat of the surface-
mount-type packages 23 to the heat sink 35.
According to this third embodiment, it is possible to detach the
25 thermally-conductive springs 54 at the same time that the heat sink 35 is
detached. Therefore, it is easy to change the surface-mount-type packages 23.
In addition, according to the third embodiment, there can be
obtained advantageous effects similar to those of the first embodiment.
Referring to Figure 11, the description will next proceed to a
30 shielding package for shielding a semiconductor device from electromagnetic
interference according to a fourth embodiment of the present invention.
CA 0222l~02 l997-l2-l9
12
In Figure 11, the shielding package comprises a dissipation section
77 and a connecting section 78. The dissipation section 77 comprises a heat
spreader 33 and a heat sink 75. The connecting section 78 comprises the
semiconductor device 61, a connector 67, and a wiring board 66. The
5 semiconductor device 61 comprises a substrate 62 having upper and lower
surfaces and having a plurality of inpuVoutput pins 65. The primary integrated
circuit chip 31 is mounted on the lower surface of the substrate 62. The heat
spreader 33 is mounted on the upper surface of the substrate 62. The heat sink
75 is thermally connected to the primary integrated circuit chip 31 through the
10 heat spreader 33. The heat sink 75 has electrical conductivity. The heat sink75 comprises a base plate and two connecting members 64 which
perpendicularly extend from the base plate. Two connecting members 64 are
illustrated in Figure 11. A wiring board 66 has a plurality of contact holes 81
and four contact slits 82. The connector 67 is mounted on the wiring board 66.
15 The connector has a plurality of contacts 68 which comprise a plurality of socket
portions 83 and a plurality of terminal portions 84. The contacts 68 are
connected to the inpuVoutput pins 65, with the inpuVoutput pins 65 inserted intothe respective socket portions. The terminalportions 84 are inserted into
respective contact holes 81. The connector 67 has two ground contacts 69
20 comprised of respective ground socket portions 85 and ground terminal portions
86. Each of two ground socket portions 85 has two ground socket elements
and two ground terminal elements. Two ground contacts 69 are electrically
connected to two connecting members 64 which are inserted into two ground
socket elements. Each ground terminal element is inserted into a respective
25 contact slit 82. Two ground contacts 69 are connected to electric ground (notshown). Both ground contacts 69 and the primary integrated circuit chip 31 are
insulated from each other. The connector 67 has a lever 60 for operating an
inserting/withdrawing mechanism formed in the connector 67. The inpuVoutput
pins 65 switch by operating the lever 60. The lever 60 is formed on the outside
30 of the heat sink 75. Therefore, it is possible to operate the lever 60 without
detaching the heat sink 75. The heat sink 75 is composed of an alloy of
CA 02221~02 1997-12-19
aluminium or an alloy of copper. An electrically-conductive coating is provided
on the surface of the heat sink 75. For example, there is used a nickel plating
as the electrically-conductive coating.
The heat sink 75 has at least one heat sink hole. The heat
5 spreader 33 is a thermally-conductive mounting plate in which a threaded hole
32 is provided. The heat sink 35 is fixed to the thermally-conductive mounting
plate by screwing a screw 39 into the threaded hole 32.
When the substrate 62 is connected to the wiring board 66, the
inpuVoutput pins 65 are inserted into the contact holes 81. Simultaneously, two
10 connecting members 64 are connected to two ground contact 69. Thereafcter,
when the lever 60 is operated by the operator, the inpuVoutput pins 65 are held
by the socket portions 83. In the event, the substrate 62 moves in a direction
parallel to the plane of the wiring board 66, at the same time that the heat sink
75 moves in the above-mentioned direction.
The substrate 62 is surrounded by two connecting members 64.
The heat sink 75 is connected to the electric ground (not shown) through the
ground contact 69. Therefore, an electromagnetic wave generated from the
primary integrated circuit chip 31 is absorbed into the heat sink 75 and two
connecting members 64. When the connector 67 is the connector by which the
substrate 62 does not move in the inserting direction of the connecting
members, it is possible to form four connecting members so that the primary
integrated circuit chip 31 is surrounded by four connecting members. In the
event, the electromagnetic wave from outside the connecting members is
perfectly shielded.
According to this fourth embodiment, since the heat sink 75
connects to the electric ground through the ground contact 69, it is easy to
attach and detach the heat sink 75. In addition, since the substrate 62 is fixedto the heat sink 75, it is possible to attach the heat sink 75 and the substrate 62
simultaneously. Similarly, it is possible to detach the heat sink 75 and the
substrate 62 simultaneously.
CA 0222l~02 l997-l2-l9
14
Referring to Figure 12, the description will proceed to a shielding
package for shielding the semiconductor device from electromagnetic
interference according to a fifth embodiment of the present invention. The
illustrated shielding package is similar to that illustrated in Figure 11 except that
the dissipation section 77 is modified into a dissipation section 87. The similar
parts are represented by the same references as in Figure 11.
As shown in Figure 12, the dissipation section 87 comprises a heat
sink 95, a stud member 43, and a nut 48. The heat sink 95 has a convex
section 46. The convex section is opposed to the primary integrated circuit chip10 31. The heat sink 95 is thermally connected to the primary integrated circuitchip 31 through the convex section. The convex section has a hole 45a at a
center thereof. The stud member 43 comprises a rod section and a board
section for fixing the heat sink 95 to the substrate 62 with the rod section
inserted in the hole 45a, and with the board section disposed between the heat
15 sink 95 and the substrate 62. The rod section has a threaded end. The stud
member 43 is composed of an excellent thermally-conductive material. The
stud member 43 needs the excellent thermal conductivity in order to easily
conduct heat from the primary integrated circuit chip 31 to the heat sink 95.
The stud member 43 is fixed to the substrate 22 by an adhesive 34. A heat
20 transfer sheet 41 is coated on the board section. The heat sink 95 is mountedon the heat transfer sheet 41. The heat sink 95 is thermally connected to the
secondary integrated circuit chips (not shown) and to the primary integrated
circuit chip 31 through the stud member 43. The heat sink 45 is fixed to the
substrate 62 by screwing the nut 48 to the threaded end.
According to this fifth embodiment, there can be obtained
advantageous effects similar to that of the fourth embodiment.
Referring to Figure 13, the description will proceed to a multi-chip
shielding package for shielding the semiconductor device from electromagnetic
interference and for cooling the multi-chip module according to a sixth
30 embodiment of the present invention. The sixth embodiment is a combination
of the first embodiment and the fourth embodiment. According to the sixth
CA 02221~02 1997-12-19
embodiment, there can be obtained advantageous effects similar to those of the
first embodiment and the fourth embodiment.
While this invention has thus far been described in conjunction with
the preferred embodiments thereof, it will now readily be possible for those
5 skilled in the art to develop various other embodiments of this invention. For example, the multi-chip package may be a combination of the second
embodiment and the third embodiment. The multi-chip shielding package may
be a combination of the first embodiment and the fifth embodiment. The multi-
chip shielding package may be a combination of the second embodiment and
10 the fourth embodiment. The multi-chip shielding package may be a combination
of the second embodiment and the fifth embodiment. The multi-chip shielding
package may be a combination of the third embodiment and the fourth
embodiment. The multi-chip shielding package may be a combination of the
third embodiment and the fifth embodiment.
