Note: Descriptions are shown in the official language in which they were submitted.
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DEVICE AND METHOD FOR THE SYNCHRONIZATION OF
PSEUDO-RANDOM SEQUENCES
BACKGROUND OF THE INVENTION
The invention relates to systems in which the information in binary
form can be transmitted in pseudo-random sequences and, more
particularly in such systems, to a device and method which, upon the
reception of the information sent, enables the synchronization of the
pseudo-random sequences received.
In information transmission systems that are in the form of binary
signals, it is common practice to transmit pseudo-random sequences that
are generated at transmission by a pseudo-random generator designed for
this purpose.
io In the receiver of the binary signals, provision is made to detect
errors by comparing the sequences of binary signals that are received with
the pseudo-random sequences given by a pseudo-random generator
identical to the one used at transmission. The number of errors detected
gives a measure of the quality of transmission. A comparison of this kind
i s is valid only if the pseudo-random sequences generated at reception are
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synchronized with the sequences received and it is therefore necessary to
provide for a synchronization device at reception.
The presently known synchronization devices have the drawback of
being complex and costly.
s Thus, an aim of the present invention is to make a device for the
synchronization of pseudo-random sequences that is simple while at the
same time enabling fast synchronization.
SUMMARY OF THE INVENTION
The invention relates to a device for the synchronization of pseudo-
to random sequences comprising:
a shift register to which there are applied the binary sequences
received from a remote transmitter,
a generator that provides binary pseudo-random sequences identical
to the binary sequences sent by the remote transmitter,
is a first comparator to compare the binary sequences received with
those provided by said generator and to provide an error signal whenever
there is no identity,
a first counter to count the error signals provided by said first
comparator and to provide a first signal whenever it has reached a first
zo number EMAX, said first signal carrying out the transfer, into the
generator, of the binary word contained in the shift register, and
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a second counter to count the binary signals received and to provide
a second signal whenever it has reached a second number LMAX, said
second signal resetting said first and second counters at zero.
The binary numbers EMA,X and LMAX are determined as a
function of the maximum error rate envisaged for transmission. The binary
numbers EMAX and LMAX may be fixed or adjustable and, in the latter
case, they are compared in comparators with the binary numbers contained
in the first and second counters.
The invention also pertains, in a receiver of binary signals, to a
io method for the synchronization of pseudo-random sequences received
from a remote transmitter comprising the following steps consisting of
the application, to a shift register, of the binary sequences that are
received from a remote transmitter,
the generation, in a generator, of binary pseudo-random sequences
is identical to those of the binary sequences transmitted by the remote
transmitter,
the comparison of the binary sequences received with the binary
pseudo-random sequences generated to provide an error signal whenever
there is no identity,
Zo the counting, in a first counter, of the error signals to give a signal
when the number of errors has reached a value EMAX,
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the transfer of the contents of the shift register into the generator
when the value EMAX is reached,
the counting, in a second counter, of the binary signals received to
provide a signal for the resetting, at regular intervals, of the first and
second counters at zero.
BRIEF DESCRIPTION OF THE DRAWINGS
Other features and advantages of the present invention shall appear
from the following description of a particular embodiment, made with
reference to the appended drawing wherein:
io the single figure is a function drawing of a device for the
synchronization of binary pseudo-random sequences and for the detection
of errors in such sequences according to the invention.
MORE DETAILED DESCRIPTION
During a transmission of binary signals, it is generally assumed that
is the transmitter delivers independent binary elements. To assess the
theoretical performance characteristics of a transmission by means of a
simulation method or to measure its practical performance characteristics,
it is necessary to generate a sequence of binary elements having properties
of self correlation close to those of a random sequences corresponding to
ao independent binary elements. This is the case with the pseudo-random
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sequences that are obtained in a simple manner by means of a generator
comprising essentially a shift register and modulo-2 adders.
Pseudo-random sequences of this kind and the way in which they
are obtained are described in J.C. BIC, D. DUPONTEIL & J.C.
s IMBEALTX, Elements de communications numeri4ues (Elements of Digital
Communications), DUNOD-BORDAS CNET-ENST, 1986, pages 279-
283.
Thus, at the transmission, the binary elements are transmitted in a
pseudo-random sequence that is defined by an m degree primitive
io polynomial h(x) such that:
m
h(x) ~ hex ~
j=0
i s with ho=hm 1 and h~=0 or 1 for j=1, . . . , m-1.
This pseudo-random sequence is a sequence of binary elements a;
verifying the recurrence relationship:
m
~ h~a;+~ = 0
Zo j = 0
At reception, by a receiver 12, the signals transmitted by the
transmitter are detected, amplified and demodulated so that a sequence of
binary elements is obtained. If the transmission has been perfect, i.e.
error-free, this sequence of binary elements reproduces the pseudo-random
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sequence transmitted. To determine whether error is absent or not, it is
enough to compare the sequence of binary elements received with pseudo-
random sequences defined by a primitive polynomial identical to the one
implemented in the generator used at transmission.
s To this end, the sequence of binary signals S2 given by the receiver
12 is applied to an input terminal ES2 of a first comparator 16 whose other
input ES 1 receives a sequence of binary signals S 1 given by the output
terminal S of a generator 18 of pseudo-random sequences. The generator
18, in accordance with what has been described in the book cited here
io above, comprises a shift register with m stages and (m-1 ) modulo-2
adders, each acting on an output terminal of one state and on an input
terminal of the preceding stage except in the case of the first and last
stages.
The output terminal CS of the first comparator 16 gives a signal
is whenever the binary signals compared are not identical. This output
terminal CS is connected, firstly, to an input terminal of a device 28 that
carries out statistical measurements of the errors detected and, secondly, to
an input terminal ENA of a first counter 24 called an error counter.
In order that the comparison performed by the first comparator 16
2o may be valid, it is necessary that the two sequences of binary signals S 1
and S2 should be synchronized. Synchronization is obtained according to
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the invention by simultaneously loading the m stages of the shift register of
the generator 18 with the m binary digits of a shift register 14, one of
whose input terminals ES receives the sequence of binary signals S2
received. This loading is controlled by a signal applied to one of the input
s terminals CH of the generator 18.
The other input terminals K of the generator 18 and of the shift
register 14 respectively receive a clock signal CLK given by the receiver
12. The frequency of this clock signal is that of the binary signals of the
sequence S2. The clock signal CLK is also applied to the device 28.
io The signal for the loading of the generator 18 is given by the first
counter 24 when it reaches a certain number ENZAX. This number EMAX
may be fixed, in which case it is detected by a decoding circuit (not
shown), or it may be variable, in which case it is detected by a first
comparator 26 which receives, firstly, the number EMAX given by the
i s receiver 12 and, secondly, the signals of the binary digits of the counter
24. Whenever the number EMAX is reached, the comparator 26 gives a
signal, at its output terminal CP2, for the loading of the generator 18 with
the m-digit code contained in the shift register 14.
The frequency of this loading depends on the number EMAX and on
ao the frequency of the errors. This frequency is high when there is no
synchronization so that the generator 18 is often reinitialized in the event
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of desynchronization. This makes it possible to obtain a synchronization
that is all the faster as EMAX is small.
When the synchronization has been obtained, and depending on the
quality of the transmission, errors are detected by the comparator 16. This
s increases the contents of the counter 24. The contents of the counter 24
reach the value EMAX. This will prompt a transfer from the shift register
14 to the pseudo-random generator 18 while there is synchronization.
Thus, to prevent any unnecessary transfer of this kind that could
disturb the synchronization acquired, the invention provides for the
io resetting of the error counter 24 after a certain period of time LMAX
defined by a second counter 20 which counts the clock signals CLK
applied to its input terminal K, the frequency of the clock signals CLK
corresponding to the frequency of the binary signals received.
By this resetting operation, the error counter recommences a
is counting cycle before reaching EMAX. This value EMAX has been
chosen so that it is not reached after a counting period LMAX when the
error rate is below a certain threshold, for example 1 %.
This counting duration or temporal window LMAX may be fixed, in
which case it is detected by a decoding circuit (not shown) or else it may
2o be variable, in which case it is detected by a second comparator 22 which
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receives, firstly, the binary number LMAX given by the receiver 12 and,
secondly, the signals of the binary digits of the counter 20.
Whenever the number LMAX is reached, the comparator 22 gives a
signal, at its output terminal CP1, for the resetting of the first and second
s counters 24, 20. This signal is applied to the input terminal RST of these
counters.
The values of EMAX and LMAX are determined as a function of a
number of criteria, the chief one of which is the maximum error rate
envisaged for the transmission. These values are adjusted to optimize the
io synchronization time and to adapt to the different transmission error
rates.
By way of an indication, for a pseudo-random code with m = 23 bits
and a maximum error rate of 10%, the value of EMAX has been chosen to
be 256 and the value of LMAX has been chosen to be 1024.
The single figure enables the definition of a method for the
is synchronization of pseudo-random sequences received from a remote
transmitter, this method comprising the steps consisting of
the application, to a shift register 14, of the binary sequences
received from a remote transmitter,
the generation, in a generator 18, of binary pseudo-random
Zo sequences identical to the binary sequences sent by the remote transmitter,
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the comparison of the binary sequences received with the pseudo-
random binary sequences generated to provide an error signal whenever
there is no identity,
the counting, in a first counter 24, of the error signals to provide a
s signal when the number of errors has reached a value EMAX,
the transfer of the contents of the shift register 14 into the generator
18 when the value EMAX is reached,
the counting, in a second counter 20, of the binary signals received
to provide a signal for the resetting at regular intervals, of the first and
io second counters.
