Note: Descriptions are shown in the official language in which they were submitted.
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METHOD FOR SOFTWARE DRIVEN GENERATION OF MULTIPLE
SIMULTANEOUS HIGH SPEED PULSE WIDTH MODULATED SIGNALS
Cross-Reference to Related Applications
This application claims priority to and incorporates by reference the
following
United States patent applications: Multicolored LED Lighting Method and
Apparatus
United States patent application, filed August 27, 1997, naming George Mueller
and
Ihor Lys as inventors; Digitally Controlled Light Emitting Diode Systems and
Methods,
United States provisional patent application, filed December 17, 1997, naming
George
Mueller and Ihor Lys as inventors; Multi-Color Intelligent Lighting, United
States
provisional patent application, filed December 24, 1997, naming George Mueller
and
Ihor Lys as inventors; Digital Lighting Systems, United States provisional
patent
application, filed March 20, 1998, naming Ihor Lys as inventor; and System and
Method
for Controlled Illumination, United States provisional patent application,
filed March
25, 1998, naming George Mueller and Ihor Lys as inventors, United States
patent
application Serial No. 09/215,624 filed on December 17, 1998, United States
patent
application Serial No. 09/213,537 filed on December 17, 1998, United States
patent
application Serial No. 09/213,607 filed on December 17, 1998, United States
patent
application Serial No. 09/213,189 filed on December 17, 1998, United States
patent
application Serial No. 09/213,548 filed on December 17, 1998, United States
patent
application Serial No. 09/213,581 filed on December 17, 1998, United States
patent
application Serial No. 09/213,659 filed on December 17, 1998, United States
patent
application Serial No. 09/213,540 filed on December 17, 1998, and PCT
application
No. US98/26853 filed on December 17, 1998.
Field of the Invention
This application relates to systems and methods for the generation of pulse
width
modulated signals for lighting or for other purposes.
Back oun of The Invention
Pulse width modulation (PWM) is a common technique for controlling the z
amount of power that is delivered to a device, such as a motor or a lamp. One
of the
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main benefits of PWM is that it is a technique that allows a digital system to
achieve
relatively high resolution control over the operation of a particular device.
For example
PWM is a technique commonly employed in motor control to allow a digital
signal to
control the speed of a motor. Specifically, PWM takes advantage of the fact
that a
motor is an inductive element that acts like an integrator. Accordingly, the
application
to that motor of a pulsed digital signal results in the motor integrating over
the square_
wave of the pulsed digital signal. By selecting the proper duty cycle and
frequency for
the PWM signal with respect to the time response of the particular motor under
control,
the pulsed signal will appear to the motor as a DC signal at a voltage level
that is
intermediate between the high and low voltage levels of the pulsed digital
power signal.
Accordingly, pulse width modulation is a technique that allows a digital
output signal to
effectively achieve control over a device as if the digital output signal
could be set to an
intermediate voltage level.
Traditional methods of providing pulse width modulated signals include
employing data processing systems that have software timers which control the
pulse
modulation of a particular output. However, although these systems can work
quite
well, it is often not cost effective to dedicate a data processing platform to
the task of
running timer modules for a PWM application.
Other techniques include interrupt driven processes in which a microprocessor,
such as one having a watchdog timer, receives periodic interrupts at a known
rate. Each
time through the interrupt loop the processor updates one or more output pins,
thus
creating a pulse width modulated signal on each output pin: In this case, the
rate at _
which a signal can be modulated is the clock speed multiplied by the number of
cycles
in the interrupt routine. For interrupt routines that control multiple
channels, the number
of instructions in the interrupt routine and therefore the number of clock
cycles, can be
quite large. Thus, the time period for executing the update instructions can
be
significant, and the PWM signal may have poor resolution, lacking fine grain
control
over the system. Still other techniques exist which are effectively
combinations of the
first two processes, software loops that contain a variable number of
instructions for
these techniques. The processor uses the hardware timer to generate a periodic
interrupt,
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and then, depending on whether the pulse is to be very short or not, either
schedules
another interrupt to finish the PWM cycle, or creates the pulse by itself in
the first
interrupt routine by executing a series of instructions consuming a desired
amount of
time between two PWM signal updates. The difficulty with this method is that
for
multiple PWM channels it is very difficult to arrange the timer based signal
updates
such that they do not overlap, and then to accurately change the update times
for a new
value of PWM signals.
Accordingly, a method is needed to provide multiple PWM channels without the
problems of these traditional methods. Moreover, there is a need to provide a
PWM
technique that provides fine resolution over multiple channels, and be
executed on an
inexpensive micro controller or microprocessor platform.
Summar5r Of The Invention
The present disclosure provides methods and systems to generate multiple
channels of pulse width modulated signals for any purpose using software
techniques at
speeds exceeding those commonly achievable with traditional software
synthesis.
In particular, the systems and methods described herein provide, in one
aspect, a
method for modulating the pulse width of control signals generated on a
plurality of
separate channels. In one practice, the methods described herein are suitable
for
execution on a microprocessor or micro controller platform that includes a
timer
interrupt mechanism which will generate an interrupt in response to a timer
counting
down a selected time interval or time period. In one practice, the timer is
set to count
down a period of time that is representative of a portion, or sub period, of
the PWM
cycle. For example, the timer can be selected to count down one fourth the
time period
of one PWM cycle. Upon expiration of that time period, the timer executes an
interrupt
that causes the micro controller to enter an interrupt service routine (ISR).
The ISR can review a set of pre-computed values each of which represents the
value for a modulated channel for a specific sub period of the PWM cycle. The
ISR can
then write to the I/O pins that are associated with the different modulated
channels to set
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the level of the respective PWM signal on each of the I/O pins. The ISR can
then
determine for that duty cycle which channel is to be further modulated. For
example,
for a PWM signal that has been subdivided into four sub periods, the ISR can
determine
that for the first of these sub period, the ISR is to further modulate the PWM
signal on
the first channel. Similarly, when the ISR occurs during the second sub
period, the ISR
can modulate the second channel. In any case, once the ISR has determined
which
channel to modulate the ISR can modify the signal level on the I/O pin
associated with
that channel, and execute a delay loop to consume the desired amount of time
to
maintain the channel in its toggled state. Once the delay loop has been
completed the
ISR can execute another I/O write operation to toggle the modulated signal to
its
previous state. The ISR can then advance the sub-bookkeeping value to point to
the
next sub period, and terminate processing. Upon termination of the ISR, the
microprocessor or controller platform can go back to normal operation with the
timer
still being set to trigger upon the lapse of a time interval associated with a
sub period of
the PWM cycle.
In one practice, the systems and methods described herein provide control
systems that allow for the modulation of a lamp that includes a red, green,
and blue
component. Each color component of the lamp can be associated with a
particular
channel. Each channel can be separately modulated to control the amount of
red, green,
or blue in the composite light generated by the lamp. Accordingly, the systems
and
methods described herein allow for the modulation of the hue of light
generated by a
colored lamp.
Brief description of the fi~~s_
The systems and methods of invention will be understood more clearly from a
review of certain illustrated embodiments, which include the following:
Fig. 1 depicts one embodiment of a system for modulating the hue of light
generated by a color lamp;
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Fig. 2 depicts pictorially one cycle of a PWM signal generated across three
separate channels, each channel being associated with one color component of
the lamp
depicted in Fig. 1;
Fig. 3 depicts a flow chart diagram of an intemzpt service routine suitable
for use
with the system depicted in Fig. 1; and
Fig. 4 depicts two PWM channels modulated by an interrupt service routine as
shown in Fig. 3.
Detailed Description of the Preferred Illustrater~ Fmhnri;ment
The invention will now be set forth with reference to certain illustrated
embodiments, including control systems that allow for the modulation of the
hue of
colored light generated by a lamp having a red, green and blue component.
However, it
will be understood by those of ordinary skill in the art that these
illustrated embodiments
are merely representative of the systems and methods that are provided by the
invention
and that other embodiments can be realized without departing from the scope of
the
invention. For example, the systems and methods described herein can further
be
employed for providing PWM control systems suitable for controlling the
operation of a
motor, including controlling the speed at which the motor rotates. Further, it
will be
understood that the systems and methods described herein can be employed for
controlling the power delivered to an electronic device, including a
traditional
incandescent lightbulb, for controlling the brightness at which the light
radiates. Other
embodiments can be realized, and the actual implementation of these other
embodiments can vary depending upon the application at hand.
Fig. 1 depicts one system 10 that includes a microcontroller element 12, an
amplifier 14, and a colored light 18 that includes three colored lamps
depicted as a red
lamp 20, green lamp 22 and blue lamp 24. As shown in Fig. 1, the
microcontroller 12
couples to the amplifier 14 via three separate channels. Similarly, the
amplifier couples
to the lamp 18 via three separate channels. Each of the three channels can be
associated
with one PWM signal that modulates the operation of a respective one of the
colored
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lamps 20, 22 and 24. Each of the elements depicted in Fig. 1 cooperate to
provide a
system that can modulate the relative intensities of each of the colored lamps
20, 22 and
24 to control the overall hue of the light generated by the lamp 18.
S To this end, the system 10 depicted in Fig. 1 can include a microcontroller
12
that can be a conventional microcontroller such as any of the controllers
available _
commercially including those available from the Microchip Company, including
any of
the PIC family of microcontrollers including the PICmicro 16CXX/17CXX family
of
microcontrollers. Alternatively, the system 10 can include a microprocessor
that can
access an external memory device for receiving instructions for operating as a
system
according to the invention. It will further be understood that those of
ordinary skill in
the art that other configurations can be employed for providing a data
processing
platform capable of implementing the systems and methods described herein.
However,
it will be understood by those of ordinary skill in the art that the systems
and methods
1 S described herein provide for low-cost control systems that can be operated
on
lightweight inexpensive data processing platforms such as one time
programmable
microcontrollers.
As is generally known, the microcontroller 12 can include I/O pins, each of
which can be employed for carrying a control signal, such as the PWM signals
described
herein. Each I/O pin can provide a channel for one of the colored lamp
components 20,
22 and 24.
To aid in controlling the light 18, the system 10 includes an optional
amplifier _
element 14. The amplifier element 14 can be a power amplifier that amplifies a
digital
control signal, such as a TTL logic level signal usually having low power. The
optional
amplifier 14 can act to increase the power level of the signal generated by
the
microcontroller to provide a signal capable of powering the lamp components
20, 22
and 24. The development of such power amplifiers is well-known in the art, and
any
suitable power amplifier can be practiced with the systems described herein
without
departing from the scope hereof. Moreover, it will be understood that the
amplifier
element l4 is optional and that in some embodiments, no power amplifier will
be
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necessary as the power required to activate either of the lamp components can
be
sufficiently generated by the microcontroller 12, or by another platform
capable of
generating the PWM signals. It will further be understood that although the
amplifier 14
is depicted as a separate element, the amplifier 14 could be integrated into
the lamp
component 18. Other suitable modifications to the system 10 for integrating or
modifying the system 10 to accommodate the power needs of the devices under
control
can be practiced herewith without departing from the scope of the invention.
Figs. 2 and 3 depict pictorially the operation of the system 10. Specifically,
Fig.
2 depicts the PWM signals that can be generated on the I/O pins of the
microcontroller
12. The duty cycles shown in Fig. 2 can be generated, in part, by the action
of an
interrupt service routine (ISR) that operates, for example, as shown in the
flow chart
diagram of Fig. 3. Specifically, Fig. 2 shows that a period P can be
subdivided into four
sub periods, depicted in Fig. 2 as subperiods 1, 2, 3 and 4. The exemplary
period of Fig.
2 lasts for about 1/5,000 seconds in length, with each subperiod being
substantially one
fourth of that duration. The actual duration of the time period will vary
according to the
application. Moreover, it will be understood that the systems described herein
can be
employed to generate systems with variable time periods P.
In one practice, the time period for each subperiod can be entered into a
watchdog timer within the microcontroller. The watchdog timer can trigger an
interrupt
each time the subperiod lapses so that an interrupt is generated that causes
the
microcontroller 12 to enter an ISR associated with the timer interrupt. One
such ISR is
depicted in Fig. 3. Specifically, Fig. 3 shows an ISR process 50 that begins
in a step 52_
wherein in response to an interrupt occurring, the microcontroller exits out
of its current
control program and enters an ISR that is associated with that interrupt and
that will be
executed until completion.
The design and development of such ISRs is well known in the art and follows
from general principals in the art of computer science and embedded systems.
In
particular, ISR 50 depicted in Fig. 4 includes a number of steps including
step 52
wherein the ISR writes to a port, typically understood as an I/O port on the
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microcontroller. Similarly, in a step 56, the ISR chooses a channel or
channels wherein
these channels are to be further modulated, as will be described in detail
below. The
additional modulation takes place by operation of steps 58 through 62 wherein
a write
operation takes place to toggle the value of the channel and wherein a delay
loop
maintains the channel in this toggled state for a predetermined or preselected
period of
time. Once that time period has lapsed, the process 50 can proceed from step
60 to _
step 62 wherein a further write operation can take place to toggle the channel
back to its
original value. The steps of the ISR depicted in Fig. 4 will now be described
in more
detail with reference to Fig. 3 which depicts the modulation of three PWM
channels by
a system that includes an ISR process such as the ISR process 50 depicted in
Fig. 4.
To generate a plurality of PWM signals, e.g. N PWM signals, the processor of
the micro controller can schedule an interrupt of at least N equal sub
periods. Each sub
period can be associated with a global PWM update procedure, and a vernier
update
procedure. The sub periods can be denoted by Pi where the first sub period is
one, the
second is 2 and so on. This is shown in Fig. 2 by the PWM cycle period 40 that
shows
the PWM cycle as subdivided into four sub periods. Also depicted in Fig. 2 is
that the
sub period corresponds to the entry of an ISR. This is depicted in Fig. 2 by
the
demarcations 44 that correspond to the beginning of each of the sub periods.
In each sub period, which begins with an interrupt, the ISR executes a series
of
operations that modulates the PWM signals of the channels 32, 34 and 38, each
of which
corresponds to a respective one of the red, green and blue lamps depicted in
Fig. 1. To
this end, the ISR can update all PWM signals by selecting from a set of pre-
computed
values corresponding to the specific sub period. This can entail a single
array read,
followed by a single write to update the multiple I/O pins on which the PWM
signals are
generated. For example, Fig. 2 show that when the ISR entry occurs at the
beginning of
sub period 2, each PWM channel can be modified as a function of the pre-
computed
values. For example, Fig. 2 shows that upon entry into the ISR at the
beginning of sub
period 2, the system will toggle the values of channels 32, 34 and 38, such
that channels
32 and 34 toggle from high to low, and channel 38 toggles from low to high.
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In a next step, the ISR can cause the microcontroller to further modulate the
signal on a selected one or ones of the PWM channels. In Fig. 2, this further
modulation
is shown as the toggling of one of the PWM channels for about one fourth of a
sub-
period. For example, the system in sub period 2 can further modulate the value
of the
PWM channel 34, such that the value of channel 34 toggles from low to high for
about
one quarter of the duration of the sub period 2. This further toggling can be
described as
a "vernier modulation." To accomplish this operation, the system can execute a
write to
the respective I/O pin or pins, execute a series of instructions consuming the
desired
amount of time, and then execute another update, typically an I/O write.
This vernier modulation can reduce or increase the PWM "on" of "off' time, by
changing the state of the signal for a desired portion of the sub period.
There are two
possible cases, either the global update places the signal in the "off' state
and the vernier
routine turns it "on" for a portion of the sub period, or the global update is
"on" and the
vernier routine turns the signal "off' for a portion of the sub period.
In a subsequent step, the system can advance a sub period bookkeeping value to
point to the next sub period, such as for example sub period 3. This positions
the system
for entering into the ISR upon the next interrupt and modulating the next PWM
channel
in the series. Using these methods each PWM channel can change multiple times
per
PWM period. This is advantageous because software can use this property to
further
increase the apparent PWM frequency, while still maintaining a relatively low
interrupt
rate.
The methods described herein reduce the amount of processor time employed for
controlling the modulation period of the PWM channels. For an example,
consider two
signals A and B with a resolution of 20 counts programmed to 7 and 14 counts
respectively. These signals could be depicted as shown in Fig. 4.
In this example the pre-computed update value at Pi=1 is both signals high, or
"on." Signal A then spends some time in the "on" state, while the interrupt
service
routine continues to execute. Signal A then goes low or "off' in the vernier
step at the
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first "v", and the interrupt service routine executes time delay code during
the time
before restoring the signal to the on state at the second "v." For the
depicted signal A,
the vernier occurs for about three counts, including the interrupt time. The
actual time
between the multiple update at the beginning of the sub period and the vernier
update
need not be known, so long as the time spent between the vernier updates is
the desired
time. While the vernier updates are occurring, signal B which was switched on
remains
on and un-affected. When the second interrupt occurs, both signals are
switched off,
and the vernier routine now adds four additional counts to the period of
signal B. In this
example only 7 out of the 20 counts, or 35% of the processor time plus the
time required
for 2 interrupts, has been consumed.
Since only one vernier period is required per signal generated, increasing the
number of periods per PWM cycle can generate non-uniform PWM waveforms at
frequencies higher than those possible on most microprocessors' dedicated
hardware
PWM outputs for a large number of possible output codes. The microprocessor
still
executes interrupts at fixed intervals.
To change the duty cycles of the signals produced, the process described
herein
can asynchronously update any or all of the global or vernier values, in any
order,
without having to synchronize with the ISR, and without stopping the ISR. The
ISR
does not have to change any variables which the main code changes or vice-
versa. Thus
there is no need for interlocks of any kind.
This software routine can thus utilize a single timer to generate multiple PWM
_
signals, with each signal having the resolution of a single processor cycle.
On a
Microchip PIC microprocessor, for example, this allows three PWM signals to be
generated with a resolution of 1024 counts, each corresponding to only a
single
instruction. This allows a PWM period of 1024 instruction cycles, i.e 4882Hz
at a 20
MHZ clock. Furthermore, for counts between 256 and 792 the PWM waveform is a
non-uniform 9765Hz signal, with much lower noise power than the processor's
own
straight PWM generator. Other processors and controllers can yield other PWM
cycles
and timing.
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While the invention has been disclosed in connection with the preferred
embodiments shown and described in detail, various modifications and
improvements
thereon will become readily apparent to those skilled in the art. Accordingly,
the spirit
and scope of the present invention is to be limited only by the following
claims.
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