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Patent 2507276 Summary

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(12) Patent: (11) CA 2507276
(54) English Title: PIXEL CURRENT DRIVER FOR ORGANIC LIGHT EMITTING DIODE DISPLAYS
(54) French Title: CIRCUIT DE COMMANDE DE COURANT DE PIXELS POUR AFFICHAGES A DIODES ELECTROLUMINESCENTES ORGANIQUES
Status: Deemed expired
Bibliographic Data
(51) International Patent Classification (IPC):
  • G09G 5/04 (2006.01)
  • G09G 3/3208 (2016.01)
  • G09G 3/14 (2006.01)
  • H01L 27/32 (2006.01)
  • H01L 27/12 (2006.01)
(72) Inventors :
  • NATHAN, AROKIA (Canada)
  • SERVATI, PEYMAN (Canada)
  • SAKARIYA, KAPIL (Canada)
  • KUMAR, ANIL (Canada)
(73) Owners :
  • IGNIS INNOVATION INC. (Canada)
(71) Applicants :
  • IGNIS INNOVATION INC. (Canada)
(74) Agent: GOWLING WLG (CANADA) LLP
(74) Associate agent:
(45) Issued: 2006-08-22
(22) Filed Date: 2002-02-18
(41) Open to Public Inspection: 2002-08-29
Examination requested: 2005-09-07
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
60/268,900 United States of America 2001-02-16

Abstracts

English Abstract





A pixel driver circuit for driving a colour pixel of a
colour display and a pixel circuit having the pixel driver
circuit are provided. The pixel driver circuit includes a data
line, address lines, switch thin film transistors, feedback thin
film transistors and drive thin film transistors. The pixel
circuit includes organic light emitting diodes, which are driven
by the pixel driver circuit.


Claims

Note: Claims are shown in the official language in which they were submitted.



16

We claim:

1. A pixel driver circuit for driving a colour pixel of a
colour display, the circuit comprising:
a first address line;
a data line;
a first switch thin film transistor, a first node of the
first switch transistor being connected to,the data line and a
gate of the switch transistor being connected to the first
address line;
a feedback thin film transistor, a first node and a gate
of the feedback transistor being connected to a second node of
the first switch transistor and a second node of the feedback
transistor being connected to a ground potential;
a second switch thin film transistor, a source of the
second switch transistor being connected to a second node of the
first switch transistor, a gate of the second switch transistor
being connected to a second address line;
a first drive thin film transistor, a gate of the first
drive transistor being connected to a drain of the second switch
transistor;
a third switch thin film transistor, a source of the third
switch transistor being Connected to the second node of the
first switch transistor, a gate of the third switch transistor
being connected to a third address line;
a second drive thin film transistor, a gate, of the second
drive transistor being connected to the drain of the third
switch transistor;
a fourth switch thin film transistor, a source of the
fourth switch transistor being connected to the second node of
the first switch transistor, a gate of the fourth switch
transistor being connected to a fourth address line; and
a third drive thin film transistor, a gate of the third
drive transitor being connected to the drain of the fourth
switch transistor.


17

2. The pixel driver circuit according to claim 1, wherein at
least one of the thin film transistor is an a-Si:H based thin
film transistor.

3. The pixel driver circuit according to claim 1, wherein at
least one of the thin film transistors is a polycrystalline
silicon based thin film transistor.

4. The pixel driver according to claim 3, wherein the at
least one of the thin film transistors is a p-channel thin film
transistor.

5. The pixel driver circuit according to any one of claims 1-
4, wherein at least one of the thin film transistors is a dual
gate transistor.

6. The pixel driver circuit according to claim 5, wherein the
dual gate is fabricated in a normal inverted staggered TFT
structure.

7. The pixel driver circuit according to claim 5 or 6,
wherein a top gate of the dual gate is grounded.

8. The pixel driver circuit according to any one of claims 5-
7, wherein a top gate of the dual gate is electrically tied to a
bottom gate.

9. The pixel driver circuit according to any of claims 1-8,
wherein the pixel driver circuit is provided for a full colour
display.

10. A pixel circuit comprising:
a pixel driver circuit according to any one of claims 1-9;


18

a first organic light emitting diode, a source of the
first drive transistor being connected to the ground potential
and a drain of the first drive transistor being connected to the
first organic light emitting diode;
a second organic light emitting diode, a source of the
second drive transistor being connected to the ground potential
and a drain of the second drive transistor being connected to
the second organic light emitting diode; and
a third organic light emitting diode, a source of the
third drive transistor being connected to the ground potential
and a drain of the third drive transistor being connected to
the third organic light emitting diode.

11. The pixel circuit according to claim 10 further
comprising:
a first capacitor connected between the gate of the first
drive transistor and the ground potential
a second capacitor connected between the gate of the
second drive transistor and the ground potential; and
a third capacitor connected between the gate of the third
drive transistor and the ground potential.

12. The pixel circuit according to claim 10 or 11, wherein the
first organic light emittingdiode is appropriate for emitting
blue light, the second organic light emitting diode is
appropriate for emitting green light and the third organic light
emitting diode is appropriate for emitting red light.

13. The pixel circuit according to any one of claims 10-12,
wherein the pixel circuit is provided for a full colour display.

Description

Note: Descriptions are shown in the official language in which they were submitted.



CA 02507276 2002-02-18
PIXEh CURRENT DRIVER FOR ORGANIC LIGHT EMITTING DIODE DISPLAYS
BACKGROUND OF THE INVENTION
l.Field of the Invention '
The present invention relates to a an organic light
emitting diode display, and more particularly to a pixel
current driver for an organic light emitting diaplay(OLED),
capable of minimizing parasitic aoupling~ between the OLED and
the transistor layers.
2.Description of the Prior Art
OLED displays have gained significant interest recently
in display applications in view of their faster response
times, larger viewing angles, higher contrast, lighter. weight,
lower power, amenability to flexible substrates, as compared
to liquid crystal displays (LCDs). Despite the OZaED's
demonstrated superiority over the LCD, there still rema~.n,.
several challenging issues related to encapsulation and
lifetime, yield, color efficiency, and drive electronics, ail
of which are receiving considerable attention. Although
passive,matrix addressed OLED displays are already in the
marketplace, they do not support the resolution needed in the
next generation displays, since high information content (HIC)
formats are only possible with the active matrix addressing
. scheme. Active matrix addressing involves a 7.ayer of backplane
electronics, based on thin-film transistors (TFTs) fabricated
using amorphous silicon (a-Si:B), polycrystalline silicon
(poly-Si),. or polymer technologies', to provide . the bias
voltage and drive current needed in each OLED pixel. Here, the
voltage on each pixel is lower and the current throughout the
entire frame period is a low constant value, thus avoiding,th~
excessive peak driving and leakage, currents associated with


CA 02507276 2002-02-18
2
passive matrix addressing. This in turn increases the lifetime
of the 07aED .
In active matrix OLED (AMOL$D) displays, it is important to
ensure that the aperture ratio or fill factor (defined as the
ratio of light emitting display area to the total pixel area)
should be high enough to ensure display quality. Conventional
AMOLED displays are based on light emission through an
aperture on the glass substrate where the backplane
electronics is integrated. Increasing the on-pixel density of
10- TFT integration for stable drive current reduces the size of
the aperture. The same happens when pixel sizes are scaled
down. The solution to having an aperture ratio that is
invariant on scaling or on-pixel integration density is to
vertically stack the O?~ED layer on the backplane electronics,
along with a transparent top electrode (see Fig. 2). In Fig.
2, reference numerals S and D denote a source and a drain
respectively. This implies a continuous back electrode over .
the OLED pixel. However, this continuous back electrode can
give rise to parasitic capacitance, whose effects become
significant when the electrode runs over the .switching'and
other thin film transistors (TFTa). Here, the presence of the
back electrode can induce a parasitic channel in TFTs giving
rise to high leakage current. The leakage 'current is the
current that flows between source and drain of the TFT when
the gate of the TFT.is in its OFF state. .


CA 02507276 2002-02-18
3
Summary of the Invention
According to an aspect of the present invention, there
is provided a pixel driver circuit for driving a colour pixel
of a colour display, which includes: a first address line; a
S data line; a first switch thin film transistor, a first node
of the first switch transistor being connected to the data
line and a gate of the switch transistor being connected to
the first address line; a feedback thin film transistor, a
first node and a gate of the feedback transistor being
connected to a second node of the first switch transistor and
a second node of the feedback transistor being connected to a
ground potential; a second' switch thin film transistor, a ,
source of the second switch transistor being connected to a
second node ofthe first switch transistor, a gate of the
second switch transistor being connected to a second address
line; a first drive thin film transistor, a gate of the first
drive transistor being connected to a drain of the second
switch transistor; a third switch thin film transistor, a
source of the third switch 'transistor being connected to the
second node of the first switch transistor, a gate of the
third .switch transistor being connected to a third address
line; a second drive thin film transistor, a gate, of the
second,drive transistor being connected to the drain of the
third switch transistor; a fourth switch thin film transistor,
a source of the fourth switch transistor being connected to
the second node of the first switch transistor, a gate of the
fourth switch transistor being connected to a fourth address
line; and a third drive thin film transistor, a gate of the
third drive transitor being connected to the drain of the
fourth switch transistor.
According to a further aspect .of the present invention,
there is provided a pixel circuit, which includes: the pixel
driver circuit; a first organic light emitting diode, a source
of the first drive transistor being connected to the ground
potential and a drain of the first drive transistor being


CA 02507276 2002-02-18
4
connected to the first organic light emitting diode; a second
organic light emitting diode, a source of the second drive
transistor being connected to the ground potential and a drain
of the second drive transistor being connected to the second
organic light emitting diode; and a third organic light
emitting diode, a source of the third drive transistor being
connected to the ground potential and a drain of the third
drive transistor being connected to the third organic light
emitting diode.
The pixel current driver is a current mirror based pixel
current driver for automatically compensating for shifts in
the Vth of each of the thin film transistor in a pixel.
The dual gates are fabricated in a normal inverted
staggered TFT structure. A width of each of the TFTs is formed
larger than a length of the same to provide enough spacing
between the source and drain for the top gate. Preferably, the
length is 30um and the width is 1600~Zm. The length and width
of the transistors may change depending on the maximum drive
current required by circuit and the fabrication technology
used. The top gate is grounded or electrically tied to a
bottom gate. The plurality of thin film transistors may be two
thin film transistors formed in voltage-programmed manner or
five thin film transistors formed in a current-programmed
~VT-compensated manner, or four or The OLED layer is
vertically stacked on the plurality of thin film transistors.
With the above structure of an a-Si:H current driver
according to the present invention, the charge induced in the
top channel of the TFT is minimized, and the leakage currents
in the TFT is minimized so as to enhance circuit performance.
BRIEF DESCRIPTION OF THE DRAWINGS
The above objects and features of the present invention
will become more apparent by describing in detail preferred


CA 02507276 2002-02-18
embodiments thereof with reference to the attached drawings in
which:
Fig. 1 shows variation of required pixel areas with
mobility for 2-T and 5-T pixel drivers;
5 Fig. 2, shows a pixel architecture for surface emissive a-
Si:H AMOLED displays;
Fig. 3 shows a cross section of a dual-gate TFT structure;
Fig. 4 shows forward and reverse transfer characteristics
of dual-gate TFT for various top gate biases;
Fig. 5A and Fig. 5B show an equivalent circuit for a 2-T
' pixel driver and its associated input-output timing diagrams;
Fig. 6A and Fig. 6B show an equivalent circuit for a 5-T
pixel driver and its associated input-output timing diagrams;
Fig. 7 shows transient performance of the 5-T driver for
three consecutive write cycles; .
-Fig. 8 shows input-output transfer characteristics for the
2-T pixel driver for different supply voltages; .
Fig. 9 shows.input-output transfer'characteristics for the
5-T pixel driver for different supply voltages;
Fig. 10 shows variation in OLED current as a function of
the normalized shift in threshold voltage;
Fig. il shows a 2-T polysilicon based pixel current driver
having p-channel drive TFTs;
Fig. 12-shows a 4-T pixel current driver-for OLED displays;


CA 02507276 2002-02-18
6
Fig. 13 shows a 4-T pixel current driver with a lower
discharge time;
Fig. 14 shows a 4-T pixel current driver without non-linear
gain;
Fig. 15 shows a 4-T pixel current driver that is the
building block for the full color circuit; and
Fig. 16 shows a full color(RaB) pixel current .driver for
OLED displays.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Although amorphous Si does not enjoy equivalent
electronic properties compared to poly-Si, it adequately meets
many of the drive requirements for small area displays such as
those~needed in pagers, cell phones; and other mobile devices.
Poly-Si TFTs have one key advantage in~that they are able to
provide better pixel drive capability because of their higher
mobility, which can be of the order of ~.~»100ema/Ve. This makes
poly-Si highly desirable for large area (e.g. laptop size) VGA
and SVGA displays. The lower mobility associated with a-Si:H
TFTs (u~-lcm'/Vs) is not a limiting factor since the drive
transistor in the pixel can be scaled up in area to provide
the needed drive,current. The OLED drive current density is
typically IOmA/cm' at 10V operation~to provide a brightness of
100 cd/m' - the required luminance for most displays. For
example, with an a-Si :H TFT mobiJ.ity of 0. 5cm'/Vs and channel
f length of 25~Cm, this drive current requirement translates into
required pixel area of 300 ~.m',. which adequately meets the
requirements of pixel resolution and speed for, some 3 inch
monochrome display applications. Figure 1, illustrates
simulatson results for the variation of the required pixel
size with device mobility calculated for two types of drivers,


CA 02507276 2002-02-18
which will be elaborated later, the 2-T and the 5-T drivers,
wherein uQ denotes a reference mobility whose value is in the
range 0.1 to 1 cm'/Vs. For instance, the area of the pixel for
- the 2-T driver (see Figure 5A) comprises of the area of the
switching transistors, area of the drive transistor, and the
area occupied by interconnects, bias lines, etc. In Fig.
the drive current and frame rate are kept constant at 20~tA and
50Hz, respectively, for a 230 x 230 array. It is clear that
there is no significant savings in area between the 2-T and 5-
T drivers but the savings are considerable with increasing
mobility. This stems mainly from the reduction in the area of
the drive transistor where there is a txade-off between u~ and
TFT aspect ratio, W/L(Wide/Length).
In terms of threshold voltage (V~) uniformity and
stability, both poly-Si and a-Si:H share the same concerns, '
although in comparison, the latter provides for better spatial
uniformity but .not stability (OVT). Thus the inter-pixel
variation in the drive current can be a concern in both cases,
although clever circuit design techniques can be employed to
compensate for AVT hence improving drive current uniformity. In
terms of long term reliability, it is not quite clear with
poly-Si technology, although there are already products based
on a-Si:H technology ,for displays and imaging, although the
reliability issues associated with OLEDs may yet be different.
The fabrication processes associated with a-Si:H technology
are standard and adapted from mainstream integrated cixcuit
(IC) technology; but with capital equipment coats that are
much lower. One of the main advantages of the a-Si:H
technology is that it has become low cost and well-established
technology, while poly-Si has yet to reach the stage of
manufacturability. The technology also holds great promise for
futuristic applications since good as-deposited 'a-Si:H, a-
SiNX:H, and TFT arrays can be achieved at low temperatures


CA 02507276 2002-02-18
g
(s120'C) thus making it amenable to plastic substrates, which '
is a critical requirement for mechanically flexible_displays.
To minimize the conduction induced in all TFTs in the pixel
by the back electrode, an alternate TFT structure based on a
dual-gate structure is employed. In a dual gate TFT (see Fig.
3), a top gate electrode is added to the TFT structure to
prevent the OLED electrodes from biasing the a-Si:H channel
area (refer to Fig. 2). The .voltage on the top gate can be
chosen such so as to minimize the charge induced in the
(parasitic) top channel of the TFT. The objective underlying
the choice of the voltage on the top gate is to minimize
parasitic capacitance in .the driver circuits and leakage
currents in the TFTs so as to enhance circuit performance. In
what follows, the operation of the dual-gate TFT is described,
which will be central to surface emissive (100% aperture
ratio) AMOLED displays based on a-Si:H backplane electronics.
Figure 3 illustrates the structure of a dual-gate TFT
fabricated for this purpose, wherein reference numerals S and
D denote a source and a drain respectively. The fabrication
steps are the say as of that of a normal inverted staggered
TFT structure except that it requires a sixth mask for
patterning the top gate. The length of the TFT is around 30~tm
to provide enough spacing between the source and drain for the
top gate, and the width is made very large (1600pm) with: four
of these TFTs are interconnected in parallel to create a
sizeable leakage current for measurement. A delay time is
inserted in the measurement of the current to ensure that the
measurement has passed the transient period created 'by defects
in the a-Si:H active layer, which give rise to a time-
dependent capacitance.~~ '
Figure 4 shows results of static.current measurements for
four cases:.first when the top gate is tied to -lOV, second
when the top gate is grounded, third when the tvp gate is
f3.oating, and lastly when the top gate is shorted to the


CA 02507276 2002-02-18
9
bottom gate. With a floating top gate, the characteristics are
almost similar to that of a normal single gate TFT. The
leakage currant is relatively high particularly when the top
gate is biased with a negative voltage . The lowest values of
leakage current axe obtained when the top gate is pegged to
either OV or to the voltage of the bottom.gate. In particular,
with the latter the performance of the TFT in the (forward)
sub-threshold regime of operation is significantly improved.
This enhancement in sub-threshold performance can be explained
by the forced shift of the effective conduction path away from
the bottom interface to the bulk a-Si:H region _due to the
positive bias on the top gate. This in turn, decreases the
effect of the trap states at the bottom interface on the sub-
threshold slope of the TFT.
It should be noted that although the addition of another
metal contact as the top gate reduces the leakage current of
the TFT, it can potentially'degrade pixel circuit perfoxmance
by possible parasitic capacitances introduced by vertically
stacking the OLED pixel. Thus the choice of .top gate
connection becomes extremely critical. For example, if the top
gates in, the pixel circuit are connected to the bottom gates
of the associated TFTs, this gives rise to parasitic
capacitances located between the gates and the cathode, which
can lead to undesirable display operation (due to the charging
up of the parasitic capacitance) when the multiplexer O/P
drives the TFT switch. On the other hand, if the top gates are
grounded, this results in the parasitic capacitance being
grounded to yield re7,iable and stable circuit operation.
The OLED drive circuits considered here are the well
known voltage-programmed 2-T driver and the more sophisticated
current-programmed ~V~.-compensated 5-T version (see Figs. 5A
and 6A). The latter is a significant variation of the previous
designs, leading to- reduced pixel area (<300~Zm), reduced
leakage, lower supply voltage (20V), higher linearity (~30dB),


CA 02507276 2002-02-18
1
and larger dynamic range (..40dB). Before dwelling on the
operation of the 5-T driver, the operation of the relatively
simple voyage-driven 2-T driver is described.. Fig. 58 shows
input-output timing diagrams of the 2-T pixel driver. When the
address line is activated, the voltage on the data line starts
charging capacitor C, and the gate capacitance of the driver
transistor Tz. Depending on the voltage on the data line, the .
capacitor charges up to turn the driver transistor T, on, which
then starts conducting to drive the OLED with the appropriate
level of current. When the address line is turned off, T1 is
turned off but the voltage at the gate of TZ remains since the
leakage current of Tl is trivial in comparison. Hence, the
current through the OLED remains~unchanged after the turn off
process. The OLED current changes only the next time around
when a different voltage is written into the pixel.
Unlike the previous driver, the data that is written into
the 5-T pixel in this case is a current (see Fig. 6A). Fig. 6B
shows input-output timing diagrams of a 5-T pixel driver. The
address line voltage, Vad~", and Ia,ta are activated or
deactivated simultaneously. When V,~eee is activated, it forces
T,, and Ta to turn on. Tl immediately starts conducting but Tz
does not since T3 and T, are off . Therefore, the voltages at
the drain and source of T, become equal. The current flow
. through T1 starts charging the gate capacitor of transistors T3
25_ and TS, very much like the 2-T driver. The current of these
transistors start increasing and consequently T1 starts to
conduct current . Therefore, Tl's share of I~"ka reduces and Ta ~ s
share of Iota increases. This process continues until the gate
capacitors-of T3 and TS charge (via Tl) to a voltage that forces
the current of T3 to be I~ta.~At this time, the current of T1 is
zero and the entire I~~ goes through Ta and T3. At the same
time, T5 drives a current through the OLED, which is ideally
equal to I~ta* (WS/W3) , which signifies a current gain. Now if
Iota and V8~,8 are deactivated, Ta will turn off, but due to


CA 02507276 2002-02-18
11
the. presence of eapacitances'in T, and T5, the current of these
two devices cannot be changed easily, since the capaeitances
keep the bias voltages constant. This forces T, to conduct the
same current as that of T3, to enable the driver Ts to drive
the same current into the OLED even when the write period is
over. Writing a new value .into the pixel then changes the
current driven into the OLED.
The result of transient simulation for the 5-T driver
circuit is shown in Fig. 7. Aa can be seen, the circuit has a
write time of <70~,s, which is acceptable for most
applications. The 5-T driver circuit does not increase the
required pixel size significantly (see, Fig. 1) since the sizes
of T2, T3, arid T4 are scaled down. This also provides an
internal gain (WS/W3 = 8), which reduces the required input
current to <2EcA for 10~,A OLED current. The transfer
characteristics for the 2-T and 5-T driver circuits are
illustrated in Figs. 8 and 9, respectively, generated using
reliable physically-based TF~'T models for both forward and
reverse regimes. A much improved linearity (-30dB) in the
transfer characteristics (I~~,/Io~n) is observed for the 5-T
driver circuit due to the geometrically-defined internal pixel
gain as compared to similar designs. In addition, there are
two components (OLED and TS) in the high current path, which in
turn decreases the requixed supply voltage and hence improves
the dynamic range. According to Figure 9, a good dynamic range
(.-4odB) is observed for supply voltage of 20V and drive.
currents in the range IoLEnslO~A, which is realistic for high .
brightness. Figure 10 illustrates variation in the OLED
current with the shift in threshold voltage for the 2-T and 5-
T driver circuits. The 5-T driver circuit compensates for the
shift in threshold voltage ~particulaxly when the shift is
smaller than l0% of the supply voltage. This is because the 5-
T driver circuit is current-programmed. In contrast, the OLED
current in the 2-T circuit changes significantly with a shift


CA 02507276 2002-02-18
12
in threshold voltage. The 5-T driver circuit described here
operates at much lower supply voltages, has a much larger
drive current, and occupies less area. y
The pixel architectures are compatible to surface (top)
emissive AMOhED displays that enables high on-pixel TFT
integration density for uniformity in OLED drive current and
high aperture ratio. A 5-T driver circuit has been described
that provides on-pixel gain, high linearity (-3odB), and high
dynamic range (.-40dB) at low supply voltages (15-20V) compared
to the similar designs. (27V). The results descr ~ed here
illustrate the feasibility of using a-Si:H for 3-i ch mobile
monochrome display applications on both glass and lastic
substrates. With the latter, although the mobility of the TFT
is lower, the size of the drive transistor can be scaled up
yet meeting the requirements on pixel area as depicted in Fig.
1.
Polysilicon has higher electron and hole mobilities than
amorphous silicon. The hole mobilities are large enough to
allow the fabrication of p-channel TFTs.
The advantage of having p-channel TFTs is that bottom
emissive OLEDs can be used along with a p-channel drive TFT to
make a very good current source. One such circuit is shown in
Fig. 11. In Fig. 11, the~source of the p-type drive TFT is
connected to Vdd. Therefore, Vgs, gate-to-source voltage, and
hence the drive current of the p-type TFT is independent of
OLED characteristics. In other words, the driver shown in Fig.
11 performs as a good current source. Hence, bottom emissive
OhEDs are suitable for use with p-channel drive TFTs, and top
emissive OLEDs are suitable for use with n-channel TFTs.
The trade-off with using polysilicon is that the process
of making polysilicon TFTs requires much higher temperatures
than that of amorphous silicon. This high temperature
processing requirement greatly increases the cost, and is not
amenable to plastic substrates. Moreover, polysilicon


CA 02507276 2002-02-18
13
technology is not as mature and widely available as amorphous
silicon. In contrast, amorphous silicon is a well-established
technology currently used in liquid crystal displays (LCDs).
It is due ~to these reasons that amorphous silicon combined
with top emissive OLED based circuit designs is ttiost promising
for AMOLED displays.
Compared to polysilicon TFTs, amorphous silicon TFTs are
n-type and thus are more suitable for top emission circuits as
shown in Fig. 2. However, amorphous silicon TFTs have inherent
stability problems due to the material structure. In amorphous
silicon circuit design, the biggest hurdle is the increase in
threshold voltage Vtb after prolonged gate bias. This shift is
particularly evident in the drive TFT .of an OLED display
pixel. This drive TFT is always .in the .'ON' state, in which
there is a positive voltage at its gate. As a result, its Vt,,
increases and the drive current decreases based on the
current-voltage equation below:
Ids = ( ~.CdxW / 2L ) (V9a -Vth) s (in Saturation region)
In the display, this would mean that the brightness of
the OLED would decrease over time, which is unacceptable.
Hence, Che 2-T circuits shown earlier are not practical for
OLED displays as they do not compensate for any increase in
Va, . .
The first current mirror based pixel driver circuit is
presented, which automatically compensated for shifts in the
r
Vrh of the drive TFT in a pixel. This circuit is the 5-T
circuit shown in Fig. 6A.
Four more OLED pixel driver circuits are presented for
monochrome displays, and one circuit for full colour displays.
All these circuits have mechanisms that automatically
compensate for Vth shift. The first circuit shown in Fig. 12 is
a modification of the 5-T circuit of Fig. ~A. (Transistor T4
has been removed from -the 5-T circuit) . This circuit- occupies
a smaller area than the 5-T circuit, and provides a higher


CA 02507276 2002-02-18
' 14
dynamic range. The higher dynamic range allows for a larger
signal swing at the input, which means that the OLED
brightness'can be adjusted over a larger range.
Fig. 12 shows a 4-T pixel driver circuit for ~OLED
displays . The circuit shown in Fig. 13 is .a 4-T pixel driver
circuit based on a current mirrox. The advantage of this
circuit is that the .discharge time of the capacitor Cs is
substantially reduced. This is because the discharge path has
two TFTs (as compared to three TFTs in the circuit of Fig.
12). The charging time remains the same. The other advantage
is that there is an additional gain provided by this circuit
' ' because T3 and T, do not have the same source voltages.
However, this gain is non-linear and may not be desirable in
some cases.
In Fig. 14, another 4-T circuit is shown. This circuit
does not have the non-linear gain present in the previous
circuit (Fig. 13) since the source terminals of T3 and Ts are
at the same voltage. It still maintains the lower capacitance
discharge time, along with the other features of the circuit
of Fig. 8.
Fig. 15 shows another version of the 4-T circuit. This
. circuit is does not have good current mirror properties.
However, this circuit forms the building block for the 3
colour RGB circuit shown in Fig. 16. It also has a low
capacitance discharge time and high dynamic range.
The full colour circuit shown in Fig. 16 minimizes the
area required by an RGB pixel on a display, while maintaining
the desirable features like threshold voltage shift
compensation, in-pixel current gain, low capacitance discharge
time, and.high dynamic range.
' It is important to note that the dual-gate.TFTs are used
in the above-mentioned circuits to enable vertical integration
of the OhSD - layers rnii~h - minimum parasitic effects. But
nevertheless the -circuit compensates for the Vth shift even if


CA 02507276 2002-02-18
the simple single-gate TFTs. In addition, these circuits use
n-type amorphous silicon TFTs. However, the circuits are
applicable to polysilicon technology using p-type or n-type
TFTs. These circuits when made in polysilicon can compensate
5 for-the non-uniformity of the threshold voltage, which is a
problem in this technology.~The p-type circuits are conjugates
of the above-mentioned circuits and are suitable for the
bottom emissive pixels.

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Administrative Status , Maintenance Fee  and Payment History  should be consulted.

Administrative Status

Title Date
Forecasted Issue Date 2006-08-22
(22) Filed 2002-02-18
(41) Open to Public Inspection 2002-08-29
Examination Requested 2005-09-07
(45) Issued 2006-08-22
Deemed Expired 2012-02-20

Abandonment History

There is no abandonment history.

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Registration of a document - section 124 $100.00 2005-06-06
Application Fee $400.00 2005-06-06
Maintenance Fee - Application - New Act 2 2004-02-18 $100.00 2005-06-06
Maintenance Fee - Application - New Act 3 2005-02-18 $100.00 2005-06-06
Advance an application for a patent out of its routine order $500.00 2005-09-07
Request for Examination $800.00 2005-09-07
Maintenance Fee - Application - New Act 4 2006-02-20 $100.00 2006-02-16
Final Fee $300.00 2006-06-06
Maintenance Fee - Patent - New Act 5 2007-02-19 $200.00 2007-02-12
Maintenance Fee - Patent - New Act 6 2008-02-18 $200.00 2008-02-07
Maintenance Fee - Patent - New Act 7 2009-02-18 $200.00 2009-02-02
Maintenance Fee - Patent - New Act 8 2010-02-18 $200.00 2010-02-03
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
IGNIS INNOVATION INC.
Past Owners on Record
KUMAR, ANIL
NATHAN, AROKIA
SAKARIYA, KAPIL
SERVATI, PEYMAN
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
Documents

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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Abstract 2002-02-18 1 11
Description 2002-02-18 15 684
Claims 2002-02-18 3 112
Drawings 2002-02-18 13 146
Representative Drawing 2005-07-20 1 5
Cover Page 2005-07-21 1 32
Cover Page 2006-07-25 1 34
Correspondence 2006-06-06 1 35
Assignment 2002-02-18 4 89
Correspondence 2005-06-21 1 37
Correspondence 2005-07-19 1 15
Prosecution-Amendment 2005-09-07 2 52
Prosecution-Amendment 2005-09-27 1 12
Fees 2006-02-16 1 33
Fees 2007-02-12 1 29
Fees 2008-02-07 1 31
Fees 2009-02-02 1 30
Fees 2010-02-03 1 35