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Patent 2762475 Summary

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Claims and Abstract availability

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(12) Patent: (11) CA 2762475
(54) English Title: SWITCHING CIRCUITS AND METHODS OF TESTING
(54) French Title: CIRCUITS DE COMMUTATION ET METHODES PERMETTANT DE FAIRE DES TESTS
Status: Deemed expired
Bibliographic Data
(51) International Patent Classification (IPC):
  • H02J 13/00 (2006.01)
  • G01R 31/327 (2006.01)
(72) Inventors :
  • TYLER, PETER MICHAEL (United Kingdom)
  • COLLINS, JOHN OLIVER (United Kingdom)
(73) Owners :
  • GE AVIATION SYSTEMS LIMITED (United Kingdom)
(71) Applicants :
  • GE AVIATION SYSTEMS LIMITED (United Kingdom)
(74) Agent: CRAIG WILSON AND COMPANY
(74) Associate agent:
(45) Issued: 2019-01-08
(22) Filed Date: 2011-12-15
(41) Open to Public Inspection: 2012-06-17
Examination requested: 2016-10-14
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data:
Application No. Country/Territory Date
1021453.4 United Kingdom 2010-12-17

Abstracts

English Abstract


A switching circuit for connection to a load and to a voltage source is
provided. The
switching circuit includes at least one switching device for switching on and
off power to
the load. A pulldown device is provided for shorting out the load thereby
isolating the load
from the voltage source; and a controller operable while the load is shorted
to activate at
least one of the switching devices at a time. The current passes through the
activated
switching device and is measurable to test whether the activated switching
device is
operating correctly.


French Abstract

Linvention concerne un circuit de commutation pour une connexion à une charge et à une source de tension. Le circuit de commutation comprend au moins un dispositif de commutation pour allumer et arrêter lalimentation à la charge. Un dispositif de traction est proposé pour court-circuiter la charge, isolant ainsi la charge de la source de tension; et un contrôleur fonctionnant alors que la charge est court-circuitée pour activer au moins un des dispositifs de commutation à la fois. Le courant passe à travers le dispositif de commutation activé et peut être mesuré pour tester si le dispositif de commutation activé fonctionne correctement.

Claims

Note: Claims are shown in the official language in which they were submitted.



WHAT IS CLAIMED IS:

1. A switching circuit for connection to a load and to a voltage source,
the
switching circuit comprising:
at least one switching device for switching on and off power to the load;
a pulldown device for shorting out the load thereby isolating the load from
the
voltage source; and
a controller operable while the load is shorted to activate at least one of
the at
least one switching device,
wherein a current passes through the activated switching device and is
measurable to test whether the activated switching device is operating
correctly, and
wherein the impedance of the pulldown device is less than the impedance of the

at least one switching device.
2. The switching circuit according to claim 1, wherein the pulldown device
comprises a switch disposed in parallel with the load, wherein closure of the
switch shorts
out the load.
3. The switching circuit according to claim 2, wherein the pulldown device
comprises an electronic, electromechanical and/or mechanical switch, including
any one
or more of a field effect transistor, a bipolar transistor, an insulated gate
bipolar transistor,
a triac, and a solid state relay.
4. The switching circuit according to claim 1, wherein the at least one
switching device is activated individually.
5. The switching circuit according to claim 1, further comprising a current

limiter for restricting the current through the at least one switching device.
6. The switching circuit according to claim 5, wherein the at least one
switching device comprise a current limiter disposed therein.

6


7. The switching circuit according to claim 1, wherein system inductance is

used to restrict the current through the at least one switching device.
8. The switching circuit according to claim 1, wherein an output voltage of

the at least one switching device under test condition(s) is negligible
compared to an output
voltage in normal operating condition(s).
9. The switching circuit according to claim 1, wherein the switching
circuit
is connectable to an AC or a DC voltage source.
10. The switching circuit according to claim 1, wherein the at least one
switching device comprises a solid state switching device.
11. A method of testing a switching circuit that connects a load to a
voltage
source, the switching circuit comprising at least one switching device, the
method
comprising:
shorting out the load by activating a pulldown device;
activating at least one of the at least one switching devices;
measuring the current through the at least one switching device that is
activated;
and
determining from the measured current whether the at least one activated
switching device is operating correctly, wherein the impedance of the pulldown
device is
less than the impedance of the at least one switching device.
12. The method according to claim 11, wherein the switching devices are
activated sequentially one after another.
13. The method according to claim 11, wherein the at least one switching
device is activated for a time sufficient for the current flowing therethrough
to become
substantially constant.
14. The method according to claim 11, further comprising restricting the
current that passes through the at least one switching device.

7

Description

Note: Descriptions are shown in the official language in which they were submitted.



CA 02762475 2011-12-15
245278

SWITCHING CIRCUITS AND METHODS OF TESTING

The present invention relates to switching circuits and methods of testing
thereof.

Often, switching circuits include several switching devices connected in
parallel with one
another whereby the current capacity of the switching circuit is the sum of
the capacities
of each switching device. This is particularly useful for applications in
which the power
required by the load exceeds the capacity of a single switching device. One
example of
such switching circuits is found in aircraft power distribution systems,
wherein for
example 8 solid-state switching devices may be provided in parallel.
Generally, the
switching devices can fail open or closed. Each switching device has a driver
which can
be the cause of the failure. If one or more of the switching devices fails
open the others
can act as backup switches, but potentially may be subjected to current
overload. If one or
more of the switching devices fails closed, it would not be possible to switch
off the
switching circuit and it would be readily apparent that such a failure had
occurred. If
failed open, the failure may be undetectable. Solid-state switching devices
are tested
thoroughly at the manufacturing stage, but it is desirable to be able to test
them in service
to ensure that they remain fully functional. This is also known as a built-in-
test (BIT).

The present invention provides a switching circuit for connection to a load
and to a
voltage source, comprising one or more switching devices for switching on and
off power
to the load, a pulldown device for shorting out the load thereby isolating it
from the
voltage source and a controller operable while the load is shorted to activate
at least one
of the switching devices at a time, wherein a current passes through the or
each activated
switching device and is measurable to test whether the or each activated
switching device
is operating correctly.

1


CA 02762475 2011-12-15
245278

Advantageously, the pulldown device allows the switching devices to be tested
without
the load, so that the test can be carried out before or after installation of
the switching
circuit.

Further, the present invention provides a method of testing a switching
circuit that
connects a load to a voltage source, the switching circuit including one or
more switching
devices, the method comprising shorting out the load by activating a pulldown
device,
activating one or more of the switching devices, measuring the current through
the or
each activated switching device and determining from the measured current
signal
whether the activated switching devices is/are operating correctly.

Embodiments of the present invention will now be described, by way of example
only,
with reference to the accompanying drawings, in which:

Figure 1 shows schematically a circuit including a switching circuit
exemplifying the
present invention; and

Figure 2 is a graph of current against time during a test procedure carried
out on the
circuit of Figure 1.

Figure 1 illustrates an example of a circuit comprising a switching circuit 1
connected to
a voltage source 2. The circuit has an output 5 which is connected to a load
15. The
circuit may, for example, be provided on an aircraft such that the voltage
source 2 may be
provided by an engine generator and the load 15 may be a component on the
aircraft,
such as to actuate a landing gear flap or the under carriage or a component
within the
aircraft such as instrumentation or in-flight entertainment. The switching
circuit 1 may
comprise an individual switching device 6, or a plurality of switching devices
6, 7, ..., n.
The switching devices are connected in parallel. The switching devices may
each
comprise any suitable solid-state switching device such as a field effect
transistor. The
switching circuit 1 is used to connect the power source 2 to the load 15. The
voltage
source 2 and its associated cabling or wiring will have an inherent inductance
11.
2


CA 02762475 2011-12-15
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Likewise, the load and its associated cabling and wiring will have an inherent
inductance
14.

The switching circuit further includes a controller 3 which is connected to
each of the
switching devices 6, 7, ..., n via respective control lines 8,9,10. The
controller 3 is also
connected to a pulldown device 4 via a pulldown control line 12. The pulldown
device 4
is further connected to the load output 5 and the power return line 13. When
the
pulldown 4 is closed it shuts off the load from the switching circuit, and
diverts current
through the pulldown 4. The pulldown device, also referred to as a pulldown
circuit or
simply a pulldown, can include any appropriate switch, including electronic,
electromechanical and mechanical switches.

The switching circuit 1 may comprise a solid-state power controller (SSPC),
which may
comprise one or a plurality of connected semiconductor devices. If it
comprises a
plurality of parallel connected semiconductor devices, each device may be
switched on
and off sequentially so that each of the plurality of devices may be tested
individually.
Other test sequences can be envisaged, such as activating more than one
switching device
at once. Individual activation of the switching devices allows fault isolation
to an
individual switch. The testing sequence can be carried out at any convenient
time, such as
in between flights. The testing sequence could also be carried out in-flight
during times
when the load 15 is not required.

Each of the switching devices 6, 7, ..., n includes a respective current
limiter 61, 71,...,
n1. The current limiters restrict the current passing through the switching
devices to on
the order of five to ten times the normal maximum operating current to avoid
damage to
the switching devices. Alternatively, a single current limiter for all of the
switching
devices could be provided. In a further alternative, a hard current trip could
be provided
to turn off the switching devices when the trip limit is exceeded.

The pulldown circuit is activated whenever any of the switching devices are
activated for
the BIT testing routine. Each switching device and its drive circuitry may be
fully tested
3


CA 02762475 2011-12-15
245278

by using the controller 3 to activate one device at a time while
simultaneously checking
that the current flowing through it and through the pulldown device is within
the correct
limits. The current measuring circuitry is not shown in Figure 1. In one
particular
embodiment, the minimum time for which each switching device is activated is
chosen to
be at least the time required for the current to become relatively constant to
allow
consistent measurement of this current to the accuracy required by the BIT
system. The
time for which each switching device is activated is generally dependent on
the maximum
total inductance 11 in the input power source cable. However, the system can
be operated
on shorter timescales if desired.

The pulldown device is designed so that when it sinks the current from a
single main
switching device during the BIT test, the voltage developed at the output 5 to
the load is
negligible compared to the normal output voltage when the system is on. This
ensures
that the load is not subjected to significant voltage when the system is
supposed to be off.
This is achieved by using a pulldown device 4 that has a lower impedance than
each
switching device, preferably much lower. In practice, when the current
limiters 61, 71,
..., n1 are in operation, the switching devices 6, 7, ..., n have a higher
effective
impedance than the pulldown device 1. During normal system operation, the
controller 3
which activates the switching devices 6, 7, ..., n would generally be expected
to turn all
of the switching devices on and off simultaneously.

Embodiments of the invention apply not only to DC systems but also AC systems.
In this
case the voltage source 2 would be an alternating voltage. The switching
devices would
be AC switches (optionally with AC current limiters) and the pulldown circuit
would be
capable of sinking AC currents. In a DC embodiment, the pulldown device
comprises a
field effect transistor (FET) or a bipolar transistor, or an insulated gate
bipolar transistor
for example. Other types of switching device can be used. In an AC embodiment,
the
pulldown device may comprise a triac or a solid state relay for example.

Figure 2 illustrates the output current through a switching device when a test
procedure is
performed. Only one peak is shown, but in an exemplary embodiment eight
switching
4


CA 02762475 2011-12-15
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devices are provided so the test would result in a total input current from
the voltage
source 2 which shows 8 sequential pulses like the single one shown in Fig. 2.
The correct
operation of each switching device 6, 7, ..., n may be determined by checking
the
amplitude of each individual current pulse is within the correct limits.

The test procedure begins by shorting out the load by activating the pulldown
device 4.
The pulldown device will generally remain on for the duration of the BIT test.
The first
switching device 6 is closed at about 250 s in the example shown, and the
current
through the switching device 6 quickly rises to that provided by the source 2,
in this
example approximately 100 Amps. The first switching device 6 is then opened
and a
short time later, the second switching device 7 is closed and the current
through the
second switching device 7 is measured. This procedure is repeated in sequence
until all
of the switching devices have been tested. Differences in the current profiles
to the ones
shown in Figure 2 may indicate a fault with the corresponding switching
device.

Advantageously, embodiments of the invention allow individual assessment of
the
operation of the switching devices. A simple BIT test which just checks the
overall solid
state power controller operation would not normally be able to detect a faulty
device
which was stuck in the open circuit state. A technical advantage of this
invention is that
not only does it detect single device failures but also can check the current
limiting
performance of each device individually. The invention can therefore provide
complete
BIT coverage during in-service operation.

In an alternative embodiment the switching devices do not have current limit
control. In
this case the inductance of the power source 2 and cable inductance 11 can be
relied on in
combination with a fast current trip circuit to prevent the current rising to
dangerous
levels during the test pulse. In other words, the controller 3 in this
embodiment would
operate to activate the sequence of opening and closing the switching devices
quickly
enough to avoid current overload.


Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Administrative Status , Maintenance Fee  and Payment History  should be consulted.

Administrative Status

Title Date
Forecasted Issue Date 2019-01-08
(22) Filed 2011-12-15
(41) Open to Public Inspection 2012-06-17
Examination Requested 2016-10-14
(45) Issued 2019-01-08
Deemed Expired 2021-12-15

Abandonment History

There is no abandonment history.

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Application Fee $400.00 2011-12-15
Maintenance Fee - Application - New Act 2 2013-12-16 $100.00 2013-11-19
Maintenance Fee - Application - New Act 3 2014-12-15 $100.00 2014-11-20
Maintenance Fee - Application - New Act 4 2015-12-15 $100.00 2015-11-19
Request for Examination $800.00 2016-10-14
Maintenance Fee - Application - New Act 5 2016-12-15 $200.00 2016-11-18
Maintenance Fee - Application - New Act 6 2017-12-15 $200.00 2017-11-21
Registration of a document - section 124 $100.00 2018-09-07
Final Fee $300.00 2018-11-13
Maintenance Fee - Application - New Act 7 2018-12-17 $200.00 2018-11-23
Maintenance Fee - Patent - New Act 8 2019-12-16 $200.00 2019-11-20
Maintenance Fee - Patent - New Act 9 2020-12-15 $200.00 2020-11-23
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
GE AVIATION SYSTEMS LIMITED
Past Owners on Record
None
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Abstract 2011-12-15 1 16
Description 2011-12-15 5 238
Claims 2011-12-15 2 77
Drawings 2011-12-15 2 23
Representative Drawing 2012-06-13 1 16
Cover Page 2012-06-13 2 47
Examiner Requisition 2017-07-31 5 257
Amendment 2017-12-11 8 213
Abstract 2017-12-11 1 12
Claims 2017-12-11 2 63
Final Fee 2018-11-13 1 36
Representative Drawing 2018-12-06 1 10
Cover Page 2018-12-06 1 38
Correspondence 2012-01-11 1 22
Assignment 2011-12-15 2 85
Correspondence 2012-01-19 2 51
Correspondence 2014-05-12 1 24
Amendment 2016-10-14 3 78