Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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The present invention relates to a method and apparatus
for scanning and recognizing characters based upon intelligence
signals which are obtained during scanning operations.
In the past, one way of reading and recognizing normalized
characters written on an appropriate record medium such as an
ernbossed card was to establish a memory storing all two-dimensional
intelligence signals obtained during the scanning process and
then to recognize characters from the two~dimensional intelligence
signals contained in the memory. Therefore, in order to recognize
the indiviudual normalized characters, it is required to provide a
large number of memory cells, which result in a complicated
recognition circuit and a full-sized reader arrangement.
An object of the present invention is to enable provision of
an effective character recognition system requiring a simpler and
inexpenslve memory.
According to one aspect of this invention there is provided
a method of scanning and recognizing a normalized character com-
prising vertical and horizontal lines on a record medium, in which
the scanning cycle consists of consecutive scannings in a vertical
direction of the field covered by the character until the whole of
the character has been scanned in a horizontal direction, com~
prising the steps of: detecting specific vertical characteristics
contained in the character by the use of waveforms of specified
characteristics synthesized from the signals obtained by a single
scanniny cycle in a vertical direction, and detecting the number
of vertical scanning cycles in which the specified characteristics
exist during the totality of the consecutive vertical scannings,
the number being indicative of character characteristics in a
horizontal direction, thereby detecting the two-dimensional
characteristics contained in the character. The consecutive
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scannings are conveniently optical scannings.
According to another aspect of this invention there is
provided a method of scanning and recognizing a normalized
character comprising vertical and horizontal lines on a record
mediumt in which the scanning cycle consists of consecutive
optical scannings in a vertical direction of the field covered
by the character until the whole of the character has been
scanned in a horizontal direction, comprising the steps of;
detecting specified vertical characteristics con~ained in the
character in each vertical scanning cycle, establishing a
plurality of different time periods by combining selected
portions of said vertical characteristics from each scanning
cycle effected in a vertical direction, employing signal inform-
ation generated by scannings in a vertical direction to syn
thesize waveforms of specified characteristics for each of
said different time periods, and detecting the number of occur-
rences of predetermined characteristics of the synthesized wave-
forms of specified characteristics for each of said different
time periods for a plurality of consecutive vertical scans in a
plurality of different horizontal positions, thereby detecting
the two-dimensional characteristics contained in the character.
Preferably the characteristics in the vertical direction
are detected in an information compression mode.
Conveniently specified charac.teristics contained in the
character in a vertical direction are detected by an array of
a plurality of vertically arranged and optically operating
readout cells.
Expediently the specified characteristcs to be detected
are defined by the number of outputs derived from an array of
a plurality of readout cells and the scanning periods where the
~utputs exist.
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The different time periods established preferably comprise
a first time period corresponding to a scanning period required
for an entire normalized character, a second time period corres-
ponding to a scanning period required for the initial vertical
scannings of a normal.ized character which are 30% of the total
vertical scannings, a third time period corresponding to a
sca~ning period required for the final vertical scannings of a
: normalized character which are 30% of the total vertical scan-
nings, a fourth time period corresponding to a scanning period
required for the initial vertical scannings of a normalized
character which are 15% of the total vertical scannings, and a
fifth time period corresponding to a scanning period required
for the final vertical scannings of a normalized character
which are 15~ of the total vertical scannings.
Another aspect of the invention provides apparatus for
scanning and recognizing a normalized character comprising
vertical and horizontal lines in a field on a record medium,
comprising: means for consecutively scanning the character in a
vertical direction along a plurality of paths distributed uni-
formly over the field in a horizontal direction to obtain aplurality of consecutive vertical scanning signals; means for
detecting specific vertical characteristics contained in the
character by the use of waveforms of specified characteristics
synthesized from the signals obtained by a single scanning
cycle in a vertical d.irection; and means for detecting the number
of vertical scanning cycles in which the specified characteris-
tics exist during the totality of the consecutive vertical scan~
nings thereby to indicate character characteristics in a horizon-
tal direction, whereby the two dimensional characteristics con-
tained in the character are detected.
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The apparatus preferably further comprises means for
detecting the number of occurrences of predetermined character-
istics of the synthesized waveforms of specified characteristics
for a plurality of consecutive vertical scans in a plurality of
differént horizontal positions.
Conveniently the means for scanning the character includes
an array of a plurality of vertically arranged optical read-out
cells, each cell being adapted to scan a respective region of
the character.
A character recognition system which embodies a preferred
embodiment of the present invention employs both a characteristic
extraction method and an information compression method. More
specifically, normalized characters are scanned and read in the
vertical direction, characteristics of the characters in the
vertical direction are determined in an information compression
mode during each vertical scanning operation, and variations of
the determined characteristics in the horizontal direction are
also viewed by the repetition of the vertical scanning operation
so that the two-dimensional characteristics are derived and con-
firmed therefrom upon the completion of the scanning operations.
The determining of these variations in the horizontal direction
is carried out during the specified number of scanning cycles
which corresponds to the characteristics in the horizontal
direction to be viewed.
The invention and some of the advantages thereof will be
further understood from the following description by way of
example with reference to t,he accompanying drawings, in which
like reference numerals designate like parts throughout the
figures and wherein:
Figure 1 is an illustration of a font style of 0 through
9 in the form of Farrington 7B;
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Figure 2 is an illustration of an alignment of read-out
cells and each individual characteristic detection period;
Figure 3, which appears on the same sheet as Figure 1,
is a truth table for character determination logic for the
purpose of recognizing the individual numerals 0 through 9 in
the form of Farrington 7B;
Figure 4 is a schematic block diagram of a character
recognition system embodying the present invention;
Figures 5 through ~ inclusive, in which Figure 7
appears on the same sheet as Figure 5, are circuit diagrams of
various circuits shown in Figure 4; and
Figure 10 is a timing diagram for the explanation of the
timing circuit shown in Figure 9.
The character recognition system and method briefly
descxibed in the foregoing will now be discussed in greater
detail with reference to an embodiment for performing the read
ing of numerals 0 through 9 written in the orm of Farrington 7B.
Figure 1 illustrates a font of numerals 0 through 9 in the
form of Farrington 7B normally employed in the art. Summarizing
the operational principles of the character readiny, for example,
the numeral "2" is defined by a series of embossments on a card
as shown in Figure 2; the required number of read~out cells PT
such as photo-transistors and the like are aligned in an array.
The sequential scanning of the aligned read-out cells then
enables the subject character to be read out in the vertical
direction. At this time, the card moves for example in the dir-
ection of the arrow and permits the read-out cells to scan the
subject character on the embossed card by means of a plurality
o~ vertically-running scanning lines.
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In the system of the present invention, the characteris-
tics in connection with the vertical direction of the subject
character are sensed in the well known information compression
mode during each scanning line period. More specifically, as
shown in Figure 2, the subject character is divided into five
regions in the vertical direction and intelligence signals for
each individual region from the read-out cells are compressed
to develop compression information ~ , E. Various
combinations of the thus o~tained compression information
a, ~, y, ~, E can then specify characteristics a~i necessary for
identifying the numerals 0 through 9 of Farrington 7B.
In the illustrative embodiment, the aforementioned char-
acteristics a-i may be displayed in accordance with the specific
font of Farrington 7B as follows:
a: one ~herein at least one intelligence signal of full
length exists during the period WP (intelligence signals
having very short length interruptions may be included
herein).
b: one wherein two intelligence signals of relatively short
length exist successively during the period WP.
c: one wherein two widely spaced intelligence signals of
relatively short length exist during the period WP, and
thus they exist at the beginning and terminating points
of the scanning operation.
d: one wherein three intelligence signals of relatively
short length exist during the period WP.
e: one wherein one intelligence signal of more than half
length exists, or one intelligence signal of relatively
short length follows the same, during the period WPa.
f: one wherein an intelligence signal of more than half
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length exists after a short length signal, or two
intermediate length signals or one full-length
signal exist, during the period WPa.
g: one wherein one intelligence signal of intermediate
length exists, or one short length intelligence signal
follows the same, during the period WPb.
h: one wherein the same as defined in f exists during
the perlod WPb.
i: one wherein one intelligence signal of relatively short
length exists at the beginning points of the scan during
both the periods WPc and WPd.
In the above, assuming that the total of the scanning lines
amounts to twenty, as depicted in Figure 2,
WP: the scanning period for the whole of the character.
WPa: the scanning period for the first six scanning
lines.
WPb: the scanning period for the last six scanning
lines.
WPc: the scanning period for the first three scanning
lines.
WPd: the scanning period for the last three scanning
lines.
Figure 3 illustrates the character determination logic required
for identifying the numerals 0 through 9 of Farrington 7B font,
wherein the existence of the above discussed characteristics is
denoted as a binary "1" and the absence thereof is denoted as a
binary "O". In this drawing, any intelligence signals which may
appear on the areas marked by the oblique lines should be omitted
from the recognition procedure.
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In this manner, pursuant to the system and method embodying
the present invention, the character characteristics in the
vertical direction are determined during the specific periods
defined by the consecutive scanning lines while the same, as to
the horizontal direction, are obtained by the specific provision
of the respective detection periods WP, ~Pa, WPb, WPc, and WPd.
Consequently, the two-dimensional character information can be
provided by sequential scanning.
It will be noted that only nine memory cells are required for
the purpose of recognizing the characters 0 ~hrough 9 in accord-
ance with the characteristic definition a-i in the illustrative
embodiment. Although the abo~e discussed characteristics can
be determined only during a single scanning cycle, in order to
enhance the reliability of character read out, the existence
thereof is not confirmed until the desired number of the same
characteristic determination results are provided.
Figure 4 is a schematic block diagram showing an embodiment
of the character recognition system capable of reading and
identifying the characters of Farrington 7B font marked on the
card. In this embodiment an array of photo-transistors is used to
detectlight reflected from the surface of the card so as to read
intelligence signals contained thereon. This array comprises
fifteen photo-transistors PTl to PT15 as shown in Figure 2,
two of the cells allowing for possible displacement of the card
in the vertical direction.
~ s the card 2 is conveyed through a card advancement mechan
ism 3, the intelligence signals on the card are read out for
example by means of photo-electric conversion means 4 as was
previously described. These operations are carried out in a
reader head 1. ~fter the thus obtained intelligence signals are
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~39~10
converted into pulse signals through an amplifying and pulse
forming circuit 6 within a recognition and indication block 5,
the converted signals are supplied to a characteristic detection
circuit-7 and a character judge circuit 8 for identifying and
recognizing the characters. These intelligence signals are
stored in a memory 9 until recognition procedures are terminated
for all of the characters on the card. Thereafter, the identi-
fied information is visually displayed on an indication circuit
lO. The recognition and indication unit 5 is provided with a
control circuit ll which controls the characteristic detection
circuit 7 and the character judge circuit 8 in response to one-
character completion signals or all character completion signals.
In addition, signals detected by the control circuit ll and
indicating that all of the characters on the card have been
read out control the card advancement mechanism 3 to move the
card 2 in the backward direction. In the course of the backward
movement of the card 2 the intelligence signals contained thereon
are again detected and compared with those signals obtained
during the forward movement and stored in the memory in a com-
parison circuit 12. If there is not an equivalence therebetween,an error indication circuit 13 is activated to indicate errors.
The photo-electric conversion circuit 4, characteristic
detection circuit 7 and timing circuit within the control cir-
cuit 11 briefly discussed abo~e will now be described with
reference to Figures 5 through 10 inclusive to facilitate the
understanding of the character recognition of the present
invention.
In Figure 5, there is illustrated the detailed photo~
electric conversion circuit 4 which comprises the array of fifteen
photo-transistors PTl to PT15, as previously disclosed in relation
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to Figure 2, and four four-bit shift registers SRl to SR4.
The photo~transistors operate in a charge storage mode and pro-
vide outputs from their collector terminals commonly connected
at time Tl01, which outputs in turn enter into the amplifying
and pulse forming circuit 6.
Figure 6 shows a portion of the above discussed charac-
teristic detection circuit having the function of detecting
characteristics of the characters in the vertical direction dur-
ing a single scanning cycle. In the form shown herein, a 13-bit
register ~Rl0 receives sequentially character signals from the
amplifying and pulse forming circuit 6. O~ gates Ogl and Og2
and AND gates Agl and Ag2 are operatively connected with app-
ropriate stages of the shift register SR10, where~y the presence
and absence of the read-out intelligence signals is sensed at
any position of the five stages extending over the full length
of the character in the vertical direction as shown in Figure
2, to develop in~ormation-compressed outputs ~ ,y,~ , and
E. Il, I2 and I3 represent inverter circuits. A diode matrix
circuit DM is provided for encoding the above defined character-
istics in the vertical direction and providing signals of wave-
forms a-f as shown in Figure 3 in accordance with the respective
combinations of the outputs ~ and s. Flip-flops
FFl to FF6 whose outputs are connected to individual terminals
A, B, C, D, E and F may be separately reset upon receipt of the
waveform signals a-f. A flip-flop FFo is connected via the
diode matrix circuit DM to the first stage of the shiEt register
~R10, and is reset at the appearance of the first character
signal to provide an output at a terminal Ao.
Figures 7 and ~ show another portion of the character~
istic detection circuit 7 which serves to detect the character's
characteristics in the horizontal direction. In other words,
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~a33941Q
while the circuit of Figure 6 determines the characteristics
each time the scanning operation is effected, the circuits
shown in Figures 7 and 8 count the number of the scanning cycles
where the subject characteristics exist for the predetermined
periods WP, WPa, etc. in such a manner as to detect the charac-
teristics which meet the definition requirements as disclosed
in Figure 3.
The construction of the characteristic detection cir-
cuit 7 together with the mode of its operation will be described
in more detail with reference to Figures 7, 8 and 9.
This circuit 7 includes four NAND gates Nal to Na4 and
four 5-bit counters Cl, C2, C3 and C4 as shown in Figure 7.
The individual NAND gates are supplied with the outputs A, B,
C and D and a signal WP' indicating the specified characteris-
tic detection period WP. With such an arrangement, the counters
detect the count number of the characteristics a d during the
period WP and confirm their existence if the counts therein
~ exceed four. The counters are reset after the end of each
; period WP by a signal RP.
Figure 8 illustrates a circuit for detecting the
characteristics e, f, g, h, and i, wherein D type flip-flops
Dl and D2 are connected to receive the outputs E, F along with
a timing signal T102. The output terminals of the flip-flops
Dl and D2 are respectively connected to the inputs of five-bit
shift registers SR20 and SR21, which are also supplied with the
timing signal T102.
The output terminals of the flip-flops Dl and D2 and
the individual stage outputs A, B, C, D and E of the shift
registers SR20 and SR21 are connected as shown to NAND gates
~g20 the outputs ~f which are supplied to D type Elip-flops
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D3, D4, D5 and D6 along with signals WPa and WPb identifying
the characteristic detection periods WPa and WPb respectively
to sense the characteristics e, f, g and h.
Since the individual stages of the shift registers
SR20 and SR21 are connected to the NAND gates Ag20 as shown in
the drawing, the D type flip-flops D3, D4, D5 and D6 produce
signals indicating the existence of the characteristics e, f,
g, and h at the times WPa and WPb when two or more outputs E
or F are produced in succession. As was previously discussed
in the foregoing, the characteristics e and f are equal to
each other in waveform but exist during different periods.
For this reason, though the pulse count for both the character-
istics e and g, for example, are carried out in the same shift
register SR20, the D type flip-flops D3 and D5 are activated
during the different times WPa and WPb.
A signal I is produced by logically summing the outputs
B, C and E using an AND gate which is not shown, and is supplied
together with the timing signal T102 to a five-bit shift regis-
ter SR22. The outputs of the first through third stages of
this shift register are supplied to the D terminals o~ D type
flip-flops D7 and D8 via a NAND gate Ag22, the flip-flops D7
and D8 having T terminals which are supplied with signals
WPc and WPd identifying the detection periods WPc and WPd
respectively. Therefore, if three pulses of the signal I appear
in succession during the periods WPc and WPd, the flip-flops
D7 and D8 provide their outputs. A NAND gate Ag23 is supplied
with the outputs of the flip-flops D7 and D8 to produce at its
output the characteristic i. In this way, the characteristics
a-i are all sensed and recognized.
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The timing clrcuit of Figure 9 generates various timing
signals such as the period identifying signals WP , WPa, WPb,
WPc, WPd, resetting pulses RP and character determining pulses
CP which appear at the end of the one-character scanning.
The character read-out timing circuit of Figure 9 will
be descxibed below as to its circuit implementation and opera.
tion mode with reference to the timing diagram of Figure 10.
In Figure 9, the reference 9ymbols D9 and D10 denote D
type flip-flops; the reference symbols RSl, RS2, and RS3 denote
RS flip-flops; the symbol JFF denotes a JK flip-flop; the sym-
bols Ag30, Ag31, Ag32, and Ag33 denote AND gates; the symbols
Og30 and Og31 denote OR gateC; the symbol C30 denotes a 5~bit
counter, and the symbol DC denotes a data selector. The d type
flip flop D9 receives, at the D terminal, the output Ao shown
in Figure 6 and, at the T terminal, the AND output of the timing
signal Tl and clock 02 from the AND gate Ag30, and produces
from its output terminal the signal WP', identifying the dete~-
tion period WP as shown in Figure 10. This signal WP' is
- applied to the trigger terminal T of the JK flip-flop JFF,
which senses the trailing edge of the signal WP' and hence the
end of the detection period WP to produce a signal WQ, shown
in Figure 10, at its output ~. The reset pulse RP shown in
Figure 10 is obtainable by either sensing the output WQ of
the flip-flop JFF at the clock 02 through the AND gate Ag31
or producing a preset signal PRE. The resetting of the JK
flip-flop JFF is by the trailing edge of the reset pulse RP.
The five-bit counter C30 serves to count the number of
scanning cycles and more specifically to count the number of
pulse signals T102 WP' derived from the AND gate Ag32 as the
number of the scanning cycles. The signals WPa and WPc which
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identify the characteristic detection periods WPa and WPc
respectively are produced at the output terminals Q of the RS
type flip-flops RSl and RS2 controlled by outputs of the counter
C30. That is to say, the RS flip-flop RSl is set when th~
outputs Ao, Al, A2, A3 and A4 of the counter C30 are in the
condition of Ao-AlDA2-A3-A4 viz, when six scanning cycles (C6)
have been counted. At this time, the RS flip~flop RSl provides
the signal WPa. Similarly, the flip flop RS2 provides the
signal WPc when three scanning cycles (C3) have been counted
(i.e. when the count state Ao~Al-A2-A3-A4 is reached in the
counter C30).
Since the detection periods WPb and WPd terminate at
the end of the detection period WP, the generation of the sig-
nals WPb and WPd is attainable by sensing the trailing edge of
the output Ao at the timing T102.
In Figure 9 the AND gate Ag33 is provided to produce the
character determining pulse CP when the output Q of the JK
flip-flop JFF is produced at the clock time 01~
The RS flip-flop ~S3 for identifying a character
recognition period WPc is set when the five-bit counter C30
reaches the "14" and then is reset when the same reaches the
count "25". In other words, the recognition of characters is
earried out during the period from the seanning cycle 14 to
the scanning eyele 25. In the event the character determining
pulses CP are generated during sueh period WPc, the recognition
proeedure will be inhibited to inhibit any operational failure.
The data selector DC reeeives the above~discussed
signals WPa and WPb at its input terminals Al, Bl, A2, and B2
with receiving control signals applied to the SE terminal
and switehes the outputs at the terminals Yl and y2 to the
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signals WPa or WPb in accordance with the combinations of the
received inputs. In performing the character recognition
procedure in the backward movement of the card, the selector
DC functions to reverse the order of the sequence of the
detection periods WPa and WPb and thus exchanges the signals
WPa and WPb. Reversion of the order of the detection periods
WPc and WPd is not required since they are used to sense only
the numeral "1" which is symmetrical with reference to time.
In such a way, the various control signals RP, WPa,
,
WPb, WPc, and WPd are supplied to the characteristic detection
circuit as shown in Figures 7 and 8 for the purpose of the
character determination. The character determinin~ commands
CP are created upon the termination of the characteristic
detection and thereafter the characters are identified and
recognized in the circuit 8 encoded into a given string of
code signals and stored in the memo~y 9. The resetting pulses
RP ser~e to reset the detection circuit, timing circuit, etc.
The invention being thus described, it will be obvious
; that the same ~ay be ~aried in many ways without departing
29 from the spirit and scope of the invention. All such modifica-
tions are intended to be included within the scope of the
following claims.
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