Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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This invention relates to limiter circuits. In
an apparatus for magnetically recording and/or reproduc;ng
speech, music and so on r a limiter circuit is usually employed
to prevent the saturation of a magnetic tape when the excessively
large input signal is supplied to the apparatus.
In a known limiter circuit, the impedance of a
variable impedance element provided, for example, in a shunt
signal path, is controlled in response to a DC voltage obtained
by rectifying the input signal. Consequently, the amplitude of
the input signal to be recorded may be adjusted by means of the
controlling transistor.
However, it should be noted that the controlling
transistor is driven by a voltage signal. (In other words, the
DC voltage corresponding to the peak value of the input signal
is supplied to the controlling transistor.) Usually, the base-
emitter voltage to collector current Ic characteristic is not
linear over the wide control range, so that the input signal
will suffer a non-linear distortion.
In order to overcome the above described defect,
an improved limiter circuit is proposed, in which the controlling
transistor is driven by a signal current source, instead of the
voltage source. The current source is constructed by a transis-
tor, the collector-emitter circuit of which is connected between
the voltage supply source and the base of the controlling
transistor. The magnitude of the control current is controlled
by the rectified output supplied to the base of the current source
transistor.
In such a current control limiter circuit, and
assuming that the limiter c~rcuit is made to be inoperative by
a suitable svitching means, a leakage current will flow through
the collector-emltter circu~t of the current source transistor.
The leakage current scarcely causes the controlling transistor
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to become conductive. Under such a transitional conductive
condition of tEe transistor, the linearity thereof is extremely
bad, so that the input signal to be controlled will be distorted
to a large extent.
According to the present invention, there is
provided in a limiter circuit having a signal transmission line
for transferring an input signal; a variable impedance element
connected to the signal transmission line for controlling the
magnitude of the input sîgnal; a rectifier circuit for generating
a DC voltage in response to the magnitude; means for converting
t~e DC voltage to a corresponding current signal and means for
by-passing the current signal during the OFF time of the limiter
circuit, whereby th~ distortion of the input signal will be
greatly reducea during inoperative time.
More particularly, there is provided:-
a limiter circuit to pa~s a signal with or with-
out amplitude limiting, selectively, said circuit comprising:
A. an input circuit section;
B. an output circuit section;
C. a controllable impedance element to control the
transfer of signal voltage through said limiter circuit from
said input circuit section to said output circuit section;
D. rectifier means for producing a rectified volt-
age having a magnitude determined by the magnitude of the sig-
nal voltage at a circut point in said limiter circuit between
said input circui~ section and said output circuit section'
E. conversion means for converting the rectified
voltage to a corresponding current signal;
F. supply means for supplying said current signal
to said controllable impedance element to control the imped-
ance thereof and thereby control the transfer of signal voltage
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between said input section and said output section; and
G. a bypass circuit connected to said supply means
to bypass said current signal away from said variable impedance
element selectively when the amplitude of the signal voltage
at said output circuit section is not to be controlled by said
controllable impedance element.
The present invention will now be explained and
described, by way of example, with reference to the accompanying
drawings, wherein:
Figure 1 is a circuit diagram of a prior art
limiter circuit;
' Figures 2 and 3 are circuit diagrams of a limiter
circuit in accordance with the present invention.
Fig. 1 shows a prior art limiter circuit, in which
an input signal is supplied to an input terminal 1. The input
terminal 1 is connected through a resistor R4 to an input side
of amplifier A, while an output side of the amplifier A is
firstly connected through a capacitor Cl to an output terminal 2,
and secondly through resistors R2 and R3 for dividing the output
voltage to a reference potential, such as ground. The connecting
point 3 between the resistors R2 and R3 is connected to base of
a rectifying transistor Q3, the collector of which is connected
through a resistor R8 to a voltage supply source ~B. The emitter
oS tr~nsistor Q3 i8 in turn connected firstly, by ~ay of a
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parallel circuit of a resistor Rl and a capacitor C2 which serves
to smooth the rectified signal, and secondly to base of amplify-
ing transistor Q2. The emitter of transistor Q2 is connected
to the ground, while t~e collector thereof is connected through
a diode connected transistor Q4 and a current limiting resistor
Rg to the voltage supply source +B. In this embodiment, the
transistor Q4 is of the P-N-P type, in which the base and
collector thereof are connected together and to the collector
of the transistor Q2.
~urther, there is provided a transistor Q5 which
is parallel-connected with the transistor Q4. That is, the
base and emitter of transistor Q5 is connected to the base and
the emitter of the transistor Q4. Thus, the pair of the
transistors Q4 and Q5 constitute a current source ~hich generates
a DC current which corresponds to the rectified DC Yoltage
supplied to the base of transistor Q2. The collector of the
transistor Q5 is connected to bases of transistors Qla and Qlb,
forming a variable impedance element Ql' and which are parallel-
connected in reverse phase to each other. That is, the emitter
of transistor Qla and the collector of transistor Qlb are
coupled together and further connected to the input side of
amplifier A, while the collector of transistor Qla and the emitter
of transistor Qlb are connected together and further connected
to the ground.
Further, the limiter circuit is provided with a
pair of switches Sl and S2, which change the limiter operation
of the circuit to the operative or inoperative condition.
One of the switches Sl is connected between the emitter of
transistor Q3 and the ground, and the other S2 is connected
between the connecting point 3 and the ground. Both of the
switches Sl and S2 are interlocked in such manner that, during
the inoperative condition of the limiter, the emitter of the
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transistor Q3 and the connecting point 3 is direct-coupled to
the ground.
The operation of the circuit will now be described
in detail. The input signal supplied to the input terminal 1
is amplified by the amplifier A, and then, by way of the trans-
mission line 1, an output s;gnal is obtained from the output
terminal 2, which may be connected to a magnetic head ~not shown)
to record the signal on a magnetic tape now assuming that the
switches Sl and S2 are in OFF condition, a part of the amplified
signal is voltage-divided by the series-connected resistors R2
and R3 and supplied to the transistor Q3 to rectify the divided
part of the amplified signal. The transistor Q3 becomes conduc-
tive only when the positive half cycle of the signal is supplied
thereto, so that the charging current flowing through the
collector-P~;tter circuit of the transistor Q3 is applied to
the capacitor C2. As a result, a DC voltage signal corresponding
to the mean ~alue of the positi~e half cycle of the signal will
be charged therein. The resistor Rl is used for discharging the
DC voltage during the negati~e half cycle of the voltage signal.
The rectified and smoothed Yoltage signal is supplied to the
base of the transistor Q2~ whereby the voltage signal causes the
transistor Q2 to conduct the corresponding collector current.
The collector current flows through the emitter-collector circuit
of transistor Q4, so that a predetermined voltage Vbe is genera-
ted at the emitter-base junction of transistor Q4 and the voltage
Vbe is supplied equally to the emitter-base junction of transis-
tor Q5. This means that the same collector current to that
flowing through the transistor Q4 will flow through the trans-
istor Q5. The control current thus obtained is supplied to the
3Q bases of the transistors Qla and Qlb~ the impedances of which
are controlled in response to ths control current. Accordingly,
the magnitude of the input signal transferred through the
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signal transmission line 1 ~ ad~usted in response to the
impedance of the var~able impedance element Ql~ cooperating
with the resistor R4, so that the output signal of the pre-
determined level will be obtained from the output terminal 2.
When the limiter operation is terminated by
turning the switches Sl and S2 ON, both of the transistors Q2
and Q3 become non-conductive and no current is supplied to the
transistors Qla and Qlb from the current source constituted by
the transistors Q4 and Qs. Consequently, the impedance of the
Yari`able impedance element Ql becomes almost infinitive, so that
the input signal will be transferred through the signal trans-
mission line 1 wit out any attenuation.
rt should be noted, however, that the leakage
collector current will flow through the transistor Q5 even at
the ON operation of the switches Sl and S2. The leakage current
barely makes t~e transistors Qla and Qlb conductive, so that the
variable impedance element Ql has a relatively large, but not
infinitive impedance to limit or attenuate the input signal by
th impedance ratio between the variable impedance element Ql
and the resistor R4. But, in such;a transitionally or low
conductive condition of a transistor, the linearity of the
transistor is so bad that the input signal will suffer the
distortion to a great extent.
In order to overcome the above-described defect, the
embodiments according to the present invention provide a means
for by-passing the leakage current.
Figure 2 shows one embodiment of the present invention,
in which the same numerals are attached to the same elements as
that shown in Fig. 1, and the description of the circuit
construction and operation need not be repeated.
In Fig. 2, the by-passing means comprises an
additional transistor Q6, a resistor R10 and diodes Dl and D2.
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That is, the collector of the transistor Q5 constituting the
current source is in turn connected, firstly, through the series
circuit of the resistor Rlo and the forward-connected diode D
to the base of transistor Q2' and, secondly, to the emitter of
P-N-P transistor Q6' the collector of which is directly
connected to the ground. The base of transistor Q6 is coupled
to the bases of transistors Qla and Qlb Another diode D2 is
forward-connected to the emitter of the amplifying transistor
Q2
With the circuit thus constructed, the control
current from the transistor Q5 will flow into the emitter of
transistor Q6 in case of the OFF-condition of the switches S
and S2, as well as that shown in Fig. 1. This is because the
DC potentials at the collector of transistor Q5 and the base of
transistor Q2 are both almost 2Vbe (where Vbe is the base
emitter junction voltage) and thereby the diode Dl becomes
non-conductive.
As described above, the control current supplied to
the transistor Q6 is applied through the emitter-base junction
thereof to the bases of transistors Qla and Qlb to control the
impedance of the variable impedance element Ql in the same
manner as that in Fig. 1.
When the switches Sl and S2 are changed to the ON-
condition to make the limiter operation inoperative, the base
potential of the transistor Q2 becomes the ground potential,
that is, the collector potential of the transistor Q5 will be
equal to V~e. Th~s means that the transistor Q6 is forced into
the cutoff region. Accordingly, even if a leakage collector
current is generated from the transistor Q5, the leakage
current will flow through the resistor Rlo and the diode Dl to
the ground. Therefore, since no leakage current flow into
the transistors Qla and Qlb' the impedance of the variable
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impedance element Ql becomes enough high to transfer the input
signal without distortion.
As apparent from the explanation described above,
the transistor Q6 may be placed by a forward-connected diode.
Fig. 3 shows another embodiment according to this
invention, in which the transistor Q6 is temperature compensated.
In Fig. 3, the collector of the transistor Q5 constituting the
current source is connected through a resistor Rll to the emitter
of the transistor Q6' and also through a forward-connected
diode D3 to the base thereof. Thus, such a circuit configura-
tion not only compensates the transistor Q6 in temperature,
but also controls the control current flowing through the
transistor Q6 by adjusting the value of the resistor Rll.
