Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
1078065
Background of the Invention
The present invention is particularly concerned with
the automation of the voting process, and effecting such auto-
mation with equipment that is readily understood and easily
operable by the voter, positive and rapid in operation, and
extremely secure against intentional tampering and untoward
mechanical and electrical troubles. In the past various
efforts have been made to automate the election process and
simplify-the tallying of the votes. A familiar example of an
early machine i$ the mechanical voting maching used'in many
large cities. In general, there is some mechanical movement
in such machines with the registration of each party or candidate
selection by the voter. With each mechanical part and movement
there is a corresponding possibility that this part will break
down on the election day. In addition the use of particular
actuators for a specific party or a specific candidate raises
the possibility of such party or candidate being effectively
precluded from receiving votes if a single actuator is
tampered with or becomes inoperable. For these reasons
considerable effort has been expended to further automate
and simplify the voting process.
One example of such an improvement is described and
claimed in U.S. Patent 3,793,505 - McKay et al, entitled
"Electronic Voting ~achine." The patent describes the use
of suitable film projection apparatus, such as a 35
millimeter projector with forward and reverse drive controls,
for proiecting successive frames or ballot pages onto a
screen for candidate selection by the voter as he activates
individual buttons at the candidate locations. The patent
_ _ _ _ ~
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describes a system for controlling both operation of the
voting buttons and operation of the.Yote counters (including
fdentification of voting categories) by-the use of components
(such as phototransistors) positioned adjacent the screen,
such that the light projecting the candidates names will
also strike the phototransistors and provide control signals.
There are many complicated problems- connected with
the usual election procedures~ One problem is that of straight-
ticket voting as opposed to ballot splitting among candidates
10 of different political parties. Accordingly, it is an important
object of the present invention to provide a simple, automated
voting system in which straight-party votes can be cast, and a
single vote (or.more, if desired) for a candidate from another
party can still be entered simply by changing the selection in that
particular race.
Another important consideration is the use of
proportional voting, where it is allowed. For example, in a
vote for a board of regents, there may be six candidates with
the instruction to vote for as many as three candidates. If
20 three are selected, each gets on~ vote; if two candidates are
chosen, each receives 1-1/2 votes; and if only one is selected,
he receives three votes. Proportional voting requires mental
computations when paper ballots are used, and additional
mechanical parts when a mechanical voting machine is used. It
is therefore another important object of this invention to
provide for proportional voting with a simple memory circuit
arrangement which facilitates the use of proportional voting
in any contest where it is desired.
Another important consideration is that some races
30 may have more candidates than can readily be displayed on a
single horizontal row or vertical column of the display
presented to the voter. With a paper ballot this presents no
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problem, as the additional name~ are merely added to the list.
It is therefore a salient object of this invention to provide a
flexible-format candidate presentation for each race, where the
space for a given race can be extended to include the next row
(or column) simply by pushing a button or by some equally simple
control arrangement.
It is not always possible with automated machinery to
regulate the maximum number of votes which can be cast in a given
race, when this maximum number exceeds one. It is therefore an
10 important object of this invention to provide a flexible-format
arrangement in which the maximum number of votes can be preset:
when the equipment is prepared for the election. A related
important object is to provide such a format of enhanced
flexibility, so that when a given race is extended to present
candidates on the next row (or column), the maximum number of
votes to be cast in that race can also be increased.
A corresponding object of the invention is to provide
a data center coupled to the voting maching (or vote head), for
generating a train of signals which are passed to the vote head t
20 to continually determine the status of all the buttons and
switches on the vote machine, returning this information to the
data center for registration as candidate votes. `~
Another important object of the invention is to
provide such a system in which a plurality of machines (or vote
heads) can be served simultaneously by the same data center.
Another important consideration is to provide such a
system in which the data center is a stored program data
processor, serving the multiple vote heads on-line and in real
time, maintaining a continuous count of the votes for each
30 candidate or question
Still another important object of the invention
is to provide a permanent record, such as a magnetic tape,
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which both includes a part of the stored program for the
particular election, and is used at.the. end of .the election
to record the election results in permanent form without the
need to perform a secondary data recording operation.
An important object of the invention is the provision
of positive identification of each frame or ballot page
projected to the voter, which identification is utilized to .
refer to the stored program for establishing the validity of
certain buttons in the vote head to perform candidate selection,
10 and then directing the vote selection into the appropriate
memory storage of the data center.
Another important object of the invention is-to allow
the voter to change individual selections on each fra~e (ballo
page), and to review the entire ballot ---making changes in the
votes entered, if desired -- before the votes are "cast" by
entry in the appropriate memory of the data center.
Summary of the Invention
A vote entry and recording system for storing in-
formation regarding candidates and races for successive present--
20 ation to.a voter constructed in accordance with this inventioncomprises a vote head and a data center. The vote head includes
an optical unit for visually representing the candidates in ea
race, and has selection means for indicating the candidate
selected in each race. A logic circuit is connected to the
.selection means in the vote head. The data center is coupled
to the vote head by at least two conductor pairs. The data
center includes three memories: an election configuration
memory for storing processing instructions; a candidate count
memory connected to receive and accumulate the total of votes
30 in each race cast at the vote head; and a vote head memory,
coupled between the first of the conductor pairs and the
candidate count memory, for continually representing the status
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of the selection means in the Yote head. A logic circuit in
the data center is coupled to the first conductor pair and to
the three memories. This logic circuit includes-a clock circuit
connected to generate a train of pulses for passage over the
second conductor pair to the vote head, to continually scan
the selection means in the vote head. The logic means in the
vote head is connected to change the representation of at least
one pulse in the pulse train each time the selection means is
actuated, thus producing a modified pulse train which is returned
10 over the first conductor pair to the data center to indicate
the selection made at the vote head.
- The Drawings
The foregoing objects and other aspects of the
invention will be better understood with reference to the
accompanying drawings and the corresponding explanation.
In the drawings:
FIGURE 1 is a perspective illustration of a system
constructed in accordance with this invention, showing a data
center coupled to a vote head;
FIGURES 2, 3 and 4 are illustrations, in more detail
and on an enlarged scale, of portions of the data center and vote
head shown in FIGURE l;
FIGURE 5 is a block diagram depicting the intercoupling
of sub-systems within the system of this invention;
FIGURES 6 and 7 are timing diagrams useful in
understanding the operation of the system shc~n in FIGURES 1
and 5;
FIGURE 8 is a data flow diagram depicting the
interconnection of the vote head components;
;FIGURE 9 is a front view of a segment of a film
strip for use with this invention, showing one frame of the
strip;
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FIGURE 10 is a diagram illustrating the codes which
identify each successive frame on the film stri~;
FIGURE 11 is a data flow diagram for an adapter ~ ,.
located in the data center but serving only one vote head;
FIGURES 12 - 14 are data flow diagrams which., taken
together, illustrate the interconnection and operation of the
components of the data center; . ~ .
~IGURES 15A - 17D are illustrations of the memory
formats of the memories in the data center;
FIGURES 18 - 21 are illustrative showings useful in
understanding the preparation of a master or "configurator"
tape;
FIGURES, 22A - 49 are schematic diagrams giving
additional details of the circuits shown in FIGURES 8 and 11-14;
and
FIGURES 50 and 51 are perspective and block diagrams
illustrating another embodiment of the vote head.
General System Description
.;,
FIGURE 1 shows a data center unit 100 intercoupled
20 with a vote head unit 600, Both units are generally box-shaped,
and can be placed on stands (not shown) for ready access by a
voter making his selection and later by a judge utilizing the
data center 100. In addition a shroud or divider (not shown)
is generally utilized adjacent the vote head 600 to provide
privacy for the voter. Because such details are not necessary
to an understanding of the invention, they are omitted. ,
Of the data center 100, front panel 101 and the top
. portion 102 are visible, A control section 103 is shown in the
top of the data center, ~his section includes a plurality of - .
30 control and indicating units, such as the power on-off switch
104, a tape cartridge 105 received in a suitable well and
positioned such that data can read from and recorded on the
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tape, and read-out or dis~l~v windows 106. 107. ThP other
~.om~onents ar~ relativelv ~s~all in this ~ers~ective illustration
and will be described subseauentlv in connection with FIGURE 2.
A cable is shown intercouplin~ the data center 100 and
the vote head 600. This cable includes a ~luralitv of conductor
~airs for transferrin~ data from the data center 100 to the vote
head 600, and back from the vote head to the data center. The
seParate PoWer cables, one'for the vote head and one for the data
center, which are normallY ~lu~ed into a conventional 110 volt,
10 60 hertz power outlet are not illustrated. It is important to note
that there is only one conductor pair in the cable 110 for passing
data from-the data center 100 to the vote head 600, and only one
additional conductor pair for returning data from the head 6 ~ ~o
the data center. This is important for security reasons, as it
prevents a single wire or conductor pair from being cut to
isolate one candidate or party from the possibility of selection.
Vote head 600 is genera~y box-shaped, and in FIGURE 1
the top surface 601, front panel 602 and a side panel 603 are
visible. Although the vote head appears to contain a number of
20 selectors and other controls for actively generating signals, it
is emphasized that vote head 600 is basically a passive selection
unit for receiving serial bits of information over a conduct,or
pair in cable 110, and altering a single bit in the train of bits
as one or another button or key is actuated in the vote head.
Visible on the front panel 602 are a write-in panel 604
behind which a roll of paper and other equipment is housed for
allowing write-in of a candldate selection when the write-in
, window 605 is opened. The major portion of the area on the front
panel is occupied by a candidate selection button array 606,
30 which includes a plurality of vote buttons 607 which can be de-
pressed to indicate a vote choice and a corresponding plurality
of indicator lamps 608, one positioned to th~ left of each of the
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selector bu~tons for illumination to indicate which buttons were
pushed~ Those skilled in the art will appreciate that the term
"button" encompasses other selectors and actuators whether or
not physically displaced, for providing an output signal
responsive to the touch of a human finger. The button array
606 is shown aligned in eight horizontal rows of six columns
each, so that the eight horizontal rows and six vertical
columns allow forty-eight places or ballot positions to be
presented to the voter. Though not visible in FIGURE 1, a
film drive and projector unit is housed within the vote head
600 to project the names of candidates, identities of parties,
or explanation of referenda or other propositions to be select
ed by the voter on the successive translucent strips, 611-
618, inclusive. Such film strips are prepared by conventional
photography techniques, for example on a 35 millimeter film
for use with a well-known type of projector which in ordinary
home use has a remote control button for advancing the
projector to illuminate the next slide or frame, or reversing
the drive to review the ~ast frame. The incorporation of such
a film drive and projector unit in conjunction with an electronic
voting machine is disclosed and claimed in U. S. Patent No.
3,793,505 - McKay, et al, entitled Electronic Voting Machine,
which issued to the assignee of this invention on February l9th,
1974. This patent also includes a careful exposition of
suitable means shown as phototransistors 60, 61 and so forth
(Figure 3 of the 3,793,505 patent) for providing position-
indicating output signals as a function of a position code
represented by light dots 56, 57 on the same film strip 51
which also contains the candidate and other balloting
information. The complete teaching of such a film drive and
projector arrangement obviates any necessity of a specific
teaching of such well-known film movement and display techniques
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herein.
On the right side of the front panel 602 of the vote
head is a control switch array 620 which contains various
control buttons or selectors for such steps as advancing the
film strip (not visible) to illuminate the next frame (similar
to next ballot page) of candidates for selection by the voter.
It is again noted that although the film strip advance is
controlled by pressing one of the buttons in the array 620,
the initial actuation of the selector button only sends a
signal as one serial bit in a train of data bits passed within
the cable 110 to the data center 100, which data bit is then
in effect decoded. The data center then transmits another
signal back over another conductor pair wïthin cable 110 to
provide the forward stepping of the film.
In the lower right portion of the right side panel
603 of the vote head is a judge's controls array 640. This
array includes an authorization key 641 for actuation by an
election judge to enable the equipment of the vote head, a
push-button enable switch 642 to allow the jud~e to provide
20 operation by a voter after viewing identification to insure
he is qualified, and other buttons which will be explained
hereinafter. For purposes of this explanation and the
appended claims, the term "information martix" will be used
to describe the positions of all the selectors or actuators
in the candidate selection button array 606, the control switch
array ~20, the iudge's controls array 640~ the write-in apparatus,
and the film drive and projector equipment. More precisely
the information matrix is continually scanned by signals passed
over conductors within cable 110 to indicate the status of
30 each of the buttons and/or other selectors, such as the key
641. "Status" is used to indicate not only the present
physical position of a selector, but also its last operation
or displacement by the voter or election judge. Details of
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the Yarious selectors in the info D ation matrix will be more
apparent after viewing the illustrations in FIGURES 3 and 4
in connection with the accompanyïng explanation.
FIGURE 2 shows the control area 103 of the data
center 100 in more detail. A well or receptacle 111 is provided
for receiving tape cartridge 105 for proper positioning
adjacent the tape drive and record/read electronics (not visible).
To the left of the power on-off switch 104 is an information
area 112 on which the operating criteria for the equipment, such
as volts, amps, hertz, model and serial numbers can be inscribed.
Below the "position number" window 106 and the "total" readout
window 107 are the restart button 113, backup button 114 and
advance button 115. These controls are utilized at the end of
voting for displaying the information stored in a memory of
the data center in the windows 106, 107, so the vote total can
be viewed by judges of election and recorded for tabulation. A
locking cover (not shown) is provided for the data center, for
locking in position over the just-described controls of the
data center so that after the on-off switch 104 is turned to
the on position with the tape cartridge inserted, the tape
cartridge must remain in. 1:
Above the "total" window 107 are three mode-indicati~g
lamps 116, 117, and 118. One of these lamps will be illuminated
to indicate the operating mode of the data center. In the
"tape" mode, control information is passed from the tape
cartridge after insertion into a memory within the data center;
in the "vote" mode, after the cover is locked the voter is
allowed to make selections at the vote head; and in the
"display" mode, the vote totals can be read out at the end
of the voting time. To the right of the mode lamps is a
lamp array 121 including eight "Video Voter Check" lamps
sequentially numbered 1-8, and a "reset" button 120 is to the
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right of this lamp array 121. To the left of the mode lights
are a "tape s,top" button 122, a "zero check" button 123, `'zero
verify" lamp 124, "tape check'r lamp 125, and a "battery"
indicator lamp 126. The use of the buttons and lamps 116-
125 in connection with the initial energization and operation
of the data center will be described hereinafter.
FIGURE 3 shows the right portion of the front panel '
602 of vote head 600. The locking cover for the vote head is
now shown. Only the lower part of the front plate 604 of
the write-in apparatus is indicated, and only the two right-
hand columns 5 and 6 of the candidate selection button array
606 are shown. In the upper right portion of the control
switch array 620 is a box 621 with the instructions for the
write-in procedure. Below this box is an "on" lamp 622 which
is illuminated when the vote head is energized and ready
for operation. ImmediateIy beneath that is a "new page"
button 623, for actuation by the voter to view the next page
of the ballot, by instructing the proiector behind the front
panel to advance to the next frame. Next is a "review ballot"
button 624 for actuation by the voter to return the projector
to the initial position, and sequentially project the ballot
frame by frame, while the appropriate ones of the lamps 608
are illuminated adjacent the appropriate candidates or
propositions on each frame, to review his selection. A
"votes recorded" lamp 625 is provided just above a "register
votes" button 626. When the button 626 is actuated the system
begins to transfer the votes indicated by the voter from a
temporary or "scratch-pad" memory in the data center to
another memory which continually accumulates the votes cast
at all t;he vote heads connected to the same data center. While
this transfer and recording is taking place and the film is
being returned to the home frame position, lamp 625 will flash
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to indicate to the voter that his selection~ are being
recorded. When the lamp 625 is extinguished, the voter knows
that his voting procedure is terminated and he can leave the
booth.
A "write-in" button 628 i`s provided for ~he voter to
indicate he wishes to write in a candidate selection. Lamp
629 is intermittently flashed when button 628 is pushed, and
then continuously energized when one of the row-select write-
in buttons 631-638 is pushed. The remainder of the write-in
procedure will be described hereinafter.
FIGURE 4 indicates the controls on the election
judge's panel, at the lower right of the vote head 600. The
authorization key 641 is inserted and turned to the right by
the judge to complete the data path between the vote head and
the data center. When the enable button 642 is pushed, the
voting lamp 643 is illuminated to provide a visible indication
that the vote head is ready for operation by the voter. The
"active" lamp 644 will be illuminated when`the voter pushes
the first button on the candidate selection array 606 or
the control switch array 620. This provides an indication to
the judge that the voter is successfully operating the machine
If the light 644 is not illuminated then the judge can surmise
that the voter has "frozen" or does not understand which
of the buttons to push first. The voter can leave the booth and
have any of his questions answered. The "add" button 645
is used in conjunction with the page selection buttons 651-658,
allowing the judge to control the illumination of lamps 661-
668 during balloting. In addition the add button is used
during the pre-election procedure in which the original tape
(the tape in cartridge 105 in the data center) is "configured"
or initially recorded with the appropriate information for the
particular election. The page selection buttons 651-658 allow
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the judge of elections to skip pages or go from page to
page sequentially, to control which ballots a~re presented to
the voter. The page selected is indicated thereafter by the
illumination of the corresponding one of the lamps 661-668.
It is noted that the judges' panel is on the side o the vote
head, away from the front panel which is shrouded so that the
voter is secluded when making his selection. Thus the judge
can view the voter's identification before he votes, determine
that he is from a certain precinct, and skip to a certain page,
which will allow the data center to accumulate votes from
different precinct voters for the same candidate, and to
- maintain cumulative totals by precincts. In addition the pag
selection feature allows the selective presentation of referenda,
bond issues or other issues for determination by voters of
different precincts. With this general perspective of the
hardware arrangement in the vote casting and tabulating system,
the underlying data processing principles will now~be
explained.
FIGURE S basically illustrates the system of
FIGURE 1, but in a block diagram arrangement such that the major
sub-$ystems of the complete invention are shown intercoupled t~
function as a complete system. In the data center 100 a
common bus 130 intercouples a logic circuit 131, a normal power
supply 132 which is backed-up by a battery 133 for operation
as will be described hereinafter, the displays 106 and 107
already illustrated and described, a tape recorder arrangement
134 which includes the electronics for recording on and
reading from the tape in the cartridge 105, and the memory
arrangement. The memory actually includes three separate
memories, the first of which is a "scratch-pad" memory 135
for operation in conjunction with the vote head. That is,
the status of the various selectors, keys and other controls
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in the associated vote head are continually represented in
the vote head memory 135. Coupled to this is the candidate
count memory 136 for receiving the information from the vote
head memory 135 each time the "register votes" button (626,
FIGURE 3) is pushed at the vote head. The third memory is
the election configuration memory 137. The illustrated
memories 135-137 were of a semiconductor type in the preferred
embodiment of the invention. For this reason the back-up
battery 133 was supplied in conjunction with the normal power
supply 132 so that, upon the interruption of the normal power
supply from a suitable wall outlet (not shown) to the supply
132, the battery 133 will supply energy for the time required
for the then-accumulated totals in the memory 137 and the
contents of memories 135 and 136, to be read out and recorded
by the tape recorder 134 onto the tape within the cartridge 105.
Similarly the data center, when re-energized, will return the
accumulated totals and other information then on the tape in
cartridge 105 over the tape recorder 134 into the memories 135,
136 and 137 This is done automatically under the direction
of the steps or "program" stored by reason of the interconnection
of the components in the logic circuit 131. The logic circuit,
together with the information initially passed from the tape
over the recorder 134 into the election configuration memory
137, govern the operation of the complete system.
As will be made clear hereinafter, this system
operation is basically regulated by the generation of a series
of data pulses from a "clock" or oscillator circuit within
the logic circuit 131 of the data center. These pulses are
passed over a conductor pair in cable 110 to the logic
circuit 671, for passing regulating signals over the common
bus 670 in the vote head 600 to the various sub-systems there
shown. A power supply 672 is coupled to the common bus.
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This power supply, like the power supply 132 in the data center,
is supplied with 110 volt, 60 hertz energy from a conventional
wall outlet. The film drive and projector apparatus 673 and
the write-in apparatus 674 are also coupled to the common bus
670. The film drive and projector can be a conventional type
35 millimeter remote control projector, as described previously
and fully explained in connection with Patent No. 3,793,505.
The write-in apparatus includes a roll of paper with a small
motor for advancing the paper, a mechanical spring ~or opening
the write-in window (it is closed by the voter), and three
print wheels for actuation by the same mechanical spring to
indicate both the frame then being presented to the voter
when the write-in select button 628 is pushed, and which one
of the row write-in buttons 631-638 is depressed subsequent
to actuation of the write-in select button 628.
An additional cable llOA can be coupled to the
vote head 600 and connected to the logic circuit 671 to pass
the train of data pulses from the data center to an adjacent
vote head (not shown). Such intercoupling and operation will
be apparent from the subsequent description. In a preferred
embodiment a single data center 100 was constructed to service~,
eight vote heads simultaneously, with so little time lapse
between the actuation of a button by a voter and the
illumination of the adjacent lamp to identify the button
actuated, that each voter believes his vote head is the only
one being handled by the data center. With this basic view
of the data processing sub-systems, the timing or sequence of
the train of data pulses will now be explained.
FIGU~E 6 depicts a train of data pulses or bits in
serial form, shown conventionally as vertical lines to
represent each pulse in a data word~ and referenced 580 to
collectively represent the 88 pulses or bits in a single data
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word. The pul~e group 580 represents a train of pulses
generated by the clock circuit~ to be described hereinafter,
and continually passed from the data center lO~ over the cable
110 (FIGURE 5) to the logic circuit in the vote head. At the
end of the complete data word a reset or synchronizing (sync)
pulse is generated, and is represented by a pulse of slightly
higher amplitude. This pulse is not only used in the basic
scanning procedure, but also a single sync or reset pulse is
passed to the vote head at the end of every data word trans-
10 mission, to maintain positive synchronization between the 88-
bit data word scanning the information matrix in the vote
head and the 88-bit data word effec~ing the program operation ~,
and other functions in the data center. Precise synchronization
between the data center and the vote head circuits is assured
with this arrangement, which is also important because it
contributes to the continuous scanning of the status of the
various buttons and switches in the vote head, translation of
the status information to the data center, and positive and
rapid operation of the various counting and program circuits,
all accomplished with a minimum of expense and equipment size
and a maximum of sec~rity and accuracy.
Referring to the left hand portion of FIGURE 1, there
are eight horizontal rows and six vertical columns of positions
in which a selection can be effec~ed by pushing one of the vote
buttons 607. Thus there are only 48 different positions to be
scanned for data transfer by actuation of a single vote
selector or button. Because 88 pulses are used in a single
data word, this leaves 88-48 or 40 additional scan positions to
determine the situation of the switches in the control switch
array 620, those in the judges controls array 640, the frame
then presented on the screen by the film drive projector 673,
and the status of the write-in apparatus 674. The logic circuit
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671 in the vote head is arranged so that the input scanning
pulses are first applied to the first column, idesignated
column one in FIGURE 1 and in FIGURE 6, and this column
position is "held" while the eleven rows in that column are
scanned. Only eight of these row scanning pulses are
actually related to the eight vertical vote buttons 607 in
the first column, leaving three additional scanning positions
for hardware points to be scanned by the last three scanning
pulses at the end of each column pulse sequence. The eleven
individual row pulses are identified by number in the column
3 position of the pulse group 580.- At the end of the data
word, the time duration of one bit of the 88 bits is indicated~
to better relate this description to the succeeding description
of hardware and program cycles.
This single bit, or the space between two adjacent
pulses, is shown expanded in a time frame in FIGURE 7. In a
preferred embodiment the frequency of the bit pulses was
selected so that 88.8 complete data words would be transmitted
in each second. This provides ample time for effectively
scanning all the hardware in the vote head (or eight vote
heads), returning the output signals to the data center,
illuminating a light associated with a vote but~on or advanc-~`r
ing the projector, or taking any other action indicated by a
change in status of any selector button at the vote head.
This occurs so rapidly that the voter does not notice any time
lag between initiation of a request at the vote head and the
carrying of that request into effect by the program stored in
the data center. This transmission rate of the data words
corresponds to a time of 11,264 microseconds for one complete
data word. One bit of the 88-bit data word thus requires 128
microseconds. This single bit, shown expanded in FIGURE 7,
in only 128 microseconds provides the time for 64 cycles of
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the complete voting system. Of these 64 two-microsecond machine
cycles, the first 8 cycles are devoted to the hardware--
scanning the equipment--and the remaining 56 cycles in each bit
are devoted to the program execution, carrying out the orders
or acknowledging the operation of some element in the hardware.
Below is Table A, setting out the row and column scanning
locations for the 88-bits of the data word. In other words,
this chart represents the input data signals to the vote head
600 distributed according to the scanning sequence. Each
column has an address in the three-bit binary code (4-2-L)
and each of the 11 horizontal rows has an address in the four
bit binary code (8-4-2-1). These specific addresses are
shown under each of the column headings, and at the left side
of the chart below the Row SBC (scan button counter)
designation.
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TABLE A -- Input Signals To Yote Head
Address ' Scan Button Counter: Column~4~2,1
SBC Row Cl C2 C3 C4 C5 C6 C7 C8
8,4,2,1 000 0~1 010 011 100 101 110 111
0000 LPll LP12 LP13 LPl4 LP15 LP16 RCB:l FMB:l
0001 LP21 LP22 LP23 LP24 LP25 LP26 RCB:2 FMB:2
0010 ' LP31 LP32 LP33 LP34 LP35 LP36 RCB:3 FMB~
0011 LP41 LP42 LP43 LP44 LP45 LP46 OPEN FMB-4
WR--
IN
0100 LP51 LP52 LP53 LP54 LP55 LP56 CHANGE FMB:5
FRAME
0101 LP61 LP62 LP63 LP64 LP65 LP66 REV FMB:6
, FRAME
0110 LP71 LP72 LP73 LP74 LP75 LP76 ` CLK FMB:7
PRT-
, WHL
0111 LP81 LP82 LP83 LP84 LP85 LP86 FMB:8
1010 vo~ VOrING WR- WR- VOTING REG.
ACTIVE ENAB. IN IN ENAB. VOTES
~ FLASH. INIT. M~DE SOLID
1001 SW WR- TM AID
ACT ~ IN - PARTY
OPEN
1000 PEI 1 PEI 2 PEI 3 PEI 4 PEI 5 PEI 6 PEI 7 PEI 8
LP 111 LP 112 LP 113 LP 114 LP 115 LP 116 LP 117 LP 1l8
- 19--
~078~)65
The designation '~LP" refers to one of the lamps,
such as the lamps 608 shown in FIGURE 3 adjacent each of the
vote buttons 607. Thus after one of the vote buttons has been
depressed, and the signal is transmitted over the conductor pair
to the data center, the program determines if in fact this was
a valid button and no other candidate (or no excess number of
candidates) has been selected for this race, and returns a
signal to the appropriate position to light the lamp adjacent
the actuated voter button. In columns 7 and 8, the legend
"RCB" refers to a "race count bit" and "FMB" designates a
"frame bit". The subsequent legends regarding opening the
write-in window, and the changing and reversing of the frame
presentation, are apparent. The legend "CLK PRT-WHL" means
"clock print-wheell" that is, a pulse initiating the actuation
of the print wheels in the write-in apparatus 674 to identify
the frame and row in which the write-in selection was made.
"REG VOTES" refers to the register vote button 626~on the vote
head. In column 8, "ADD PARTY" refers to the "ADD" button
645 on the judges panel (FIGURE 4).
Among the other legends, "VOTING ACTIVE" means that
the voting lamp 643 (FIGURE 4) has been illuminated, and "SW
ACTIVE" means that the active lamp 644 has been lighted.
"VOTING ENAB. FLASH." means that the voting lamp 643 is being
flashed intermittently and not continuously illuminated.
"WR-IN OPEN" indicates that the write-in window 605 has been
opened. "WR-IN INIT." indicates that write-in button 628
has been pushed. "TM" indicates the system is in the test
mode.
"WR-IN MODE" denotes that the write-in sequence has
been started. "VOTING ENAB. SOLID" means that the voting
lamp 643 is continously illuminated. In the bottom or 11th
row in Table A, the term "PEI" refers to party enable indicator.
This legend will become more apparent from the subsequent
-20-
1078~65
explanations.
In a related manner the output signals from the vote
head to the data center, occurring at precise times in synch-
ronism with the 88-bit scanning input signal in a complete data
word, denote the actuation of switches or the status of some
component. These output signals in the 8xll information matrix
are depicted in Table B below.
Table B -- Output Signals From Vote Head
Scan Button Counter: Column 4,2,1
Address
SBC ROW , 000 ~ 001 ¦ 010 ¦ 011 ¦ 100 ¦ 101 l 110
0000 SWll SW12 SW13 SW14 SW15 SW16 WI17 FMID 1
0001 SW21 SW22 SW23 SW24 SW25 SW26 WI27 FMID 2
0010 SW31 SW32 SW33 SW34 SW35 SW36 WI37 FMID 3
0011 SW41 SW42 SW4~ SW44 SW45 SW46 WI47 FMID 4
0100 SW51 SW52 SW53 SW54 SW55 SW56 WI57 FMID 5
0101 SW61 SW62 SW63 SW64 SW65 SW66 WI67 FMID 6
0110 SW71 SW72 SW73 SW74 SW75 SW76 WI77 FMID 7
0111 SW81 SW82 SW83 SW84 SW85 SW86 WI87 FMID 8
1010 WI91 WI92 WI93 WI94 WI95 WI96 WR
SELECT ', ,~
1001 REV- ~EG. WR- TM ENAB- NEW ADD
IEW VOTES IN LED PAGE PARTY
OPEN
1000 PRTYC PRTYC PRTYC PRTYC PRTYC PRTYC PRTYC PRTYC
111 112 113 114 115 116 117 118
The format for Table B is generally similar to that
of Table A. However, instead of the designation LP for lamp,
"SW" refers to a switch, one of the vote selector buttons 607
shown in FIGURE 3. Thus if SW42 (the switch in row 4, column 2)
is depressed, this signal is transmitted out as a changed
data bit over a conductor pair to the data center, and subsequently
(after appropriate operation in the program at the data center)
1078065
a signal is returned to the corresponding information
position in Table A, so that the lamp 42 is illuminated in row
4, column 2, adjacent the button just depressed by the voter. In
Table B, column 7, the various write-in select button 631-638
are represented at the positions in column 7, rows l-8. In
row 9 of this column, the legend indicates this position is
associated with the write-in select button 628. In column 8-
the "FMID" positions refer to "frame identification" positions.
That is, a four out of eight code is used as will be explained,
which code positively identifies the particular frame or ballot
page being displayed on the screen for selection by the voter.
The legends in row 10 are associated with the diffexent butto~s~
having similar legends on the front panel and on the judges
panel of the vote head. The legend "PRTYC" in the last row
refers to "party control", and is useful both to provide
page control information which regulates page (frame) skipping,
and in providing the basic control or "configuration" tape
for a specific election after the 35 millimeter film has been
initially prepared to display the names of the different
candidates for the election.
; Given this basic understanding of the gençral block.
system in FIGURE 5, including the transmission of individual
data bits from the data center over one conductor pair 110
to the vote head and the return of signals over another
conductor pair at precise times related to the times of
transmission over the first conductor pair to the data center,
it will now be useful to consider the basic logical arrangement
of the major components in the vote head 600.
Vote Head --- Logic Description
FIGURE 8 shows the vote head information matrix with
the candidate selection array 606 generally indicated. The
remainder of the information matrix to be scanned by the
-22-
1078~;5
incoming pulses is not spec fically depicted! but from Table
A and the previous description it is apparent-that there is an
8xll matrix which will be scanned by the 88 serial data bits
in each word. This train of data pulses is received over the
conductor pair 700, and is termed the "vote head clock input"
signal for purposes of this description. This is also termed
the "head clock" signal; "cloc~" denotes the precise generation
of the pulses by an oscillator circuit, and "head" refers to
the vote head. By "conductor pair" is meant either a physical
pair of conductors as is frequently used in telephone circuits,
or a coaxial pair of concentric conductors often used in higher-
frequency circuits, or any other pair of conductors for
transmitting a data signal. It is emphasized that although
each pulse is shown as relatively uniform and with the same
amplitude in FIGURES 6 and 7; a yes or no, a I or O~ signal
is generally represented by a change in amplitude in such pulses.
For example a pulse of virtually zero or less than one volt
amplitude could indicate no change or actuation or a component
or no command; and an amplitude of 5 or 6 volts can indicate
a button has been actuated or that some command had been generated
in the program portion of the data center in response to actuation
of a component in the vote head. The data output signals fro~
the vote head to the data center are passed over the conductor
pair 701, which like the other conductor pairs will be depicted
as a single line for simplicity. These output signals correspond
to the previously described data bits and particularly to the
matrix shown above in Table B. Another conductor pair 702
provides for receipt of a reset or sync signal from the data
center, to maintain the requisite correspondence in time
between the data pulses circulating in the vote head and those
in the data center. Another conductor pair 703 provides
an input connection to the vote head 600 for receiving data
-23-
10780~5
signals from the scratch-pad or vote head memory in the data
center, as will be explained subsequently. -
The vote head clock input signal train passes over '
conductor 700 to one input connection of a conventional AND
circuit 704, the other input connection of which receives the
authorization signal when the judge's key 641 is initially
inserted and displaced to activate the vote head. The output , '
signal from the AND circuit 704 is passed to a counter circuit
705, over conductor 706 to a gate circuit 707, and over
conductor 708 to a lamp shift register circuit 710. Details
of these various circuits represented in block form will be '
set out hereinafter in FIGURES 22A-28, to enable those skill ~ '' '
in the art to build and operate the system with a minimum of
experimentation. However the basic signal flow and co-operation
of the different system components will be evident from the des-
cription and the block diagram, and will not be given in
connection with the schematic diagrams which are appended only
for an explicit teaching.
The counter circuit 705 is of the type whi.ch receives
serial bits or pulses over the input connection from A~D circuit
704, and provides binary coded output signals on a plurality of
conductors at two different output connections. A 4-wire or~4-
position binary output signal is continually provided on its
first output line designated 711, and these binary signals
correspond to the binary address (8,4,2,1) of the successive
rows 1-11 in the information matrix to be scanned, noted in
the left column of Tables A and B above. On the other output
: line 712 of the counter 705, is a 3-wire binary signal, for
use in the 3-position column address (4,2,1) and related
functions.
The 4-line binary signals on line 711 are applied to
gate circuit 707, to a multiplexer circuit 713, and, over line
-24-
1078~6S
714, to one input connection of a re~ister circuit 715. The
output signal from gate circuit 707 is passed over conductor
716 to one input of another gate circuit 717. The output signals
from lamp shift register 710 are applied over an output line
718 to the same gate circuit 717, which in turn provides output
signals for passage over the line 720 to drive the lamp-
driver SCR circuit 721 and provide row signals on line 722
(actually, on 8 conductors corresponding the the 8 rows of
the candidate selection button array 606 of the vote head). It
is noted that the output signals from the lamp shift register
710 are also passed over line 718 and 723 to another input
connection of the register 715 which provides the frame numb~
identification, and (to the left of circuits 717 and 721)
over line 724 ~o an input connection of another decoder
circuit 725, used in providing the forward and reverse commands
to the film projector and also commands to the write-in
apparatus.
The 3-wire column signals on the output line 712
of counter 705 are applied to a decoder circuit 726 for
translating the binary signals into individual wire signals,
and to one input connection of a gate circuit 727 which also~
receives two other input signals, one from the output conductor
pair 701 of the vote head and the other from the input date
line 703. Gate 727 provides an output signal over conductor
728 to the lamp shift register 710.
The third output of the 3-wire binary signals from
counter 705 is passed over conductors 712 and 730 to the third
input connection of register 715. The output signals on
individual wires from decoder 726 are passed over the eight-
conductor circuits 731 and 732 to the various locations in
the eight sequential columns of the vote button array. Six
1~78065
of the conductors are included in another circuit 733
coupled to a lamp-driver transistor circuit 734, which in
turn provides amplified output signals for passage over
the six conductors (collectively labeled 735) to illuminate
the selected ones of the indicator lamps 608 when an
adjacent one of the vote buttons 607 is depressed.
At the top left portion of FIGU~E 8 is a decoder
725, receiving input signals both from lamp shift register
710 and from the decoder circuit 726. Decoder 725 provides
a first pair of output signals on conductors 736 and 737.
These signals are amplified in the respective coil driver
stages 738, 740 and passed over the control conductors 741 ,:.'f.
742 to the projéctor 743. The signal on conductor 741 is
used to signal a change of frame in the forward direction to
the projector, and conversely the signal on conductor 742
indicates a backup signal for the projector. Such application
of forward and reverse signals with a hand-held control unit
for the 35 millimeter projectors are well known and understood
in the art. In addition the projector operation is explained
- 20 in detail in the above identified referenced patent.
There are two additional output connections from~the
decoder circuit 725. The first of these connections passes a~
signal over conductor 744 to another coil driver stage 745,
for providing a signal over line 746 to a print write-in
command circuit 747, and also providing a signal over line 748
to the print wheel position register 715. This register has
three inputs, the row and column inputs from counter 705 and
the additional si~nal from lamp-shift register 710. Accordingly
register 715 always provides a signal over conductor 750 to
the print write-in command circuit 747 which indicates the print
wheel positions, that is, the positions of three print wheels
collectively denoted 751 positioned adjacent a paper web 752
for impressing thereon the characters on the print wheel adjacent
-26-
1~78~65
the paper when energy is imparted to the print wheels under the
command of circuit 747. Another output signal from command -
circuit 747 is passed over a linkage, represented by broken line
754, to release the energy previously stored in a mechanical
spring 755. In a preferred embodiment the mechanical spring
was physically coupled to the write-in window 605 so that,
upon closing of the window by the voter at the termination of
the previous write-in voting procedure, energy is stored in
spring 755 for subsequent release to (1) pull up the write-in
window 605 when the next write-in sequence is initiated, and (2)
provide impact energy to the print whe~ls 751 to imprint both
the frame ID number (from 0-19) and the row number (1-8) on
paper, and thus provide the precise identification of the exact
race for which the selection has been written in.
Decoder stage 725 also provides another output control
signal on conductor 756. When the voter depresses the write-in
button 628 ~FIGURE 3), this signal is passed over the cable to
the data center, examined under its internal program and an
appropriate signal is returned to the vote head which, after
passing through decoder 725, provides an intermittent signal
on line 756, through lamp driver stage 757 and over its output
conductor 758 to flash the write-in select lamp 629 adjacent
the basic write-in button 628. When the voter then depresses
one of the row write-in select buttons 631-638, the signal
returned from the data center provides a continuous energization
signal on line 756 and write-in lamp 629 is continuously energized.
At the same time that the lamp is continually turned on, the
other signal is provided on conductor 744, through coil driver
stage 745 and over line 746, both to the print write-in control
stage 747 and over line 748 to the register stage 715, as pre-
viously described.
It is again emphasized that the trains of data pulses
-27-
10~8~65
are continually circulating between the data center and
the vote head., As previDusl~ described these data pulses are
received at the vote head 600 in FIGURE 8 over line 700, 'for
stepping the counter 705 and providing the basic signals' for
the logic arrangement in the vote head. After scanning the various
selector buttons and controls in the information matrix, the
output signals'are provided on an ll-wire output line 760 (corres-
~ponding to the 11 row positions) to the multiplexer 713. The
received input pulses or serial data bits are decoded in the
counter 705 to provide different binary codes for use in address-
ing and locating the various items. The matrix is scanned by -
"sitting"-on a single column, while the 11 rows of possible '
information in that column are scanned; hence the lI-line
output signal of parallel bits in cable 760 to the multiplexer
713. The multiplexer functions in a sense inverse to counter
705, converting the parallel pulse bits into a serial train of
data pulses for transmission over the data output line 701
to the data center in synchronism with the basic clock signal
provided in the data center. A synchronizing signal is also
provided over from the multiplexer 713 over line 761 to one
input circuit of gate 727.
Line 702 at the lower right portion provides for
application of a reset or sync pulse to the counter stage 705
during the transmission of each data word. As noted
previously, to effect the maximum derivation of information
and the transfer and decoding of this information with a
minimum of ha~dware it is requisite that the data bits
, received over the input line 700 and then circulated through
counter 705 and the subsequent stages be maintained in
synchronism with the circulation of the pulses and operation
of the components in the data center itself. For this reason
the reset pulses are applied to the counter 705 to be
1078065
certain that any slight aberration or time difference between
the pulses is corrected in each data word cycle. As a practical
matter it has been found that the reset is needed only during the
first cycle of the equipment, when the data center and the vote
head have been initially turned on and energized. After the
first reset pulse, the synchronism is maintained because of the
, ....
precise timing from the basic oscillator or clock in the data `~~
center, but the reset pulse provides an extra measure of safe-
guard during the subsequent operation of the voting system.
It has been found convenient to represent successive
ballot pages as successive, individual frames of a continuous
film strip. FIGURE 9 illustrates a single-frame segment of one
~ such film strip. The segment includes a central portion 675, on
which the individual candidate names and similar specific
information is carried, after being prepared ~y conventional
photographic techniques. This information is projected onto the
screen of the vote head so that the individual names or party
identifications are on the translucent strips 611-618, above
the vote selector buttons 607 in the 8x6 matrix of vote buttons.
20 The film strip includes conventional film sprocket holes 676
adjacent each margin of the film for driving the film in response
to signals supplied over lines 741, 742 to the pro.jéctor appar-
atus. In accordance with a feature of this inventive system,
each frame segment also includes a frame identification area 680.
This frame identification (FR ID~ location is subdivided into
eight individual locations 681-688. In a preferred embodiment
a four-out-of-eight code was used for positive identification
with maximum accuracy. That is, each frame includes a vertical
column of eight spaces of which four are left open to pass
30 radiation from the projector bulb, and four are opaque, like the
-29-
1078065
adjacent opaque portion of the film strip. To the right of the
film strip segment an array of photoresistors 6~0 is depicted.
Projector 743 was illustrated in FIGURE 3 as a simple
block, because the projector with a remote control arrangement
for advancing and reversing the frames, with each frame being id-
entified as light falls on four of the eight photoresistors `
numbered 691-698 in a columnar array corresponding to the
vertical dispostion of the code spaces 681-688 on the film strip.
Although photoresistors were used in a preferred embodiment, those
skilled in the art will appreciate that photodiodes, photo-
transistors or any other related component for providing a
variation in some electrical parameter as a functiop of th~ ab-
sence or presence of incident radia~ion can also be used. In
the frame shown in FIGURE 9, the code one position is open as
signified by the open rectangle 681, and the next code row
positions 2-5 are opaque, preventing the passage of light. The
last three positions 686-688 are open to pass the radiation.
This results in passage of light from the bulb in the projector
through the openings 681, 686, 687 and 688 to impinge on the
similarly positioned phototransistors 691, 696, 697 and 698.
This provideslan output code with positive identification of which
frame is then being illuminated, identifying to the data center
which candidate array is then presented to the voter.
FIGURE 10 depicts a complete code arrangement for
identifying 20 successive frames, or 20 individual slides, when
presented successively by the projector for viewing by the voter.
There is an extra or twenty-first frame identified by the asterisk
with completely opaque presentation on the film, and only the
frame identification area is open to transmit light. This is a
special~identification of the home frame, and allows positive
decoding even if the registration of the film, while the projector
is stepped in reverse, is offset from the registration when it is
-30-
1078~65
being stepped in the forward direction. The eight sensor row
numbers indicate the successive row positions of the
identification spaces 681-688, corresponding to the vertical
positions of the phototransistors 691-698. Of course other
code numbers and arrangements can be employed, bu~ that -
illustrated was successfully used in a preferred embodiment,
g~ving positive and accurate identification with a relatively `
simple eight-position code arrangement.
From the code arrangement shown on FIGURE 10, it is
apparent that a corresponding arrangement can be utilized to
identify each candidate or question presented to the voter.
Each location on the screen visible to the voter can be
identified by the number of the frame (0-19) then béing
projected onto the screen, the row (1-8) in which the candidate
or question is positioned, and the column number (1-6) in that
specific row. There are 20 frame numbers identified in
figure 10, indicated as 0 - 19. Thus two digits are required
to identify the frame when more than nine frames are utilized.
A third digit is used to identify the row (1 - 8), and a
fourth digit LS used to identify the column (1 - 6). Suppose
then that on a 20-frame format, it is desired to identify the
candidate position on the third frame, in the first row, and
the fourth column. This can be done by the four digit
sequence 0314. In a corresponding manner a four digit
sequence can be utilized to identify all the successive
positions on the 20 frames of the film strip.
With this basic understanding of the data ~low and
interconnection of the subsystems within the vote head itself,
the interconnection of the data center and its operation will
now be described. In general all of the components such as the
memories and the logic arrangement within the data center are
used to execute the program stored within the data center~ both
-31-
1078~)~;S
in the hard-wired logic and in the memory with information read-
in from tape ? and also to send out the data pulses to the
vote heads coupled to that particular data center. Because as
many as eight vote heads can be serviced and continually
monitored by a single data center, there is one component or
circuit arrangement, termed an adapter, in the data center
which is particular to only one vote head. If there are
eight vote heads coupled to the data center, there are eight
adapters; with only two vote heads coupled to the data center,
only two adapters are used. The illustration and description
of a single adapter will suffice to show the use of up to
eight of these adapters. In addition, however, it is
convenient to use shortened designations to describe the data
and circuit interconnections within the data center. For
example, the vote head memory shown as a single block 135 in FIG-
URE 5will be designated VHM; the program memory in the data
center will be designated PM. Aithough these mnemonics will
be readily apparent to those skilled in the art, Table C
set out below is a compilation of the mnemonics or short-
hand identifications of the major components used in the
data flow diagrams set out in FIGURES 11 - 14.
10780~;5
TABLE C -- BLOCK DIAGRAM GLOSSARY
Abbreviation Name Size in Bits
FA2 Frame Address Register5
MAR Memory Address Register 7
VHC Vote Head Counter 3
VHM Vote Head Memory 2,048
ECM Election Con iguration
Memory 2,048
MSR Memory Data Shift Register 4
CCM Candidate Count Memory4,096 to 16,364
MCR . Memory Counter Register 4
CAR Candidate Count Memory
~ Address Register 12
PAR Program Address Register 10
MCO Memory Counter Overflow
MC 1/2 Memory Counter 1/2 Bit
NVB New Valid Button
NFI New Frame ID Code
PCC Program Cycle Counter 2
SHC Scan Head Counter 3
SBC . Scan Button Counter 7
IR Instruction Register 16
PM Program Memory 8,192
SMA Selected Memory Address
CMPR Compare Circuit
SEL Selector Circuit
VH Vote Head
VHR Vote Head Register 7
:
107~5
DATA CENTER ---LOGIC DESCRIPTION
FIGURE 11 depicts one adapter with the logic ~low
shown between one specific vote head and the data center serving
that vote head. The serial data bits provided by the multi-
plexer stage 713 in the vote head are received in the
adapter circuit over line 701, and applied to a frame
identification shift register 800 and to a vote head counter
circuit 801. The shift register state 800 is intercoupled over
two separate conductor pairs 802, 803 with a frame identification
stage 804. "Frame" generally refers to an individual portion of
the film strip such as that identified as 675 on FIGURE 9. The
mnemonics and the digits shown on the conductors adjacent the ~;
shift register 800 and the frame identification stage 804 will
be generally understood by those skilled in the art, and are set
out in TableC above. "FA" means "frame address" and the
successive digits 16, 8, 4, 2 and 1 indicate there are 5
conductors for signifying these 5 different values in a binary
notation system. "N" refers to one adapter, such as the
eighth, and (N-l) refers to the previous adapter, the seventh
in this example. The legends will also be identified sub -
sequently in connection with FIGURES 12-14 showing the
appropriate conductors and multiple-conductor runs in the data '
center which either receive the signals from the adapter shown
in FIGURE 11 or transmit the signals identified on the various
conductors.
The vote head counter state 801 is a representation
of an arrangement used as a "de-bounce" circuit for determining
that a signal received on conductor 701 is in fact an indication
that a selector button or other switch status has changed in the
vote he;ad, and that there is not a momentary transient noise
or some other stray effect simulating the button actuation.
When the circuit determines, in conjunction with logic and
program circuits in the data center, that a button has in fact
-34-
1078~)~;5
been depressed and that it is a new valid button, this signal is
transmitted on the line indicated with the legend "NV~ (N~
The legend "PGM SEL VHl" refers to the "program selector", vote
head 1". "VHl" is used to indicate that although the program
in the data center is generating signals for as many as eight
different vote heads, that signal indicated with this legend
VHl is transmitted only to the adapter for that first vote head.
The vote head register can be considered a "button" register for
continually indicating the button or switch actuated in the vote
head. The lower-most register 806 combines the signals from the
vote head memory data buffer and the scan selector, providing an
output signal on line 703 for application to the gate circùit 7
in the vote head. The other conductors 700 and 702 are shown to
indicate that there is an electrical connection through the
adapter circuit from the data center to the vote head, for these
particular lines. The other specific connections and the legends
will not be described in FIGURE 11, as they will become apparent
from the subsequent explanation of the logic arrangement and data
~low in the data center itself, Schematic details of the adapter
are shown in FIGURES 48A and 48B.
FIGURES 12-14 taken together illustrate the pulse
generation and data flow among the major components of the data
center 100. As shown in FIGURE 21, a master oscillator or
clock circuit 200 provides pulses at a frequency of 500
kilohertz. These pulses are applied to the input connection of
a divide-by-eight counter circuit 201, to the input connection
of the gate circuit 202, and over line 203 as the 500 khz.
signal applied at one of the upper input connections of vote
- head counter 801 (adapter, FI~URE 11). A 3-wire output signal
from divid~-by-eight counter 201 is applied to a second
divide-by-eight counter 204, and also the input circuit of a
decoder 205. The other connection from the output of counter
~0780f~5
201, shown upwardly and to the left of the decoder 205,
refers to the scan-head counter, a 3-wire connection (SHC 1-3).
There are eight individual wire outputs from the decoder 205,
from the scan selector circuit for the first vote head VHl through
the eighth scan selector circuit VH8.
It is important to emphasize that there is a basic
synchronization between the pulses produced by clock circuit 200-
and circulating in the data center 100, and the pulses then
circulating in the vote head 600, attained by the common deriva-
tion of the timing pulses at the output circuit of divide-by-
eight counter 204. That is, the output pulses from this .
circuit 204 are passed to the input circuit of a scan button ~-
counter (SBC) 206, and the basic timing pulses for operation o
the data center are produced at the output side of this scan
button counter. The output signals from divide-by eight stage
204 are also passed over the line 700, through the adapter
(FIGURE ll), and through the AND circuit 704 in the input of
the vote head to the counter 705 of the vote head. In this
sense counter 206 in the data center corresponds to the counter
705 in the vote head, because both receive their basic sync
or clock pulses from the output side of divide-by-eight counter
204. This connection lnsures that the basic synchronization
between the vote head and the data center is always maintained.
There are three outputs from the scan button counter
206. The first output circuit is applied to the input of
decoder 207, which in turn has three output signals, scan frame
number, print clock, and reset (this is the reset signal applied
through the adapter and, over conductor 702, to the bottom
of counter 705 in the ~ote head). The second output from
stage 206 are the row and column scan button counter
signals, applied to the vote head register 805 in the adapter
circuit as already explained. The third output from scan
-36-
1078065
button counter 206 is applied to another counter circuit
208, which divides down the input pulses to provi.de a 90
millisecond clock output signal for use in the data center.
Divide-by-eight stage 204 has another output signal
which is applied to a decoder state 210, which both provides a
first output signal as the scan gate signal for use in the data-.
center, and a second output signal which is passed over line
211 to an input connection of gate circuit 202. The output
signal from gate 202 is passed over line 212 as a sync signal
for the program and instruction portions of the data center.
The output signal from gate 202 is applied as a first
input signal to the program address register (PAR) 213, which
also receives a second input signal (IR7) and a third input
signal which is returned from program memory (PM) 214 over line
215. The output of PAR 213 is passed to the program memory
stage 214, and from there to the eight-conductor read-~nly
memory (ROM), to the instruction register stage 216 and, as
already described, back to the input of PAR 213. "ROM" as
used herein refers to a read-only memory, and is inter -
20 changeable with the term "ROS" to describe read-only storage.
The numbers 128, 64, 32, 16, 8, 4, 2 and 1 after the ROM p
designation indicate there are eight binary signals being
passed over eight conductors from the output side of the
program memory 214.
The instruction register 216 simila~y has eight
individual line output signals in a binary code designated
IR 0-7, which are applied to one of the input connections
of the instruction decoder stage 217. The instruction decoder
stage receives another input signal over line 218 from the
program:memory 214, and a third input signal over line 220 from
the program cycle counter (PCC) 221. The program cycle counter
receives a first input signal from gate circuit 202, and a
1~78~;5
second input signal over line 222 from the instruction decoder
217. The instruction decoder provides output s-ignals such as
"button handled" and "Reset F~l ID", shown applied to the vote
head counter 801 and the frame ID stage 804, respectively, in
the adapter circuit. Only the legends are used adjacent the
conductors, as the addition of more reference numerals would
only occupy additional space and not clarify the intercoupling
of the various circuits~ Those skilled in the art will be able
to derive precise circuits as a result of the explanation in
conjunction with the logic flow diagrams. However to insure
a complete teaching, and enable the construction of such circuits-
with a minimum of experimentation, schematic diagrams on FIGS.
29-47 and 49 are included to enable those skilled in the art
to rapidly construct a voting system in accordance with the
inventive teaching.
A comparator stage 225 shown at the right of FIGURE
12 is connected to make a switch comparison, that is, it
examines a button number or switch number transmitted from the
vote head to determine whether it is the same as the button
or switch number already stored from the previous operation.
As shown the comparator receives binary input signals from the
vote head register over seven individual conductors, a signal
corresponding to that shown at the bottom output side of
the vote head register 805 in the adapter circuit. The
comparator circuit 225 also receives the scan button counter
input row and column signals, provided by the counter circuit
206. The output signal of comparator 225 is then a switch
comparison signal on line 226.
In the lower right of FIGURE 12 is a multiplexer
227, which receives three input signals and provides an
output shown as the select ~rame address 5-wire binary signal.
This multiplexer or selector circuit 227 has three inputs,
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107~5
the first of which is a frame address register select signal.
The second input sîgnal is the frame address 5-wire binary signal
provided from the frame ID shift register 800 in the adapter.
The third input signal is the frame address register 5-wire
binary input signal, which is provided by the frame address
register itself shown in FIGURE 13.
FIGURE 13 includes hardware or the actual circuits
operated by the program stored in the data center, including
the frame, position and vote head identification circuits.
A frame address register (FAR) 230 is shown in the lower left
of FIGURE 13, and this register stage receives both a step FAR
signal to advance the frame address register, and a reset
FAR signal to reset the register circut. Its output (FAR 16,
8, 4, 2, l) is applied to the lower input connection of
multiplexer 227 shown in the lower right portion of FIGURE 12.
In the upper left portion of FIGURE 13 is the program
head counter (PHC) 231, which is stepped as it receives step
PHC input signals and provides output signals both to a decoder
stage 232 and a selector stage 233. The decoder also rec~ives
a scan gate input signal and provides eight individual program
select output signals for the respective vote heads 1 through
8. Selector stage 233 receives the described input signal
from program head counter 231, and another input signal
representing the 3-wire indication of the selected memory
address. The output signal from selector stage 233 is also
a 3-wire signal applied over the cable 234 to one input
connection of the memory address register (MAR) 235. The signals
applied to the upper portion of MAR 235 generally regulate the
row operation, and those other signals shown applied to the
lower portion of this register affect the columnar circuits
and operations. "INCR" stands for "increase" or "increment".
denoting an increase in the count by one. Similarly "DECR"
-39-
10'780~5
represents "decrease" or "decrement", representing a decrease
in the count by one. The 5-wire output signal from MAR 235
is shown applied to one input connection of a selector stage
236, the output side of which provides the various selected
memory address (SMA) signals. Selector stage 236, like the
other arrangements shown only in block form, will be illustrated
in detail hereinafter, but the showing in FIGURE 13 is
sufficient for a basic understanding of the various input
signals required to the selecto. stage to produce the selected
memory address output signals.
In the upper right portion of FIGURE 13 are two
selector stages 237, 238 which receive a plurality of input
signals identified by the various abbreviations previously
used. The upper selector 237 receives input signals from the
instruction register, memory data shift register, selected
memory address, and selected frame address to provide an output
signal to comparator stage 240. The other selector stage 23~ also
receives input signals from the instruction register, the memory
counter register, and read-only memory to provide another
output signal to the comparator stage 240. The output signal
from comparator 240 is passed to one input connect$on of a
selector circuit 241, which receives a plurality of input
signals as shown to provide a "test positive" output signal
to regulate the jump or branching operations executed by
the program when various combinations of the signals are present.
Selector stage 241 will also be illustrated in detail in a
schematic diagram hereinafter.
In the upper portion of FIGURE 14, the vote
head memory (VHM) 135, the election configuration memory (ECM)
1371 and the candidate count memory (CCM) 136 are shown. The
same reference numerals are used to relate these blocks to
the corresponding blocks in the data center 100 shown in
FIGURE 5. In the upper left portion of FIGURE 14, selector
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11~78~S
stage 250 receives input signals from the instruction register
and from the memory data shift register, providing an output
signal on line 251. This output signal is passed to thç data
input connections of VHM 135 and ECM 137. In addition the
vote head memory receives the program select vo~e head memory
input signals and scan select vote head memory input signals,
together with an address input that is also applied to the ECM
137. A "write" input signal is also applied to each of the
three memories 135, 136 and 137.
The output signal from vote head memory 135 is passed
to one input connection of another selector circuit 252, and
to an input connection of another selector circuit 253. Se ~s-
tor circuit 252 also receives a print clock input signal, a first
frame input signal, and another block data input signal. The
output signal from selector stage 252 is passed to the register
806 (FIGURE 11) in the adapter logic circuit, and its signal in
turn is passed o~er line 703 to the vote head.
IN FIGURE 14, selector 253 also receives another in-
put signal fro~ the election configuration memory 137. Selector
253 provides a first output signal to a memory latch circuit 254,
and asecond output signal to a memory shift register (MSR)
stage 255. In addition to the input signal from selector 253,
MSR 255 also receives load and shift input signals, and another
input signal from selector stage 2~6. As shown stage 256 in
turn receives input signals from the~control selector tape circuit,
the instruction register, memory counter register, selected
memory address and tape unit (TU).
The candidate count memory circuit 136, in addition to
the write CCM input signal, receives an input signal from the
memory count register (MCR 8, 4~ 2, 1) and another input signal
from the candidate count memory address register (CAR) shown as
two blocks 257, 258 in which the various input signals are labeled
~ 07~5
with the appropriate abbreviations. The output signal from
CCM 136 is a 4-wire signal labeled CCM 8, 4, 2~ 1, and it is
applied to one of the input connections of a selector circuit
260. This selector circuit 260 receives another input signal
~rom the memory data shift register (MSR). There are five
additional input signals, each labeled, which are applied both
to selector circuit 260 and to the memory counter register
261. The output signal from memory counter register 261 is a
4-wire signal labled MCR 8, 4, 2, 1. One of these lines
(MCR 8 ) also provides one input signal to a memory counter over-
flow (MCO) stage 262. In turn this stage MCO 262 receives an
input signal from the memory counter one-half bit stage 263
designated MC 1/2. The input signal to this stage, in addition
to all those shown coupled to the common line 264, is that
generated each time one-half bit is added to the memory counter
register by a 1/2 INCR MCR signal. In the lower left of
FIGURE 14, error check circuit 265 receives the five input
signals represented and identified, and produces three output
signals. The first output signal is really an eight-wire
signal to the error lamps, those lamps numbered 1-8 under the
legend "Video Voter Check" and collectively designated 121 in
FIG. 2 of the drawings. The second output signal from error~
check circuit 265 is for the zero verify lamp, to illuminate the
lamp 124 in FIG. 2 if the zero check proves correct. The third
- output signal indicates the system has been powered down.
In the lower right portion of FIG. 14 are three
intercoupled circuits, a mode control circuit 266, a tape
interface circuit 267, and a tape unit 268. Tape unit 268 can
be a conventional "Lear" type cartridge arrangement, as
previously described, for reeceiving the cartridge 105 shown in
FIG. 2. Vote control circuit 266 receives power on, door closed,
and power down input signals, as well as another signal from the
-42-
~ 0'7~ ~ ~ 5
tape interface circuit 267. The door closed signal to the mode
control circuit does not refer to the write-in door 605 of the
data center, but to the correct placement of a cover over the
data center. All the other input and output signals are
apparent from the previous description. Under the control of
the tape interface stage 267, tape unit 268 is driven by the
"run motor" signal and data is passed in, as represented by
the "data in" signal.
The three memories 135, 136 and 137 can be semi-
conductor memories, interconnected in the formats generally
shown in FIGURES 15A-17D. Vote head memory 135 is represented
in FIGURES 15A and 15B. The format shown in FIG. 15A is the,
initial frame format, that generally used in showing the status
of the various switches indicated by the legends in the drawing.
The remaining frames are shown in FIG. 15B, generally concerned
with respresenting the vote indicator button status as the
various buttons are pushed by the voter. Of course additional
memory capacity must be provided for the vote memory if
additional vote heads are connected to a single data center.
The format of election configuration'memory 137 is
shown in FIGURES 16A - 16D. The initial frame format is shown
in FIG. 16A, and the expanded initial frame format is depicted in
FIG. 16C and the expanded additional frames in FIG. 16D.
The candidate count memory format includes four
different fields, shown in FIGURES 17A - 17D, for the
candidate count, vote head count, tape ID, and the total vote
count. All these memories are random access semi-conductor
memories, the provision, interconnection and operation of which
are well-known and understood in this art. With this basic
description of the logic flow to the vote head and the data
center, together with the depiction of the memory formats in
FIGURES 15A - 17D, the preparation of a single configuration
-43-
10~7~ S
tape for a particular election will now be described.
Preparation of Configuration Tape
Briefly the program for operating the logical arrange -
ment of the data center, including the hardware described in
connection with FIG. 12-14, is stored in the election config-
uration memory 137 and in the logical circuit arrangement shown
generally in FIGS. 12 - 14. Before the equipment is operated
the ECM memory 137 is empty, and only the hard-wired circuits
logical arrangement is present. The appropriate memory infor-
mation must be first generated in the vote head, passed to theVHM 135, the ECM 137 and the CCM memory 136, and, when the
appropriate information is configured in all the memories t ~-s
information is read out and recorded on the tape 105 within the
cartridge. Before this is done, the thirty-five millimeter film
strip is prepared with the successive frames showing the
different candidates and other choices to be presented to the
voter.
The equipment is then energized, and a blank (unre-
corded) magnetic tape cartridge is inserted into the well 111
in the data center. The film strip is loaded into the thirty-
five;millimeter projector in the vote head. The power is j,~
turned on for both the vote head and the data center and the
on lamp 622 is illuminated on the front panel of the vote head.
The enable button 642 ~FIG. 4) is depressed on the judge's
panel, and the party enable lamps (661-664) in the first four
positions are illuminated, and the slide projector is actuated
to display the first frame. The first frame is treated
differently than the remainder of the frames. Initially the
first frame should be displayed with only one of the lamps 608
illuminated, and that lamp should appear in the second row,
third column position. This lamp is identified as 608A in
-44-
107~5
FIGURE 18, which includes additional legends useful in
explaining and understanding the configuration process. This
initial lamp illumination is useful to align the film, utilizing
the normal manual controls on the projector. The new page
button 623 and review ballot button 624 can be actuated to
advance and reverse the projector until the appropriate align-
ment and good focus are achieved. After the appropriate
alignment and focus are secured, the review ballot button 624
is actuated to return to the first frame, checking to be certain
that only lamp 608A is now on as shown in FIG. 18.
The horizontal translucent strips 611-618 shown in
FIGS 1 and 3 are referenced with the same numbers in FIG. 1~
The various legends shown in FIG. 18 are not actually projected
onto the first frame for configuration purposes, but are shown
on a chart similar to FIG. 18, to provide the one configuring
the tape with the information necessary to push the different
buttons and insert the appropriate information. For example, if
there are from one to six different parties whiçh can be validly
voted by pushing a single button, and this format is by row such
as across the strip 611, those vote buttons underneath strip 611
corresponding to the locations of the valid parties are pushed
once. The logic arrangement in the system is such that pushing
any button once provides a signal which, after passing through
the program, illuminates the lamp 608 just to its left. Pushing
the same button a second time in effect cancels the selection,
and extinguishes the adjacent lamp to show this. Thus, if a
~alid party is being displayed at a given location on the film
strip, and the button under that location is pushed, the lamp
to the left of the button just pushed should be illuminated to
show tha;t party is valid. Moreover the logic is such that if
the total number of votes has already been cast in a single
race, pushing an additional button will not be effective to
-45-
,,, . ~
1078{~5
illuminate the adjacent lamp, and the voter will know that
he must either cancel one of the preceding votes or ignore
his las-t selection.
The next operation is to determine if the offices or
races are listed on different columns. That is, if the election
has a vertical orientation (the offices being listed on different
columns, with the candidates for that particular office aligned
on the different successive rows in each column), then the lamp
608B in row 3, column 2 should be illuminated. For many elections
it is required to have the write-in apparatus operable. However
for certain elections it may be desired to inhibit the write-in
apparatus for the election. If the write-in voting feature~;=is
to be inhibited during the particular elertion for which the tape
is being configured, lamp 608C in row 2, column 5, should be
illuminated to indicate that this apparatus is in fact inhibited.
The county, precinct, last frame number, and security
codes are then entered using a binary code system in hexadecimal
digits. This is a well-known code in which four different lamps,
semiconductors or other units are either on or off to represent
the binary numbers 1, 2, 4 and ~. To represent the
number 11, by way of example, the 1, 2 and 8 lamp positions would
be energized (if lamps are used in the code), with the number 4
lamp left de~energized. Such an arrangment is well ~nown to
those skilled in the art and one example will be given o~ entry
of these codes. The system is arranged to display up to twenty
valid frames on each film strip. However the first frame always
has the address zero, and therefore, the highest number of a
valid frame address is 19. Suppose that there are 14 valid
frames on the election to be configured; because the first
valid frame address is zero, the last (highest number) valid
frame address is 13. The valid last frame lO's digit can only
-46-
1 ~ 7 ~ ~ ~ 5
be a 0 or a 1. In thiS case (13), it is a 1, and so the vote
button in the fourth row, second column is pushed to insert a
1. The adjacent lamp will be illuminated to show the 1 has been
correctly entered. To insert the value 3 in the last fr~me
l's digit position, two buttons must be pushed. The button with
the value 1 in row 5, column 2, is pushed, and then the button
with the value 2 in row 6, column 2 is also pushed. These two
buttons add to a value of 3, and thus the last frame address of
13 has been inserted in the memory.
The same procedure is then followed to insert the
number of the county in which the voting system is to be used.
There is-only one place, with the value of 1, for the co~nty
lOO's digit, shown in the row 2, column 6 position. Therefore
199 is the maximum number that can be entered for the county.
This button is depressed if the county number is 100 or greater.
The value of the county lO's digit is then inserted by depressing
the appropriate ones of the last four buttons (1, 2, 4, 8) in
the third row, and the county l's digit value is inserted by
pushing the appropriate ones of the last four buttons (8, 4, 2,
1) in the fourth row. The precinct number information is insert-
ed in the same way, by actuating the appropriate ones of the last
four buttons in each of the 5th, 6th and 7th rows of the button
array. The procedure to this point has generally provided the
information necessary for the upper six rows shown in the
initial frame (FIG. 16~) of the ECM memory 137. To configure
the expanded portion of the first frame, as depicted in FIG.
16B, the add button 645 (FIG.4) on the judges panel is depressed,
and this is recogni~ed by extinguishing the first four of the
lamps 661-664 and the illumination of the next four lamps 665-
668 on the judges panel. The security code is now entered,in the same manner as described above in connection with the
precinct and county numbers. This six-digit security number
107~ 5
is entered by pushing the appropriate ones of the vote
buttons 607 in rows 3 - 8, as generally shown in FIGURE 19.
These code digits are stored in the data center memory for later
recording on the configurated tape, but it is emphasized that
this security code will not be displayed when the operation~l
system is used and the ballots are presented frame by frame to
the voter. This security code is only for recognition after
the voting process has been completed to insure that the
appropriate configuration tape has indeed been used for the
particular election.
Also in FIG. 19, the lamps in the successive rows
of column 6 are utilized to indicate valid frame for the ~
sucressive pages 1 - 8. As noted previously, the use of the page
selection buttons 651-658 on the judges panel allow some of the
pages (or frames) to be skipped, thus allowing either an
accumulation of votes from different precincts in the same
data center, or the presentation of different referenda or
other questions to different voters from different geographical
locations. The lamps in column 6 in FIG. 19 should be illuminated
whenever the particular frame (or page) is not to be skipped,
and party votes are to be recorded for a corresponding frame.
The appropriate ones of the lamps 661-668 should be illuminated
on the ju~ges panel, in correspondence with the lamps
illuminated in column 6 in FIG. 19. For example, if the first,
third, fourth and eighth lamps are on in the last column in
FIG. 19, then the lamps 661, 663, 664, and 668 should be
illuminated on the judges panel to show that these pages or frames
are not to be skipped. In general it is noted that these lamps
should always be illuminated to indicate the first and last
frame positions, as these are instruction frames.
At this time the add button 645 is de~resse~, and
this will be indicated by the de-energization of the last four
lamps 665-668 on the judges panel, and illumination of the first
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10~7~i5
four lamps 661-664. The new page selector button 623 on the
front panel is depressed, and the film will advance to display
the next frame. It is understood that the different candidate
names will be displayed on the successive translucent strips
661-618 where the legends "button valid?" are show~ FIGURE 20.
However the arrangement of FIG. 20 indicates that each button
can be validly pushed to make a selection during the election
process should be pushed at this time, and recognized by all
the illumination of the lamP adiacent the selected button. When
all the buttons have been pushed to complete the illu~ination of
all the lamps indicating valid button positions, the add button
645 is then depressed on the judges panel, the first four ~ ps
661-664 are extinguished and the last four lamps 665-668 again
are illuminated. Referring to FIG. 21, in this position the
expanded portion of the additional frames is configured. It is
noted that the first two columns provide for insertion of the
maximum vote counts for each race. The first colu~n has a
numerical value of one, and the~ second has a numerical of two.
If the "offices listed on different columns" button was pushed
when configuring the first frame, as described in connection with
FIG. 18, then the successive rows in the expanded frames will
correspond to the column positions on the film strip. The
maximum vote count for a particular race can thus be 3, if
it is not extended (as described hereafter), or 9 if the race
is extended. In FIGURE 21, the legend "partisan?" in the
third column signifies that the lamps in this column should be
illuminated whenever the election is eligible for party voting.
That is, if the Democratic party button is depressed when the
first frame is displayed, the Democratic party candidate on
this frame will receive a vote. The lePend "ProPortional?"
in the fourth column refers to ~ro~ortional votin~. The lamPs
in this column should be illuminated whenever the election is
eligible for proportional voting. For examplet if the maximum
-49-
107~0~S
vote count for a particular race is 3, proportional election
means that a voter can select one candidate who will then receive
all three votes, or two candidates who will each receive one and
one-half votes.
In the fifth column, the legend "extension of row or
column" refers to the presentation of the candidates on two
successive rows or columns, instead of only on a single row or
column. Suppose for example there were eight candidates in a
single race. Their names could not be presented on only the first
six horizontal row positions. Accordingly the button in row 2,
column 5-is depressed to extend the race through both rows 1 ~nd
2. In effect the second row or column is then made an extension
of the previous row or column for purposes of accumulating the
vote totals. It is noted that under these conditions there are
two lamps and buttons available (at the column 1 and 2 positions
in each row) to insert the maximum vote count, and this
provides sufficient signals so that a maximum vote count of
up to 9 can be inserted when the race is extended. Illumination
of any lamp in the fifth column of a display as shown in FIG. 21
indicates that the row in which that lamp is illuminated is an
extension of the previous row.
The lamps i~ the last column of FIGURE 21 should be
illuminated to show whether the frame being configured is a
valid frame for the given page enable selection on the judges
panel. If the frame is to be skipped for a given page enable
selection, then the corresponding lamps in the last column
should be off. The steps iust described in connection with
FIGS 20 and 21 are then repeated for each successive frame of the
film strin until the entire election has been confi~ured. At
this time the en~ire configuration format should be reviewed by
reviewing each frame on the film strip. This is done utilizing
the review ballot, new page, and add but~ons. Corrections can
be made simply by depressing any button adjacent a lamp
-50-
107~;S
erroneousl~ hted, and noting that the lamp is then
extinguished. After the entire configuration has been verified,
the register votes button 626 is depressed. All the-lamps will
then be extinguished. The tape recorder apparatus can then be
automatically activated and the information temporarily stored
in the memories 135-137 will be recorded onto the tape 105,
under the control of the data center. This recording of the tape
takes only a very short time.
Although the master tape has now been recorded, the
memories still retains the information inserted by the procedure
described above. Thus if another configuration tape is to be
recorded with only minor changes from that on the first tape~,
the original configured tape can be removed and a new, blanlc`
(unrecorded) tape inserted into the tape well of the data center.
Depression of the review ballot button 624 on the vote head will
return the film strip to the first frame. The configuration can
be modified by successively pushing the new page button 623,
~dvancing the film frame by frame and changing the state of the
desired lamps by pushing those buttons which effect the desired
changes. After the new configuration has been verified, it can
be recorded on the second tape in the same manner.
0 eration Durin Election
P g
In general the set-up and energization of the voting
system is supervised by two judges of election from opposite
political parties. The configured tape in the cartridge lC5 is
inserted into the well 111 of the data center, and the data
center is then closed and loclced with the cover preventing the
removal of the tape cartridge. Power switch 104 is then turned
to the "on" position, and the "tape" mode light 118 will be
illuminated. At this time the hard-wired logic circuits in
the data center regulate the read-out of the data stored on
the configured tape into the memories 135-137 of the data center.
In less than 3 minutes the transfer of data and the other warm-
-51-
lO'~ S
up functions are completed~ and the system automatically enters
the "vote" mode, so that iamp 118 is extinguished and lamp
117 is lighted~ The "battery" light 126 will also be on until
the battery is fully charged, and then will be extinguished.
The vote head cover is removed, and authorization key
641 is inserted and turned clockwise on the judges panel, and
the projector lamp (not illustrated) is turned on. The enable
button 642 is turned on, and the lights 622 on the front panel
and 643 on the judges panel will flash intermittently; no
votes will be recorded in the data center while these lights are
flashing. The "new page" button 623 is successively pushed to
display each frame or image. Each frame is tested by pushin~
the buttons for each voting position as designated, to be
certain that the accompanying lamp 608 is illuminated as each
adjacent selector button is pushed. The judges attempt to
over-vote each race, to be certain that the tape is properly
configured and will not allow such over-voting. Each frame is
advanced and the vote buttons are actuated for all the offices
referenda, and other questions on the ballot. The judges
compare the specimen ballot with each frame. After the film
and the tape have been verified, the "register votes" button
626 is pushed to clear the system, but no votes are recorded
at this time. With the vote head cover still removed, the top
side of the paper roll for the write-in apparatus is exposed,
and each judge writes his initials and some other identifying
data, such as the serial number of the particular vote head,
on the p~per roll.
When the vote head cover was removed, a microswitch
was released to prevent the casting of votes. After the system
has been verified, the cover is returned to the top position of
the vote head, and the authorization key 641 again inserted into
the proper position to authorize operation of the vote head. This
key must be removed each time the cover is taken on or off of
-52-
the vote head. With the cover in place and the authorization
key turned, actuation of the enable button 642 will provide a
steady illumination of the voting lamp 643 and the on lamp 622
on the front panel of the voter.
At this time the judges check the memories or elec-
tronic registers in the data center by momentarily depressing the
zero check button 123. When this button is released the "zero-
check" lamp 124 will be illuminated to show that there is no vote
total then stored in the vote head memory or in the candidate
count memory. If this lamp is not illuminated, a technician must
be called to be certain that there is no vote count in any memory
prior to the initiation at the voting process.
The voting process itself is very simple. After pre-
senting proper identification to the judges of election the voter
enters the booth and uses only the face (or front panel) of the
vote head. The lamp 622 is on to show the equipment is ready for
his operation. In a general election, the instruction frame is
also the straight-party voting frame. Pushing "new page" button
623 advances the film to the next frame, and the voter makes his
selection b~ pressing the desired ones of the buttons 607 to
select his candidates. Each of his selections is identified by
illumination of the lamp 608 adjacent that one of the buttons 607
pushed by the voter. At this time his votes on each frame are
registered only in the scratch pad or vote head memory 135 in
the data center. The voter advances to the next frame by pushing
the new page button 623, and likewise makes his selections on
that page. If write-in is desired for any particular race,
button 628 is depressed and the lamp ~29 will begin flashing.
The voter pushes the one of the buttons 631-638 adjacent the row
in which he desires- to make the write-in selection, and the
write-in window 605 opens. The voter makes his selection by
writing in the name of the candidate, and then closes the
window. He then goes on to complete the voting process.
-53 -
1078{~i5
After his last frame or ballot ~a~e has been selected. he can
~ush the review ballot button 624 to ~rovide a successive
repetition of all the frames, and review his selections. Any
selection can be simply changed by again pushing the button
under his previous selection, cancelling that choice and
extinguishing the adjacent lamp, and then making a different
selection for the same race. Errors made in the first selection
can thus be simply remedied. After he has determined that all
his selections are indeed correct and he wished to maintain them,
the voter pushes the register votes button 626. At this time
the lamp 625 flashes, while the temporarily stored votes
previously held in the scratch pad memory 135 are passed into
the candidate countv memorY 136, and added`to whatever count
has already been accumulated for the candidates selected. The
voter then leaves the booth and the apparatus is ready for
operation by the next voter.
At the end of the election, the judges again open the
vote head at the top and expose the paper roll for the write-in.
If their initials and other identifying data are in the same
location as prior to the election, there are no write-in selections
to be added. If their initials are not in the same place, there
is at least one write-in selection, and the jud~es a~ain enter
their initials and some other identifyin~ data to indicate the
end of the write-in tabulations. Each write-in vote has three
di~its stamped adjacent the write-in candidate name,
identifyin~ the frame and row for which the write-in selection
was cast.
At this time the cover is removed ~rom the data center,
which intitiates an automatic recording of the vote totals then
stored in the candidate count memory onto the tape 105 in the
cartridge. This takes about three minutes and, when all
the data has been recorded on the tape, the data center
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automatically goes into the display mode as will be indicated
illumination of the lamp 116. It is emphasized that at this
time all the accumulated vote information is on the tape, and
is free from the tampering by any person. This tape can be
locked or otherwise secured for transmission to a central
headquarters as a record, or it can itself be automatically
read into some data processing system for merger with other
votes from other locations. However in general the accumulated
count, which is still present in the candidate count memory 136
at this time, is read out by the judges of election by using the
advance button 115 and the backup button 114 to read out the
totals. This is done by recognizing the successive position
numbers in the display window 106, which identify each successive
frame and row to positively identify the race. To the right of
each position number is the total displayed in the window 107,
so that the judges of election can visually determine the count
and enter this count on a tabulated form. This record provides
another source which can be compared with the record on the tape
105 at a later time if necessary. The paper ballots from
absentees and write-in selections are then added to the total
displayed in the window 107 to determine the election totals at
this particular location.
From the foregoing explanation, it is apparent that
a positive and accurate system of automatic voting has been
p~ovided in which the voter can readily make his selections and
easily verify them. This system is simple in operation by the
voter, and tamper-proof in that only a single conductor pair
is utilized to transmit all the information from each vote
head to its data center. In this way the particular
candidates or party identifications cannot be tampered
with by cutting a single wire or jamming a single actuator.
The system allows for a great deal of flexibility, such as
extending races to successive rows or columns on the front panel
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visible to the voter, to present more candidates in a singlerace. The maximum number of votes (up to 3) can be set for
each race, and this number is increased (up to 9~ when the race
is extended. In addition the judge of election can utilize the
page selection buttons on the j udges panel to present only some
of the different frames to the voter. This allows voters from .
di.fferent prec~ncts to vote on ~iifferent: ~ropositions or
referenda, or allows. the data center to accumulate votes for
the same candidate from different precincts and show the
10 different precinct totals.
Those skilled in the art will appreciate that, to
"configure" the master tape, a hard-wired program different
from the program which regulates the normal voting operation must
be used This is easily accomplished, by removing the read-
only memories from the data center, and replacing them with
ROM'S carrying the configuration program. This configuration
program has three basic differences from the normal program.
First, the configuration program directs the
information punched in on buttons 607 into ECM 137 and, for
20 verification at the vote head, into VHM 135. $econd, when new
page button 623 is pushed, and the new page or frame is displayed,
the confi~uration program reproduces in VHM 135 thé information
currently in ECM 137. Third, when the register votes button
626 is pushed, the configuration program scans ECM 137 to
determine which buttons are valid, and sets up the candidate .
code and stores this code in ~he CCM 136 When all the frames
have been viewed and the corresponding data punched into the
memories 135-137, all this data is read out and recorded on
the tape 105, which is then the master or configuration tape.
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FIGURE 50 depicts another embodiment of the vote
head 600, modified such that the projector apparatus is
replaced by a cathode-ray tube (CRT) 675 for displaying the
information to the voter. The write-in window and the
control switch array 620 are not altered, and there is
additional equipment (not visible in FIG. 50) for use in
conjunction with the CRT for providing the visual display to
the voter. A light pen 680 is shown with a body portion 681
coupled over an extensible cable 682 to the logic circuit
10 671 within the vote head. The body portion 681 may include
an extendable tip 683, spring loaded for retraction when the
body portion 681 is pushed against the face plate of the
CRT, which functions both to shield the sensor within the
light pen from ambient light and to activate the sensing
circuit within the pen arrangement.
The display as shown on the face of the CRT is
that for one race of the entire ballot. As an example a
race for county trustee is depicted, and the instructions
also show the voter may vote for six candidates of the 12
20 displayed. The additional information is provided so the
voter can instantly determine that he has cast four votes,
and two votes remain to be cast. The display shows the
twelve different names of the candidates for the six positions,
and a white square symbol is generated and displayed just to
the right of each candidate identification. When the light
pen is positioned over the white square related to the can-
didate, and then pushed inwardly, a "vote" or selection
circuit is completed. The candidate selected is recognized
in conjunction with the scanning mechanism already described
30 in connection with the logic arrangement. A subse~uent
107t~5
pulse from the data center then instructs the logic circuitry
within the vote head to generate and display a black X
positioned in the box adjacent the candidate, to indicate
which one has been selected. The write-in selection can
also be provided on the face of the CRT as shown, obviating
the need for a write-in select button 628 in the previous
arrangement. From the showing on the face of this display,
it is apparent that with four votes cast and only three
showing on the face plate, one candidate write-in selection
10 has been made in the manner already described, and two votes
remain to be cast.
The general system arrangement for providing a
visual display as shown in FIG. 50 is set out in block
arrangement in FIGURE 51. As there shown the film drive and
proiector apparatus has been replaced by the cathode-ray
tube 675, a character generator 676, and a buffer storage
677 in the vote head 600. In addition, a "race" memory 138
is added to the other memories 135,136 and 137 previously
described in co~nection with the data center 100. The race
memory includes information, in binary form, regarding all
the races and names of the candidates for display sequentially,
in the same manner as each frame of the film was used in
conjunction with the projector apparatus. Although the
remainder of the data center 100 is shown unmodified, those
skilled in the art will appreciate that a tape recording
system with a cassette or other storage means need not be
used, but instead the entire memory including the units 135,
136, 137 and 138 can be a plug-in electronic memory. Such
units can have the information initially "written" or stored
therein, and then plugged directly into an appropriate
socket in the data center 100. At the termination of voting,
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this unit can then be lifted out and plugged into the tabulating
apparatus for accumulating the election results.
Those skilled in the art will understand that the
system depicted in FIGS. 50 and 51 operates in a manner
quite similar to that already described. The information
previously carried on the film for use in the projection
apparatus is now stored in race memory 138 in the data
center 100. Thus when a signal similar to the "advance
film" signal is generated as the voter finishes his selection
10 in one race, this signal causes the logic circuit in the
data center to search for the next race information, transmit
it over the cable 110 to the vote head and~ through logic
circuit 671, store it in the buffer storage circuit 677.
This can be a simple storage arrangement of any suitable
type, and it appears now that 1,024 storage bits will suffice
for display of all information in a single race. ~hen the
particular race information is accumulated in the buffer
storage, the stored signals are used to regulate operation
of the character generator 676 in a well known manner to
20 cause the sweep of the cathode-ray tube 675 to vary in
intensity at the proper location-s across the face of the
tube to produce an information arrangement of the type
depicted generally in FIGURE 50. Each time a candidate is
selected by use of the light pen, or any other suitable
means, the vote signal is transmitted over the cable 110
back to the vote head memory in the data center 100, for
transfer to the candidate count memory 136 as already described.
Those skilled in the art will also appreciate that the
30 sensing element need not be in the light pen assembly 680,
but this pen can have a light projecting unit. The light-
sensitive locations can be provided on the face of the CRT
675 which then registers the signals, in much the same manner
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1(~'78~ti5
that the photocells receive the signals on the face plate
of the projection apparatus originally described.
In the appended claims the term "connected"
means a d-c connection between two components with
virtually zero d-c resistance between those components.
The term "coupled'i indicates there is a functional rela-
tionship between two components, with the possible inter-
position of other elements between the two components
described as "coupled" or "intercoupled."
While only particular embodiments of the invention
have been described and claimed herein, it is apparent
that various modifications and alterations of the invention
may be made. It is therefore the intention in the appended
claims to cover all such modifications and alterations as
may fall within the true spirit and scope of the invention.
What is claimed is:
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