Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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.... 10881664
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:: , y BACI~GROUND OF Tl-IE INVENTION
The invention herein relates to stress sensors
and, in particular, to semiconductor material stress sensors
~: based on the piezoresistive effect.
: ; ,. '
The use of the piezoresistive effect in silicon
as the transduction basis for a stress sensor is well known
and such stress sensors are widely used. Typically, a
` p-type conductivity region is formed in an n-type conductivity
, . . . .
silicon layer by diffusion so that the p-type region serves
as pn junction isolated resistor. Usually, this resistor is
provided in a diaphragm structure over which the stress to be
measured is exerted. By electrically contacting the p-type
region or resistor at two points and measuring the resistance
'! .. ~ . .
J ~ change between these contacts during applications of stress
, due to the piezoresistive effect, the magnitude of the applied
. . ~
:~ 15 stress can be determined.
To protect such surface diffused p-type conductivity
regions serving as resistors for sensing stress through the
piezoresistive effect, i.e. piezoresistors, from contaminants,
etc., they and the immediate surroundings must be covered
. - .
-i 20 by some protective material. Usually, a silicon dioxide
~I layer is provided on the surface of the silicon to cover at
!; least the junction area between the piezoresistor and its
surroundings and, most often, the entire silicon surface.
~ The silicon dioxide-silicon interface occurs, of
`l 25 course, at the silicon surface diffused from which is
.j .
' approximately where the dopant concentration of the p-type
. . I ,
conductivity diffused region, or piezoresistor, is a maximum,
a characteristic of the surface diffusion process. Sillcon
dioxide will, during its formation, take up some kinds of
p-type diffusants, or dopants, and therefore, the maximum
,
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i~88664
dopant concentration occurring at the silicon surface can be
substantially altered from the initiall~ predeposited maximum
~; I concentration. This will reduce the maximum dopant concen~
. j .
tration in the silicon as well as the total amount of dopant
S in the silicon after diffusion. The maximum dopant concentra-
~-j; ; tion value has been found to be strongly related to the stress
~ .;
sensor transduction performance over temperature, that perfor-
. . . .
~- mance being the resistance change versus applied stress as a
- function of temperature over a range of temperatures, that is,
:
the piezoresistive temperature coefficient. The total resistance
value of the piezoresistor at any given temperature is, of
; course, related to the total amount of dopant provided in the
-~ p-type conductivity region.
Thus, both the resistance value of the piezoresistor
.. .. .
at a particular temperature and the resistance values of the
piezoresistor versus stress over a temperature range are
;I subject to substantial changes because of the formation of
a protective silicon dioxide layer. Because the effects of
) forming such a silicon dioxide layer vary substantially from
-j 20 sensor unit to sensor unit, particularly when the sensor units
are from distinct process runs, the piezoresistors resulting
differ from the pie~oresistor intended in an unpredictable
manner, i.e. the resulting piezoresistors are nonuniform or,
~ ~ in other words, have characteristics differing considerably
- ~, 25 from sensor unit to sensor unit. This variability or non-
¦ uniformity presents difficult problems in providing compensation
, schemes to produce a stress sensing system output signal
j which will accurately reflect the external stress exerted
upon the stress sensor.
Piezoresistor nonuniformity is not the only cause
of inaccurate stress sensor performan~e in the above-described
-2-
1088664
',. ~
~ ! ' stress sensor construction. The silicon dioxide itself and
... ;
,~ ~ any metallic interconnection leads to or across the piezo-
resistor or any other materials occurring over the diaphragm
will alter the diaphragm thermal and mechanical response to
~ 5 changing temperatures and to applied stress from that which
,, . it would be without these constraints present on the diaphragm
, surface. This alteration of diaphragm responses, leading ,to
- further errors in determining the external stresses exerted
;: i
on the diaphragm, occur because of the internally generated,
temperature dependen~ stresses and the thermal and mechanical
~: .
,~ hysteresis at the interfaces of the diaphragm and its covering
'~ materials. The extent of these effects will vary considerably
~; ~ from stress sensor unit to stress sensor unit.
~ Internally generated stresses occur because of mis-
,~ ~ , 15 matches in the thermal expansion characteristics of two or ,
more materials present in the diaphragm. Hysteresis occurs
' when two or more of the materials slip with respect to one
j another as the result of stress or temperature change.
'" ' i A typical situation in which these internally
, ~ 20 generated stresses detrimentally occur is that in which the
:, use is made of a silicon nitride layer over the silicon
..., . ,~ . .
~ dioxide or use is made of an organic material over the silicon
... . .
j dioxide to prevent contamination of the silicon dioxide by
:. . ! '
1~ ions. The use of an organic material will typically also
'"' ¦ 25 lead to difficult hysteresis problems.
"'' 1 Any attempt to cure hysteresis problems in a
~' relatively low cost sensing system can only make economic
.. . .
, j sense by be~ng dir,ected toward minimizing the problem rather
' -j than being directed to compensating the hysteresis effects.
This is because compensation requires a memory system to
remember the history of the hysteresis source over the last
:` i .. .
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. .
~:)88664
.' .1 .
cycle of the hysteresis loop. The problem is compounded
by the variability in hysteresis loops from sensor to sensor.
, Thus, adding significantly to hysteresis problem is to be
J strongly avoided. Increasing the variability temperature
coefficient because of temperature dependent, internally
generatea stresses is also clearly unaesirable because of
the difficulties introduced in providing a temperature com-
pensation scheme.
".
However, use of such additional covering materials
- 10 to prevent ion contamination of the silicon dioxide covering
layer is often attempted because of substantial changes which
can occur in piezoresistor characteristics over time resulting
from such ion contamination. Due to (i) mobile ions which
are contaminants in the silicon dioxide and which can reach
15 the silicon dioxide-silicon interface, and (ii) fixed ionic
charges also contaminating the silicon dioxide which are
~-~ able to induce charges at that silicon dioxide-silicon
¦ interface, the diffused resistors which are to be protected
are also rendered electrically unstable over time to a
20 greater or lesser de~ree by the silicon dioxide layer provided.
This time instability results because the charges
~¦ appearing at the silicon dioxide-silicon interface convert
-i portions of the silicon layer to a p-type conductivity even
though these portions of the silicon layer were in the initially
` ¦ 25 intended n-type conductivity silicon regions and outside the
`` 1 initially intended p-type conductivity region. These additions
,. ...
; ~ to the intended p-type region enlarge that region, and so
~ reduce the resista~ce value intended for the diffused p-type
.. i .
; -1 region, and, further, these additions add area to the pn
junction, i.e. semiconductor junction, which occurs between
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10~8664
adjacent regions of opposite conductivity types. The aaded
p-type region portions tend to reduce thb resistance initially
intended to occur in the p-type region by enlargement thereof,
as already mentioned, and to also reduce intended resistance
by the increasing of the semiconductor junction area. The
increased junction area leads to increases in the junction
leakage current which has the effect of reducing the intended
resistance.
The charge occurring at the silicon dioxide-silicon
.i
interface in the above-described sensor construction is a
source of electrical-instability over time because the
charge changes in both amount and location thereby altering
the p-type conductivity region, or piezoresistor formed, in
~~ I the silicon layer. These interface charges are highly variable
- 1 15 in amount present initially and over time in depending strongly
on operating environment in use and on the details of the
¦ processing in any given sensor fabrication sequence. The
J mobile charges are also vary in location in the silicon dioxide~
j and so in effect over time, depending on the voltages and
~,l 20 temperatures experienced in use.
.
î Signals indicating applied external stress provided
` ~ by the piezoresistors in semiconductor material stress sensors
are almost always supplied to signal processing circuitry for
I modification. At the very least, stress sensor output in
-~ 25 response to applied stress will always shift with temperature
; ~ for a silicon piezoresistor, i.e. there is a temperature
coefficient associated with every piezoresistor, as is indi-
cated in Figure l. There, resistance change, ~R, versus
l stress, S, is plotted for three different absolute temperatures,
: .
30 Tl to T3, and for two different maximum dopant concentrations,
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10~?866~
MCl and MC2. The total number of acceptor atoms, Np, is
held constant.
This temperature performance of the piezoresistors
must always be compensated by signal processing circuitry if
~: !
the sensing system is to provide an accurate indication of
. . .
the external stress applied thereto. If the characteristics
shown in ~igure 1 are (i) uniform from unit to unit, (ii)
., .
constant over time, and (iii) independent of the history of
applied heat and stress, then signal processing circuitry
can be designed to jast cancel out the temperature dependence
of the piezoresistors so that output signals from the signal
processing are always an accurate indication of the stress
:
exerted on the stress sensor.
However, as discussed in the preceding, the addi-
~: . , .
tion of a silicon dioxide layer over the silicon surface
containing surface diffused piezoresistors leads to non-~niform
piezoresistors, to degraded thermal and mechanical responses
of piezoresistors and to instability over time of the piezo-
resistor characteristics. In many instances, it is entirely
~i 20 impractical to attempt to compensate for hysteresis at all.
If the temperature performance is not the same from sensor
., -, .
;~ ; unit to sensor unit because of nonuniformities in the piezo-
~ , , .
` ~ resistor construction, then the compensation scheme must be
~. ~
-l adjusted for each unit. Similar provisions must be made fcr
nonuniform resistance values of the piezoresistors from unit
to unit. Such adjustments are a time consuming and expensive
operation. And, if the temperature performance and resistance
values change over time in use, the compensation scheme must
also be adjusted over time, an often prohibitive requirement
for many potential uses.
.,."'' ; . - ~
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lQ~8664
..... .
- . SUMMARY OF THE INVENTION
. In accordance with one aspect of the present
invention there is provîded a method for providlng semiconductor
-. material stress sensor having structural portions including
substantially a diaphragm and a constraint for constraining
said diaphragm at peripheral portions thereof, said method
comprising:
.-
providing a layer of semiconductor material initially of
. a first conductivity type; and
.~ 10 implanting ions of a first kind in said layer through a
first surface portion thereof to form, after annealing, a
~`- first region of a second conductivity type located at least in
. . .
.: part in a portion of said layer which will be included in
said diaphragm to serve as a piezoresistor, said part of said
first region as located being confined to interior portions of
"
!;.. ' said layer with respect to said first surface portion such
1. that a first semiconductor junction separates said part of
: said first region from remaining portions of said layer with
~ said part of said first region having therein what, before
:~ 20 annealing, is a region of maximum concentration of said first
.' kind ions spaced apart from at least a first portion of said
: . .
;: first semiconductor junction where said first portion of said
:-:
. : first semiconductor junction occurs between said first surface
.,.~ .
. portion and said region of maximum first kind ion concentration.
, In accordance with another aspect of the present
.. ...
';: invention there is provided a semiconductor material stress
:,
.'; sensor having structural portions including substantially a
diaphragm and a constraint for constraining said diaphragm
, at peripheral portions thereof, said stress sensor comprising:
,~.
a layer of semiconductor material of a first conductivity
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,;., 1~88166~
type except in selected regions thereof including a first
:,
- selected region located at least in part in said diaphragm to
serve as a piezoresistor, said first selected region being of
a second conductivity type due substantially to a first dopant
therein where said first selected region has therein a region
of maximum concentration of said first dopant wherein a
concentration of said first dopant occurs exceeding by at least
a factor five that concentration occurring at a first boundary
portion of a boundary defining said first selected region,
,` 10 said first boundary portion occurring at that part of said
boundary having on one side thereof said maximum first dopant
concentration region and having directly opposed on an opposite
:
side thereof a first surface portion of said layer located in
, said diaphragm.
~ A semiconductor material stress sensor is provided
,` wherein a semiconductor material layer is of a first conductiv-
ity type except in selected regions thereof including a first
; selected region provided for sensing applied stress with this
`, first selected region being of a second conductivity type.
The layer is partly in a diaphragm portion of the sensor and
to some degree in a constraint portion of the sensor. The
first region is at least partly in the diaphragm and has its
second conductivity type due to a first dopant therein which
first dopant has a region of maximum concentration in the
diaphragm portion of the first region that is spaced apart from
the layer surfaces. The first region may also be in the
constraint portion of the layer. A second region of having
the first conductivity type may be provided in the space
between the region of maximum first dopant concentration and
the layer surface portion from which it is spaced apart in the
, diaphragm.
~ .
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- ~B86G4
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The semiconductor layer may be an epitaxial layer
provided on a semiconductor substrate, the substrate having
a recess therein to provide the diaphragm and constraint
structure. A material with a closely matched thermal
coefficient of expansion such as silicon or low thermal
expansion glass may also be bonded to the substrate to provide
support or a means of communication with the stress sensor or
to enclose a fixed reference pressure against one side of
,. .
, the diaphragm.
. 10 Such a semiconductor material stress sensor can be
. provided by implanting the first region into the semiconductor
,~ .
~ layer followed by providing the second region in the semi-
.
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8664
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conductor layer sucl that the second region does not reach
the region of maximum first dopant concentration in the
first region. This providing of the second region may be
conveniently done by ion implantation. By having the second
region located such as to allow a portion of the first
region to intersect a semiconductor layer surface in the
constraint, electrical contact may be conveniently made to
the first region.
Providing the semiconductor layer itself as an
epitaxial layer on a semiconductor substrate allows the
. .
:;; substrate to be etched to provide both the diaphragm and l
... .
the constraint. The epitaxial layer can be advantageously
provided in a first strata of relatively high resistivity
followed by a second strata of lower resistivity.
- BRIEF DESCRIPTION OF THE DRAWINGS
E~igure 1 shows a plot of the performance character-
~ istic of a piezoresistor formed in a silicon layer by a
; ~I dopant,
j Figure 2 shows two partial views of a semiconductor
, , .
material stress sensor,
I ~igure 3 shows the results of a series of process
- , steps used to construct the semiconductor material stress
sensor shown in Figure 2, and
Figure 4 shows a dopant atom profile for a semi-
, ' 25 conductor material stress sensor constructed by the process
associated with Figure 3.
~ DESCRIPTION OF THE PREFERRED EMBODIMENTS
; The piezoresistive temperature coefficient of a
junction isolated piezoresistor in silicon has been found
to be strongly related to the maxim~m dopant concentration
of the dopant used to form the piezoresistor in the silicon.
.' I ' , .
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8664
.. .~
The resistance value of the piezoresistor, on the other
hand, is strongly related to the total number of dopant
. . .
j atoms which are present in the junction isolated piezo-
`~ ~ resistor. This allows some independent control of the
values of the piezoresistive temperature coefficient and
of the total resistance by independently varying the maxi-
mum concentration of and the total number of dopant atoms.
` The piezoresistive temperature coefficient relationship
to the maximum dopant concentration is reflected in
. .
Figure 1 by the differently sloped cur~es for different
.... :: .
maximum dopant concentrations at the same temperature.
` As discussed above, if the maximum dopant concen-
; tration occurs at a silicon dioxide-silicon interface, then
`~ I the intended maximum dopant concentration and intended
:. 1
:'; j t 15 total number of dopant atoms present can both be strongly
. ~ ,, . ~
:- ~ affected by the interface conditions. The interface con-
..... .
ditions are very process dependent and will not be uniform
,r,~ from stress sensor unit to stress sensor unit and, further,
~ the interface conditions in such a stress sensor unit will
?l
1 20 change over time. As previously indicated, this leads to
~h . . .,
i the necessity of making adjustments in the signal processing
, circuitry receiving the stress sensor output signals if
accurate ~ompensation over temperature and over time is to
;~ be maintained.
~ 25 Thus, removal of the piezoresistor or of its region
-~ i of maximum concentration from the immediate vicinity of a
. :,
- j silicon dioxide-silicon interface is quite desirable in the
~ ~ structural design for a stress sensor. Of course, the piezo-
;,` ~ resistor must still be rather close to a silicon surface in
~ 30 a diaphragm to experience a substantial strain in response to
... .
"
,. .
: ~
:
101~8664
~ an external stress exerted on the diaphragm. A ~elatively
. : . i
small separation with respect to a silicon dioxide-silicon
interface is all that is required to avoid much of the
previously set out difficulty.
. . I
A first possibility is to diffuse a region of a
conductivity type opposite that of the piezoresistor region
; conductivity type right over much of the piezoresistor
' region to achieve a separation between the piezoresistor
and the interface, i.e. a pinch resistor situation. The
diffusion would be directed over the sensing portions of the
.. ; . .
~' piezoresistor at least if not also over any resistive leadout
.; - :
portions present. This possibility has serious difficulties,
. ~. .
, however, because any surface diffusion always results in
. ~ ,
~; , having a maximum diffusant or dopant concentration occur at
..... .
- ~ 15 the surface through which the diffusion occurs. That is,
both the piezoresistor diffusion and the subsequent covering
` l diffusion thereo~er will have a peak concentration approxi-
, I mately at the surface of the semiconductor layer through
which the diffusions occur.
,- I .
4 20 Diffusion control in production, however, is not
such that the second diffusion could be well controlled in
depth with respect to the surface diffused from and so not
.~.~. i
'~ well controlled in depth with respect to the dopant profile
.j . ;
~; j of the dopant used in the first diffusion for forming the
piezoresistor region. Since the piezoresistor region dopant
has a peak concentration at the surface diffused from and
. ;
has a profile changing sharply with depth below this surface,
small changes in the depth of the second diffusion intended
i '
to cover the piezoresistor region results in substantial
differences in both the total number of piezoresistor dopant
. , .
--1 0--
:-
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~ 38664
atoms and in the resulting maximum concentration of these
-~ atoms. The inevitability of such changes due to insufficient
depth control again means an undesirable, but substantial,
variability in electrical characteristics from sensor unit
to sensor unit. This situation is reflected in the well-
~ known variability in resistance values of pinch resistors
: - from one process run to another and even between widely
~ separated pinch resistors on the same chip.
- A conventional pinch resistor is also quite
voltage dependent because of the processing just described
,? since the region in the silicon serving as a resistor has a
relatively low dopant concentration. This low concentration
occurs because the high dopant concentration location in the
first diffusion is effectively cancelled out by the second
~ , ..; .
~ 15 diffusion. The low dopant concentration in the pinch resistor
..... .
region of the silicon allows substantial depletion regions,
~-1 which are quite voltage dependent, to develop in the pinch
:,.~,., 1
~ ~ resistor region which effectively increases the resistance
!':`. 1 value of the pinch resistor.
:. .,~
~ 20 To attempt to avoid the problems arising in a
..
process having a second diffusion over a piezoresistor
diffusion, as just described, the piezoresistor might be
.
` ~j diffused into the silicon layer followed by growing an
:1
~"~ -~ epitaxial layer thereover. This provides for separation of
~ ... ..
; ,25 the piezoresistor from the silicon structure surface in much
: ,the same way a buried layer is formed in the construction of
a bipolar transistor. Again, however, because the maximum
dopant concentration of the diffused piezoresistor occurs at
the surface diffused from, difficultiea arise.
3~ To grow an epitaxial layer, one of the first steps
usually required is to etch the silicon layer surface to pro-
--11--
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i ~0~8664
mote good crystalline growth the~eon. This etching would
have a substantial and variable effect on a diffused piezo-
resistor maximum dopant concentration, oceurring at the
surface to be grown upon, because of inability to accurately
control the depth of the etch. This variable etching depth
leads to unrepeatable maximum dopant concentrations in the
resulting piezoresistors from one stress sensor unit to
another and, in addition, strongly affects the total
resistance of these piezoresistors because the total number
of dopant atoms remaining present would vary with the depth
of the etch. This is quite analogous to being ~nable to
control the depth of the diffusion in the above-described
` :
double diffusion process. Further, in an epitaxial growth
process, there is always some out-diffusion from the silicon
layer into the grown epitaxial layer during ltS growth.
Thus, the providing a doped region for a piezo-
resistor in a silicon layer having its maximum dopant con-
centration well below the layer surface is necessary to
obtain uniform stress sensor performance, both as to the
, l 20 piezoresistive temperature coefficient value and as to the
total resistance value. This is also required to further
' sensor stability over the life of the unit. Such a step
allows providing uniform and stable semiconductor junction
j isolated resistors in silicon or uniform and stable piezo-
l, 25 resistors in a stress sensor silicon diaphragm.
,
' Ion implantation of the piezoresistor dopant pro-
vides very good and very repeata~le results for both the
depth, or location, of the region of maximum dopant concen-
tration in the piezoresistor doped region and the total
number of dopant atoms provided in the doped piezoresistor
"' ' ' .
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~8~3664
,.:`- ,
region. This is true because :ion implantation permits
' precisely controlled placement of the maximum dopant con-
; , centration at a selected depth below the silicon layer
surface with ordinary ion implantation production equipment
i ' .!
' 5 in production conditions, within reasonable limits, of course.
And, ion implantation of the piezoresistor dopant allows
considerable freedom in setting both the maximum dopant
concentration and the total number of dopant atoms provided
relatively independently of one another. The result is that
10 the temperature coefficient and the total resistance of the
piezoresistor, i.e. the doped piezoresistor region sheet
resistance, can be determined relatively independently of
one another.
!'.',~, , . Once the need is met for placing the maximum dopant
15 concentration region of the piezoresistor sufficiently far
into the silicon layer to avoid later processing step problems,
there are two possibilities in further constructing the stress
rr -~ sensor. The silicon layer can be either (i) covered or
~`~ ! altered near the surface to further protect the piezoresistor,
,~ , 20 or tii) any further silicon layer surface treatment can be
~` ~ omitted. The latter instance is possible, if there are no
sources of significant contamination in use or if the silicon
surface can be protected in use from contamination. The
benefit here is that any oxidation steps required in providing
1 .
25 electrical contacts can be performed without taking up
. significantly any of the piezoresistor region dopant.
However, stress sensor units will be exposed to con-
tamination during use in many applications. Then surface treat-
ment of the silicon layer is required to protect the piezoresis-
30 tors. Some of the piezoresistor protection methods described above,
:, . .
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.. . ...
664
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which were prone to problems when used with diffused
'. , piezoresistors, can be used with considerably fewer problems
now that the region of maximum dopant concentration of the
, piezoresistor is located well below the silicon layer surface.
- 5 For instance for some applications, a protective
silicon dioxide layer can now be provided on the surface to
.:, . , ~" protect the piezoresistor which will lead to silicon dioxide-
silicon interface problems less severe than those described
above. This is because the providing of the silicon dioxide
layer will have relatively little effect upon the maximum
' dopant concentration in the piezoresistor which is spaced
~- apart from the interface substantially and so upon the total
number of dopant atoms is the piezoresistor. ~owever, the
` ` oxide on the silicon layer would still alter the mechanical
` ~ -. 15 response of the silicon layer to stress exerted thereon
relative to the response with no oxide layer present thus
j limiting stress sensor accuracy. Also, the silicon dioxide-
~ ~ silicon interface conditions still affect to some extent
; ! the total number of dopant atoms and so limit the accuracy
.~ - .
of the piezoresistor to some extent.
Other protection possibilities, for a region of
~¦ maximum dopant concentration located sufficiently deep in
- the piezoresistor, would include (i) the diffusion of a
region of an opposite conductivity type to that of the
i 25 piezoresistor region over and into the piezoresistor region,
-1 or (ii) the growth of an epitaxial layer of this opposite
conductivity type over the piezoresistor region. The
uncertainties of depth in diffusing a covering region or of
` ~ depth in etching for epitaxial growth or the uncertainties
- ¦ 30 of out diffusion during epitaxial growth will cause much
less variation in the temperature coefficient or in the total
. , .
-1 4-
.,
. ..
~! ~
~)8866~
¦ resistance value of a piezpresistor having a suffi,ciently
,~ deep region of maximum dopant concentra'tion, i.e. a maxi-
mum dopant concentration region spaced apart from the
l semiconductor junction formed by the diffused region or
,~' , 5 the epitaxial layer and the piezoresistor region.
,,:, Nevertheless, the lack of control of the diffusion
or epitaxial growth process steps will quite often cause
some interaction with the piezoresistor region approaching
,i~., .
~, the region of maximum dopant concentration therein and so
will limit the uniformity to some extent of semiconductor
stress sensor units. The extent of such limiting will become
, progressively greater as the region of maximum dopant con-
centration in the piezoresistor is closer to the regions
`. 1
, I substantially affected by either a diffusion or an epitaxial
,';'~, j 15 growth process.
The difficulty in getting the region of maximum
,~,,, concentration the piezoresistor deep enough into the silicon
~ ., . ~ ,
,- layer, and thereafter protecting it by one of the foregoing
protective measures, will, as stated, affect the uniformity
,,, 20 and stability of the piezoresistors to some degree. This
: 'i degree will be significant enough to make stress sensor units
resulting from these operations unsatisfactory for some
' l stress sensor applications requiring a substantial degree
:
of accuracy and uniformity.
¦ 25 Use of a more controlled surface treatment for
, '1 protecting resistors initially formed by ion implantation
',,~, ~ in a silicon layer is required to obtain satisfactory
. .... ~
~,,' , piezoresistors for the stress sensors to be used in these
~, i applications. That treatment can be achieved by use of
,,~ , 30 a second ion implantation step involving the implanting
.. ~ ;
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1~8~664
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of a region of an opposite conductivity type ~rom that of
the doped piezoresistor region. The semiconductor junction
isolated resistors ~ormed in silicon as the result of a
second ion implantation step have been found to be very
uniform and very stable and so are excellent piezoresistors.
i These resistors are relatively voltage independent also.
Again, ion implantation allows for very close
., .
control of the location of the dopant atoms below the sili-
con layer surface. This results in the protective region
~ . ,
10 formed just below the surface being confined very closely
in extent so as to not approach any portion of the doped
^ piezoresistor region which has a substantial dopant concen-
tration, i.e. to particularly not approach that region of
the piezoresistor where the maximum dopant concentration is
l 15 located.
¦ Further, the greater separation between the region
of maximum dopant concentration in the piezoresistor and
the regions of substantial dopant concentration in the pro-
tective region results in very good semiconductor junction
, 20 breakdown values for the pn junction, or semiconductor
junction, separating the second implanted region from the
remaining doped piezoresistor region. Also, the relatively
` 1 low tempe ature cycle required for annealing the silicon
layer to repair the silicon lattice damage in the implanted
25 regions therein due to the implantation steps causes a
j relatively small redistribution of the dopant atoms in both
..,
the doped piezoresistive region and the protective region.
. J Where the silicon layer is provided as an epitaxial layer on
a semiconductor substrate, there will also be a relatively
small redistribution of dopant atoms between the silicon layer
; and the substrate because of this low temperature.
. , .
-16-
` ~813~i64
.,, I
I A semiconductor material stress sensor having
,; ~ ion implanted piezoresistors is shown in Figure 2. Figure
t.. - I
;:' 2A shows a top view of the stress sensor which, in the
~ ! .
,~,', I sensor construction shown in Figure 2, is the top of a
. ,.i. ;
,: 5 silicon layer, ~, in which the piezoresistors are formed.
One portion of this silicon layer, 10, is over and part of
-, that portion of the stress sensor serving as a constraint
:,
:'~,' to support the sensor diaphragm portion. Another silicon
layer portion, 11, which is over and part of the sensor
diaphragm portion, the dashed line, 12, indicating approxi-
~`' mately the boundary between these two portions of the stress
~` sensor, the constraint and the diaphragm.
Two piezoresistors, 13 and 14, are provided in the
. . ~
-, , silicon layer such that each has a portion in both diaphragm
- ,
- 15 layer portion 11 and constraint layer portion 10. Neither
intersects the silicon layer surface except near the contacts,
.. .i
'~ 15, so both are shown by a dashed line outline. The silicon
~ layer is of n-type conductivity silicon where,shown except
- I where the piezoresistors 13 and 14 are formed. These piezo-
: ;' 20 resistors are of p-type conductivity silicon material.
' Typically, two piezoresistors are used together at one
~' j stress sensing location on the diaphragm to provide signals
,,' , to subsequent signal processing circuitry having a double
~'" ~ signal strength and usual resistance value temperature
,' , 25 coefficient compensation. Piezoresistor 13 senses radial
stress in the diaphragm layer portion 11 as can be seen by
~ , noting that most of the resistance will occur in a thin arms
-~ ' along radii drawn from the center of the diaphragm. Piezo-
. . 3
', resistor 14, on the other hand, will sense tangential stress
! . :
'''' , 30 in the diaphragm layer portion.
.. -
.;
:.':"
I -17-
.,
, ~.
.
1 !
: -- ?
88664
. I
.
-Figure 2s is a cross-sectional view of Figure 2A.
The cross section is taken along section line 2s-2B.
The silicon layer 9 can be better understood from
the view in Figure 2B where the total or complete silicon
layer is shown designated therein by a bracket and the
numeral 9. That portion of silicon layer 9 to the left of
the constraint-diaphragm juncture, or boundary 12, is the
;~ constraint layer portion 10 of Figure 2A. That layer por-
tion to the right of boundary 12 in Figure 2B is the diaphragm
layer portion 11 of Figure 2A.
; Silicon layer 9 is shown with a dashed line, 16,
which is used to mark approximately a boundary between a
strata, 17, of layer 9 having a higher conductivity and
. .
another strata, 18, of layer 9 having a lower conductivity.
The higher conductivity strata 17 of layer 9 is provided to
: . ~
improve results of the electrolytic etching process used in
,
providing a recess in the substrate, 19, upon which layer 9
is formed. The recess occurs to the right of boundary 12
in Figure 2B to provide the diaphragm portion of the stress
sensor.
Piezoresistor 13 is ~hown with dashed line, 20,
:-., , . , ',
drawn therein to indicate approximately the region of maximum
.~;. .
` dopant concentration for the dopant implanted to form the
piezoresistor. A surface protection region, 21, is shown
over piezoresistor 13 in the diaphragm layer portion 11 but
not over all of piezoresistor 13 where it extends into the
~; ~constraint layer portion 10. Protective region 21 could be
formed by diffusion, epitaxial growth or ion implantation
. ~methods as indicated above. Again, the most repeatable and
..
~F 30 accurate stress sensor unit results when region 21 is provided
~: i
~, ¦by ion implantation.
.. . .
~ ~ -18-
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. . !
1~8~3G64
,,. 1
Electrical contact 15 is shown making ohmic contact
to piezoresistor 13 through electrically insulating silicon
dioxide ring, 22. As mentioned, the silicon dioxide 22
could be extended over silicon layer surface, 23, to some
thickness to protect piezoresistor 13 from elements that would
~ . .
otherwise come into contact with surface 23. of course,
~-~ mechanical performance of the diaphragm is constrained by
such a covering of silicon dioxide, thinner layers of oxide
providing less constraint. The constraint ma~ have a negli-
gible effect where the oxide is quite thin and where other
; errors such as due to mechanical stress in the mounting of
the substrate are relatively large.
Turning now to Figure 3, there is depicted the
. .
results of process steps performed to provide the structure
shown in Figure 2. The initial process steps are shown
wherein piezoresistor region 13 of Figure 2 is provided by
., ~, , I .
r~, 'I ion implantation followed by showing the further process
steps to provide region 21 of Figure 2 as an implanted region,
~ although other methods of providing region 21, such as
; ~ 20 diffusion or epitaxial growth, could be used as discussed
,. . .
1 above. Also, clearly after the implantation of piezoresistors,
,` ' a silicon oxide layer could be provided on the silicon layer
surface 23 over region 21 or over the piezoresistor region
1 13 wlthout region 21 being present.
Figure 3A shows the result of an epitaxial growth
of an n-type conductivity layer 30 upon a p~ substrate, 31.
.. ,
: ~ Substrate 31 has a resistivity of 0.01 Q-cm approximately.
Layer 30 is grown such that the first strata of the layer,
32, has a resistivity of around 10 to 20 Q-cm while the final
¦ 30 strata of a layer, 33, has a resistivity of 0.50 Q-cm, the
- --19--
, , .
1~88166
: i
two strata being approximately separated by a line designated
34. The final strata 33 is grown just as the initial strata,
that is, both by conventional epitaxial growth techniques,
~ the concentration of the dopant during growth being increased
I S during the final portion of the epitaxial layer growth.
~ayer 30 has an approximate total thickness of 30 ~m with
layer 32 being approximately 20 ~m.
As indicated in the preceding, strata 33 aids in
the etching step performed later in the process for the
formation of the diaphragm portion of the semiconductor
material stress sensor. Strata 33 will approximate to some
degree an equipotential layer to aid in the electrolytic
_ etching occurring in this later step. Also, strata 33 pro-
vides a poor semiconductor junction injection efficiency
::. . . .
`~ , 15 for the semiconductor junctions resulting from the provision
j of piezoresistors while the strata has a high recombination
rate to thereby prevent holes from being etched in the epitaxial
il layer during the etching process near the piezoresistors.
- I Thereafter, thermal oxide is grown in a manner well
known in the art on the exposed surface, 35, of the epitaxial
layer. The result is shown in Figure 3B where silicon dioxide
l has been grown thermally to approximately 12,OOOA to form a
masking layer, 36.
Conventional photoresist techniques are used to
cut a pattern in silicon dioxide layer 36 for forming the
' piezoresistor regions in the diaphragm layer portion and the
: ' piezoresistor resistive lead-outs to the constraint layer
portion. Following this, thermal oxide of approximately
600 A is regrown on surface 35, the layer designated by
numeral 37, to serve as a scattering oxide. This scattering
oxide serves as an amorphous coating over the areas selected
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.. ! I
~88~i64
... l - .
~- for ion implantation, that is the piezor~sistor and resistive
lead-out regions, to cause some scattering of the impinging ions
- so they do not happen to line up with the silicon lattice in
` layer 30 and go much deeper than expected for a given average ion
energy. Results of these steps are shown in Figure 3C.
~t this point in the process, a deep boron implant
.
is made using boron ions having an average energy of approxi-
mately 300 kev. The ion beam is adjusted such that the dose
is 5.7-1014 ions/cm2. The result is a maximum boron concen-
tration of approximately 1019 atoms/cm3 and a sheet resistivity
~- of approximately 130 Q/a
The result of these steps is shown in Figure 3D
~.;.
~ where a p-type region, 38, has been formed below surface 35
. . , ~ .
of the silicon layer 30 and within strata 33 of that layer.
A second dashed line, 39, is shown within p-type conductivity
. ~ region 38 to indicate that an approximate location of the
region of maximum boron concentration. This location is
typically 0.7 to 0.9 ~m below surface 35 while the pn junction,
,.. :- ; .
j i.e. the semiconductor junction, defining the deepest portions of
p-type conductivity region 38 below surface 35 will be located
.. ~.: ,.
- approximately 1.3 ~m below surface 35.
` 1 Using these values, the final piezoresistors which
l will result from p-type conductivity region 38 will have
:
- dimensions so as to have about a 5,000 Q resistance value.
This resistance value provides a reasonable compromise between
-~ ~ (i) having a sufficient output signal when a given amount of
stress is exerted on the diaphragm portion of the sensor in
, face of both the amount of noise unavoidably present and the
errors introduced by the signal processing circuit while
keeping the required signal processing circuit gain reasonably
small, and (ii) having the current necessary to energize the
; .
. I -21-
!
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3664
, i
stress sensor piezoresistors kept sufficiently low so differen-
`~ I tial heating due to current flow in the stress sensor will notcause erroneous sensor output signals. Piezoresistors having
~ I this resistance value can be of convenient dimensions in
;; 5 surface 35 given the resistivity values for p-type conductivity
. .
region 38 set out above. The resulti~g piezoresistor will be
neither too long and so difficult to locate at optimum stress
sensing positions in the diaphragm nor too narrow so as to
-~ create problems involving excessive resistance value tolerances
.: io due to variations in providing cuts in the mask in layer 36.
: .
- ¦ After the boron implantation, the silicon dioxide
."
mask 36 is stripped away from the silicon layer surface 35
by the use of conventional photoresist techniques except where
.. 1
electrical contacts for the piezoresistors are desired. Thus,
, ~ 15 in Figure 3E, a small portion of the oxide scattering layer 37.. , ~ ~ .
~ ~ remains on surface 35 where protected by a photoresist layer
. .
.i;i, - portion, 40. The remaining oxide will serve as a marker for
. .
~ locating electrical contacts later while photoresist layer
:~
; portion 40 will serve as an implantation mask for the remaining
ion implantation step. Of course, if less precise and stable
..... . .
; stress sensors are satisfactory, the following step might be
a diffusion or epitaxial growth step rather than a second ion
~'
' ~ implantation step.
:~ The second ion implantation step involves impinging
.. ,~i
phosphorous ions ùpon the structure shown in Figure 3E to
provide a shallow phosphorous implanted region over the boron
:' 1 ,
~'I implanted region except at locations where electrical contacts
i are desired. The phosphorous ion implantation step takes
' place using phosphorous ions having an average energy of
.:
~ 30 approximately 50 kev while impinging in an ion beam providing
;~ ' a dose of 1013 ion/cm?. The maximum phosphorous atom
. . . . .
~ -22- - -
, 1 -
~., ,
:; - 'I'
~}~
: `
~8~664
.`. I .,
concentration reached is approximately ~.0 1017 atoms/cm3.
The region of maximum phosphorous concentration is located
at approximately 0.1 ~m or less below surface 35. The
result is shown in Figure 3F where the photoresist mask has
been removed after the second ion implantation step.
However, the scattering oxide 37 is still retained to aid
~- in finding the locations for electrical contacts provided
, ,~
3 in later steps.
The result of this ion implantation step is the
formation of an n-type conductivity region, 41, which forms
. ~...
. .
~ or will form a portion of the pn junction or semiconductor
; junction which separates the remainder of the p-type conductivity
:~'', ' .
~ region 38, region 38', from the other portions of silicon
;~ ~ layer 30. Prior to annealing, the implanted region may not be
deep enough to establish the junction defining the upper
~ boundary of region 38' but rather the dopant in strata 33
; ~ determines this boundary. This portion of the semiconductor
junction is located between region 38' and surface 35 at
approximately just greater than 0.1 ~m below surface 35.
, 20 Thus, the semiconductor junction due,or which will be due
after annealing,to the formation of region 41 is a substantial
" ~ . , .
distance from the maximum boron concentration location 39 in
p-type conductivity region 38' so that small differences in
~; ~' the depth of this added pn junction have little effect on the
electrical and temperature characteristics of p-type con-
.,:. :~
ductivity region 38'. And, of course, the variations in
depth of the added pn junction will be relatively quite small
because of the excellent control available in ion implantation
process steps.
Also, the maximum dopant-concentrations in each of
the regions 41 and 38' are widely separated so that the pn
,
,. j .
.
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~ 8664
I
' 1
I ' junction therebetween has a satisfactory breakdown voltage.
In aid of this goal, the phosphorous concentration in region
41 is kept as small as possible, i.e. substantially less
~ than the maximum boron concentration, being just enough to
: 5 reconvert the silicon layer at the surface of silicon layer
30 to n-type conductivity material and to assure that the
depletion region in operation in region 41 does not reach
surface 35.
. . ~
, Upon removing the photoresist implantation mask,
., ~ .
io the structure must go through an annealing cycle to repair
: .~. . .
silicon lattice damage due to the ion implantation steps.
.~ ,
~'This annealing cycle performed at 950c for approximately
-_ 10 minutes in dry nitrogen followed by substituting wet
., j
oxygen for the dry nitrogen for approximately 20 minutes,
the use of wet oxygen resulting in the thermal growth of a
~ , silicon dioxide layer. This oxide layer is not allowed to
; ~ form on the surface 35 immediately in the annealing cycle
because healing of the lattice defects might be impeded
1 thereby. Introducing the wet oxygen leads to growing approxi-
0
mately 2,000 A thick silicon dioxide layer, 42, on surface
35 and over scattering oxide portion 37.
` l The annealing-oxidation cycle is done at the
relatively low temperature of 950C to minimize redistribution
~ of the dopants in the implanted regions, region 41 and region
'-! 25 38', which alters the structure~of these regions and so the
:-' :,j
' structure of the stress sensor. This also prevents any
i
j substantial redistribution of the dopants between the n-type
conductivity epitaxial layer 30 and the p -type conductivity
. . .
'~ substrate 31 which is desirable for achieving a sharp etching
;`~ 30 cutoff in the diaphragm etching step yet to come. The result
.. ~
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;.... ~ .
:
~ .:
j ~.
3664
.
of these steps is shown in Figure 3G. The region of maximum
boron concentration remains at about 0.7 to 0.9 ~m while the
~. . . .
region of maximum phosphorous concentration occurs near or at
surface 35. The semiconductor junction between regions 38'
..... , . .
- 5 and 41 is now located at approximately 0.2 ~m below surface 35.
`. A greater thickness of silicon dioxide is required,
:
; . O
however, beyond the 2,000 A provided in the annealing-
oxidation cycle. Continuing to thermally grow such oxide,
even at the relatively low temperature of the annealing-
~ 10 oxidation cycle, risks redistributing the dopants in the
'-P ~ manner described to be avoided in the foregoing paragraph.
;: Therefore, the added silicon dioxide is provided by pyrolytic
deposition of silicon dioxide at 300C until the total silicon
O
:; ~ dioxide thickness reaches approximately 5,000 A. For
. ;,; j .
` ~- ' 15 convenience, the entire resulting silicon dioxide layer from
both steps is included in the siliCon dioxide layer 42 shown
` 1 in Figure 3G.
Next, electrical contact cuts are provided in
~`1 silicon dioxide layer 42 by the use of conventional photo-
¦ 20 resist techniques to thereby provide access to the piezo-
.- ' resistors. The result is shown in Figure 3H. The cut or opening
in silicon dioxide layer 42 is labeled 43 and provides access
to p-type conductivity region 38'.
Ohmic electrical contacts are now provided for
contacting the piezoresistors, that is in Figure 3H for con-
tacting p-type conductivity region 38'. If a corrosive
~; ¦ atmosphere is to be in contact with the stress sensor unit,
a special metallization structure may be required to resist
deterioration in such atmospheres, possibly using a combina-
! 30 tion of metals. Unless such extreme circumstances are to be
; encountered, a typical metallization process such as that
;
.
.~, j ' . .
... I
-25-
~ ,... .
., lr
! I
':'' I I
~8~6~4
... .. .
conventionally used in providing the usual kinds of mono-
lithic inteyrated circuits is satisfactory. In typical
: ~ monolithic integrated circuits, aluminum is deposited to
form the interconnection metallization network and satis-
factory electrical contacts can be formed in the stress
- sensor by aluminum using well-known aluminum metallization
steps. The result of such steps is shown in Figure 3I
where an electrical contact, 44, is shown.
~ - After the metal contacts are formed, the portion
.` 10 of silicon dioxide layer 42 not in the immediate area of
the contacts can be removed by conventional photoresist
techniques. Once this is done, the silicon dioxide layer
has no material over the surface where applied stress is
intended to be measured and so the silicon layer can respond
i 15 without hindrance from such a silicon dioxide covering to
3 provide a proper mechanical response to the applied stress.
¦ However, if the mounting arrangement for the semiconductor
material has substantial amount of hysteresis or other errors
i are predominant in the stress sensor structure, the relatively
; i 20 thin layer of silicon dioxide comprising layer 42 can be left
; ~ in place since the errors and stress sensor response caused
by this layer will be relatively unimportant. The structure
` , with the unnecessary portions of layer 42 removed is shown in
Figure 3~.
i 25 If a semiconductor material stress sensor is desired
~ in the form of a wafer with the.outer regions of the wafer
; i mounted directly on a support, the thickness of substrate 31
1, is chosen accordingly. The portions of the semiconductor
`- j wafer which are fastened to the support become part of the
.,, 1
constraint while the remaining portions of the semiconductor
wafer serve as a diaphragm.
-26-
'' ' '
~ - .
! ~^
,,,, i~
~8E?~6G4
. i
~ I .
Quite often, however, to minimize the effect of
- hysteresis in the bonding means mechanicaily connect~ng the
semiconductor material stress sensor and its support
together, a part of the constraint is provided in a semi-
conductor material. Substrate 31 is made sufficiently thick
so that a portion of it may be e~tched or machined away thereby
leaving the epitaxial layer or the epitaxial layer and some
.~ .
portion of the substrate as the diaphragm and leaving the
remaining portions of the substrate and the epitaxial layer
adhering thereto as the constraint portions of the semi-
'
conductor material stress sensor.
In typically providing this latter structure by
-- etching, the bottom of the substrate 31 is coated with a
' metal such as platinum, the resulting platinum layer having
; 1 15 openings provided therein where etching of the substrate
¦ is to occur. Electrical contact is made to the platinum metal
:.:. I .
and the entire structure is then immersed in an electrolyte
where a more or less conventional electrolytic etch is made.
The resulting structure is shown in part in Figure 3K which
20 matches Figure 3J except for the recess shown in substrate 31.
j This recess is labeled 45. The support then for the entire
¦ semiconductor stress sensor is mechanically bonded to the
, remaining portions of substrate 31. The support should have
. , !
a coefficient of thermal expansion closely matched to the
25 expansion coefficient of substrate 31 and the bond should be
~ as hysteresis free as possible. A silicon support and a gold
i eutectic bond miyht be used, for instance.
, . . .
I Another typical structure which is bonded to
J substrate 31 is a low thermal expansion glass tube which
allows the tube to transmit a gas from some other point to
the diaphragm portion of the semiconductor stress sensor to
27-
- ,
~., ~,,
. ~1
;~ ~
36~4 - -
. . .
`';
, . ,
.
measure the pressure of the gas by measuring the stress that
- ~ the gas exerts on the diaphragm. Another possibility for
.. ,
such a glass tube bonded to the stress sensor is to the end
;; ,~1~ .
of the glass tube opposite from the end bonded to the semi-
conductor stress sensor with the tube either being evacuated
or containing a gas of a selected pressure therein. The
semiconductor material stress sensor thus becomes a differ-
ential pressure sensor with respect to a reference pressure
of zero psi (absolute pressure) or some other pressure.
Electrostatic bonding is one known method for effecting a
.~. !
bond between the substrate 31 and a low thermal expansion
glass.
The structure shown in Figures 2 and 3 indicates
. . . ~_ .
- ' that an n-type conductivity epitaxial layer is to be provided
;~ ~ 15 on a p+-type substrate with the piezoresistors formed also
. .
, ~ being of p-type conductivity material. However, the
structural portions may have different conductivity types
~ so long as the piezoresistors and the surrounding semi-
-~ ] conductor material have opposite conductivity types.., .j .
~ ~ 20 Figure 4 shows a plot of dopant concentraticn, C,
`' versus depth below the silicon layer surface, X, for a
.~j,., j . .
' ~, sensor unit constructed in the manner described in connection
` , with Figure 3. Depth below surface 35 of Figure 3 is plotted
; ~ ¦ on the ho~izontal axis in microns while the dopant concen-
tration in atom/cm is plotted on the vertical axis. Curves
for the concentration of the implanted p-type conductivity
dopant are labeled Cp, the concentration of boron atoms.
The remaining curves labeled Cn, are plotted for the implanted
; ~ n-type conductivity dopant in Figure 3 which is phosphorous.
' J 30 The concentrations after implanting are shown in dashed lines
"'.' , ~
2 8--
,"i ~
'",''''''
;1,.. ,. . Il
~ , ,
: : i
664
.: I
, ` I while the curves of the final structures in Figure 3, after
` i the annealing step, are drawn in solid lines.
!
` , The substantial separation between the maximum
. .
dopant concentrations for both the n-type dopant and the
p-type dopant in the final structure is evident from the
peaks of the two curves. The intersection of the two solid
line curves with one another approximately defines the final
, . ~ ,.
location of the pn junction and shows that the junction
occurs where there is a relatively low concentration of
p-type conductivity dopant. Thus, a small shift in that
intersection either inward or outward from where it is
shown in the plot of Figure 4 will have relatively little
, effect on the total number of dopant atoms in the p-type
~ conductivity region and essentially no effect upon the
~ 15 maximum concentration value of the p-type dopant in the
l p-type conductivity region. Thus, total resistance value
¦ and piezoresistor temperature coefficient will not be much
; affected either hy a small shift in this intersection.
~ This substantial separation between maximum dopant
~ 20 concentrations for both types of dopants also yields a good
.: .
junction breakdown voltage characteristic. The value
x j achieved exceeds 10 volts.
! ~
,~ i ' .
'I
. . - .~ .
.... ' .
. :. ;
. . . 1
.~ .
'
. . ', , .
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