Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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AC MOTOR DRIVE SYSTEM HA~ING
CLAMPED COMMAND ERROR SIGNAL
The subject invention is related to the
following related applications which are also assigned
to the assignee of this invention;
U.S. Patent No. 4,156,896 - issued ~ay 29, 1979
- Weiss entitled, "Method of Controlling a Power
Conversion System".
-U.S. Patent No. 4,164,015 - issued August 7,
1979 - Espelage et al, "Control Circuit for Power
Converter".
Canadian Application Serial No. 331,769 -
filed July 13, 1979 - Espelage et al , entitled,
"Control Current Inverter and Motor Control 5ystem"
Canadian Patent Application 36~,5~l, filed
~o , Walker et al, entitled, "Dual Mode AC
Motor Drive System".
This invention relate`s~generally to power
conversion systems and more particularly to a system for
controlling an AC motor by controlling the motor current
via a three phase converter-inverter system.
While DC motors historically have had
widespread use where operation over a wide sp~ed range
is desired, more recently AC motors have been finding
greater application in variable speed drive applications.
There are, however, certain problems associated with the
~5 use of AC motors particularly where the motor is
supplied with power from a system comprising an AC to DC
`
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21 DSH 2~21
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converte~ feedin~ a variable frecuency ~C to AC
inverter such as a phase controlled thyrsitor inverter.
As disclosed, for example, in the above referenced U.S.
Patent No. 4,156,8~6 - issued May 29, 1979 - Weiss and
U.S. Paten~ No. 4,164,015 - issued August 7, 1979 -
Espelage et al, if one is operating a phase controlled
thyristor AC to DC converter in z negative region
(fourth ~uadrant~ and a positive co~mand voltage is
suddenly applied, the output can move into the positive
re~ion ~first ~uadrantl relatively quickly. However, if
one is operat;ng in the positi~e region and a reverse
com~nd voltage is applied, transition to the negative
region cannot take place as ~apialy due to the inherent
transport lag or delay time encountered in commutation.
lS Thus, in syste~s where the DC voltage is required to
change rapidly in positive anc negative directions,
response to forward and reverse command signals will not
~e the same due to the inherent unequal bidirectional
operating characteristic encountered with phase
controlled thyristor bridge converters.
It is an object of the p-esen, invention,
therefore, to provide an improved power conversion system
parttcularly as applied to the o?eration of zn active
load; e.g., an AC motor.
Another object is to provide a variable
fre~uency AC motor drive s~stem which is adap~ed to have
like response for operational commands in ei,her the
~o~ard or reYerse direction.
It is a further object o~ the present inyention
to proYide a current control sys'em which responds very
rapidly ~ith minimum, overshoot.
The foregoing and othe objects are satisfied
in accordance with the present invention throu~h the
provision of a method and apparatus for controlling the
curxent supplied to an active load, the load more
particularly comprising a circuit including an AC induction.
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21 DSH 2521
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motor, and drive means for providing an AC current of
variable magnitude and frequency to the motor. A variable
DC power source, namely a three phase converter is
connected from a main three phase AC source to a variable
frequency AC power source, namely a three phase inverter,
preferably by way of a DC limk comprising an inductor.
Control of the converter is provided in accordance with
a composite error signal resulting from the summation of
first and second error signals generated in respective
feedback signal paths. The first error signal comprises
a positive feedback voltage corresponding to the motor
back E~ which is reflected as a DC voltage at the
inverter side of the inductor. The second error signal
comprises a motor current error signal whose signal level
is clamped at a predetermined amplitude preferably one
which is fixed in value. The second error signal is
developed by another summing junction having applied
thereto signals corresponding to the torque command signal
and a signal corresponding to the absolute magnitude of
the motox current which are summed to develop the second
error signal which is applied to the input of a voltage
clamp whose output in turn is coupled to the first
mentioned summing junction. The voltage clamp acts
to limit the amplitude of the second error signal,
preferably in one (positive) polarity direction, and has
the effect of limiting the rate of change of current
fed to the motor in the in~reasing current direction to
resemble that which occurs inherently for command inputs
to the opposite direction.
3~ While the present invention is particularly
defined in the claims annexed to and forming a part of
this specification, a better understanding can be had
from the following description taken in conjunction with
the accompanying drawings in which :
Figure 1 is a schematic block diagram
illustrative of the preferred embodiment of the subject
invention in its broadest aspect;
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Figures 2~ and 2B are a set of waveforms
respectively illustrative of positiye re~ion (first
quadrant) steady state operatlon of a three phase
thyristor controlled ~C to DC converter and a transition
o~ s~ch a con~erter from pGsitive re~ion to negative
region (fourth quadrant~ operation and being illustrative
of the transport la~ or delay time existing durin~ the
voltage reversal in making a transition from first to
fourth quadrant operation;
Figures 3A and 3B ~re waveforms respectively
illustrative of steady state operation in the negative
re~ton (fourth quadr~nt~ and a trans~tion from a negative
region tfourth quadrant~ operation ko a positive re~ion
tfirst quadrant~ operation and furthex illustrative of
the relatively rapid transition from fourth quadrant to
first quadrant operation o~ a three phase thyristor
controlled AC to DC converter; and
Figures 4~-4D are ~our sets of waveforms
helpful in understanding the operation of the subject
inVention.
Referring now to the drawin~s and more
particularly to Figuxe 1, re~erence numeral 12 denotes a
source of variable DC current consisting of a three
phase AC to DC converter 14 connected to a main source
of three phase t30~ eIectrical power supplied via lines
Ll, L2 and L3. The converter is implemented, for example,
by means of a controlled thyristor bridge, a t~pical
example of which is shown in the above mentioned related
U.S. Patent NQ. 4,156,896 ~ issued May 29, 1979 - Weiss.
The converter 14 is controlled b~ a control circuit 16
which for an AC to DC bridge converter, is adapted to
generate and apply suitable gating si~nals thereto for
rendering-each thyristor conductiye in a pxedetermined
sequence, T~e converter 14 is adapted to supply a DC
current ~DC to an active load 18 by means of an inductor
2Q. The active load 18 in the present invention
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comprises an ~C induction motor 2~ driven in accordance
with the output of a force commutated DC to AC inverter
24, also implemented by way of a thyristor bridge network,
the details of which are not shown~ The inverter is
s operated in accordance with gating signals generated and
applied thereto from a firin~ control cixcui~ 26. The
apparatus considered up to this point is known and
disclosed, for example, in the above mentioned Canadian
Application No. 331,769 - filed July 13, 1979 - Espelage
et al.
Additionally, the disclosure referenced in
Canadian Application No~ 331,769 also teaches that,
a~ong other things, current sensors 28 are associated
with the three phase l~nes 30, 3Z and 34 connecting the
AC output from the inverter 2~ to the motor 22. By
coupling each of the three current sensors 30, 32 and 34
to a three phase rectifier circuit 36, an output signal
VR proportional to the absolute value o~ motor current
~ is provided. As taught ~n Canadian Application No.
331,769, the inverter 24 operates in response to a
control signal Va appli,ed to circuit 26 to supply motor
current Im of vartable magnitude and frequency. The
operating frequency o~ the inverter 24, moxeover, is
under the control of the firing control circuit 26
which typically includes a voltage controlled
oscillator feeding a ring counter, not shown.
The control signal Va is generated by a
frequency control circuit 38 and for purposes o~
illustration is of the t~pe wh~ch is power adapted to
control motor slip, ~otor power factox,, or so~e other
parameter as a function of the torque command signal V .
The above-referenced specificat~on of Canadian ~pplication
No. 331,769 specif~cally details t~pical circuit means
for implementing constant angle 0 operation. Suffice it
to say for purposes,of th~s disclosure that frequency
is controlled so that the current Im will produce motor
torque of the desired direction. Additional details of
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21 DSH 2521
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the frequency control circuit is unnecessary to the
explanation of the subject invention, since the
inventive concept ~s directed more particularly to the
control of the ~C to DC converter 14 as it relates to
supplying the current IDC to the DC to ~C inverter 24
feeding the motor 22.
SInce in a s~stem o~ the type disclosed the
voltage VL, which is defined as the load volta~e, appears
across the input ter~inals 40 and 42 of the inverter 24,
is adapted to s~ing positiye or ne~ati~e, the converter
circuit 14 must operate in both the positive and negative
regions of output DC voltage and accordin~ly, must be
operative for ~} ~ and fourth quadrant operation.
~eference is now made to Fi~ures 2A, 2B, 3~ and 3B
lnasmuch as they depict the problem to which the present
invention addresses itself. The waveforms o~ Figures
2~ and 3~ respectively illustrate steady state first and
fourth quadrant operati,on o~ a thyristor controlled AC
to DC bridge converter as taught, for example, in the
above referenced U.S. Patent ~o. 4,155,896 and U.S.
Patent No. 4,164,015. What is significant in regard to
this invention about this type of converter operation
is the difference in the transient response encountered
~n going from plus (~ to minus t-~(first to fourth
quadrant~ operation and go~n~ from minu$ (-~ to plus (-~)
(fourth to'first quadrant~ operation. Figure 2B is
illustrative of conyerter o~eration in ~oing ~rom first
to fourth quadxant operation upon the receipt of a
negative command voltage at the ti~e tl. As indicated
b~ the wave segment 44,,an instantaneous transit~on
cannot be made, but must ~ollo~ the wave~orm of the ~C
wave being rectified to the time t2 be~ore com~utation
takes place, thereby having an inherently limited slew
rate. Conversely where the system is operatin~ in the
negative or fourth ~uadrant and a positive command is
received, a transient response tl to t2 such as shown in
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21 DSH 2521
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Figure 3B results. Waveform segment 46 indicates that a
relatively rapid transition takes place. Accordingly,
the waveforms in Figures 2B and 3B indicate that an
unsymmetrical transient response normall~ occurs.
Turning attention ayain to Figure 1, a first
or coarse ~eedback signal path carryin~ a signal VFI
developed fxom the load voltage VL, is provided by way
of a filter 48 coupled from circuit junction 50 to a
first su~min~ junction 52. The filter comprises a
10` substantially unity ~ain circuit such that the feedback
~i~nal VF comprises a pos;~tive feedback of unity ~ain,
which in the absence of any other input to the summing
junction 52, will cause the converter output voltage VO
appearing across ter~inals 54 and 56 o~ the converter
14 to match the voltage VL~ ~ith;no DC voltage eL
across the inductor 20, the inductor will tend to
maintain a cons:tant curxent at any voltage level VL. If,
however, a second feedback siynal VG is applied in an
additive sense to the summing junction 52, the result
will be a rate o~ chan~e of current di~dt of IDC in the
inductor 20 which is proportional to the second signal
applied. It is to this second signal VG that the
present invention is primaxily directed. Accordingly,
the present invention contemplates a second or trim
feedbac~ signal path wh~ch includes a clamping or
limiting of the positive goin~ portion o~ any second
feedback si~nal applied to summin~ junction 52~
The seco~d feedback $i~nal comprises a
di~exence signal derived ~rom an operator controlled
3n rheostat 58 and the motox cuxrent rectifier 36. In a
simple system, for example, rheostat 58 is adapted to
provide a var~.able command input si~nal pxoportional to
a desired motor current ~ which is substantially
pxoportional to output tor~ue~ Accordin~l~, a curXent
command sign~l V~ is applied to one input o~ a second
summing junction 60 whose other input comprises the
signal VR which corresponds to the absolute value of the
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motor current II 1. The ¦I I signal is indicative of
actual motor tor~ue, since motor torque is a function of
both motor current, motor power factor, and gap flux.
The two signals Vc and VR are applied to the summing
point 60 and combined , i.e. are subtracted from the
other, and the difference signal VD is fed to a suitable
operational amplifier 62, having an appropriate transfer
function G. The output of the am.plifier 62, accordingly,
constitutes a current error signal VE~ which signal is
a signal proportional to a desired change in motor
current I . The gain of ampli~xer 62 is made sufficiently
high in order to provide for precise control of current
in the steady state. ~hat is significant, however, is
that the signal VE in the present invention is limited,
i.e. clamped to a selected reerence level in the
positive direction by being coupled to a voltage clamp
circuit 64 which provides an output VG. The effect of
the voltage clamp 64, as the wave~orms in Figures 4A-4D
illustrate, is to limit the change (di/dt) of current
IDC and accordingly I ~ith respect to time for any
positi~e going command voltage as reflected in the error
signal VG.
That this is true can be shown by the following
discussion. For purposes of this discussion, the small
resistance of the inductor 2~ will be considered to be
negli~ible. From the well known expression e = L
di~dt it should be noted that the voltage eL across the
inductor 20 is e~ual to the` Yalue of the inductance L
times the rate of chan~e o~ current with respect to
time (di~dt~. Accordin~ly, the rate o~ ch.ange of
current ~di/dt~ of IDC is proportional to eL ~ VO ~ VL
Considering the apparatus shown in Figure l and assuming
that the combInation of the filter 48 and the circuit
configuration 12 exhibits a unity gain signal transfer
character~'stic; i.e., the voltage gain of the means 12
is K and the gain of the filter 48 is l~K then for the
.
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21 DSH 2521
_ g _
O (VS~ K (VF ~ VG), where VF and V are
the two error signals. Noting the voltage eL across the
inductor 20 is e~ual to VO - VL which in turn is equal
to K(VS - VF), fro~ the expression Vs ~ VF ~ VG the
voltage VG reflects the scaled voltage eL across the
~nductor 20. Thus by l;mitin~ the voltage VGJ the
v ag eL across the inductor is limited and accordingly
the change of current di~dt o~ IDC and Im is alos
limited .
Referring no~ to Figures 4~ through 4D, there
are shown four sets of waveforms which are intended to
illustrate the operating characteristics of a system of
the type described. For clarity the scaling factor K
introduced above is set equal to one in Figures 4A-4D.
Under the condition where there ts no limitlng or
cla~ping of the error signal, t.e. VG = VE = G (VC ~ VR)
and the gain G ts ver~ high. Consider;ng first Figure
4A, there are sho~n the corresponding waveforms for the
current command signal Vc, the error signal VG, the
converter output signal VO and the motor current IDC for
three values of load voltage VL, namely where VL <O,
VL ~ and VL>O. F~gure 4~ is intended to represent an
ideàlized s~stem where there are no time delays or rate
limits except for the effect of the inductor 20 on the
current IDC' From the expression e ~ L di/dt, one can
also derive the expression ~I = 5( L ~ dt = L ~ e dt.
From the latter expression, Figure 4A is intended to
illustrate that for a given change in current /\I, the
volt second interyal ( J e dt~ or area under the
waveforms 66, 68 and 70 will xemain the same. Accordingl~,
as the load voltage VL ranges from less than zero
potential to greater than zer~ potential, the time
intervals tl, t2 and t3 increase in length, meaning that
the current response is not constant, but is a ~unction
of the load voltage.
Consider now Figure 4B which illustrates the
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21 DSH 2521
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effect of clamping the error signal VG to a fixed
magnitude in the positive direction in the same idealized
system as in Figure 4~ as evIdenced by the waveforms 72,
74 and 76, the clamping o~ the volta~e VG has the effect
of li~iting the positIve excursion of VO, this forcing
the wavefor~s 78, 8Q and 82 to be substantially identical
trreSpectiye of the ma~nitude of the load voltage VL.
The times t1~, t2' and t ' are substantially equal,
indicating that the time response for a change in
current command effected by the signal Vc is invariant
with respect to the load voltage VL.
Figures ~C and 4D illustrate the effect of the
subject invention in a realistic system in which the
converter 12 has the dynamic characteristics illustrated
in Figures 2 and 3~ These characteristics have been
modeled as a fi.xed slew rate for a negative going
voltage.
Consi.dering no~ Fi.gure 4C, there is shown a set
of waveforms corresponding to prior art practice where
no limiting of the error signal VG occurs as evidenced by
waveforms 84, 86 and 88. As: shown by the VR =¦Im¦~ IDC
waveforms 9Q, 92 and 84, a current overshoot occurs due
to the slew rate limit on the voltage VO. This overshoot
is a function of the magnitude of the load voltage VL,
being comparatively greater for a load voltage VL less
then zero.
The wavefor~s of Figure 4D, which reflect
operation of the s.ubject ~nvention, illustrate the
ef~ect of the voltage cla~p circuit 64 (Figure 1) in the
3Q system, causi-ng equal a~plitudes of the ~G signal as
evidenced by the waveforms 102, 104 and 106, in turn
causing substantiall~ equal volt-second wave~or~s 108,
110 and 112 to be effected. What xesults in substantially
like current transient characteristics as shown b~
waveforms 114, 116 and 118 for the three ~agnitudes of
load voltage VL. What is achieved by limiting the
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error volta~e to a fixed magnitude in the positive
d~rection is that the time response and current overshoot
become substantially invar;ant with respect to the
magnitude of the load Yoltage VL.
In summary then what has been shown and
described is a method and apparatus ~or controllin~ DC
curxent in an active load, rapidly and precisely, while
exhibi,tiny a response which is substantially symmetrical
for both pos~tive and ne~ative command signals as well as
a response ~hich is essentially independent of the DC
volta~e level at the time of the current command. This
control has been described relative to an active load
comprising an ~C motor dxive system ~hich includes an
error signal clamp cixcuit in the current control loop
~hich operates to limit upon command the rate of rise of
the motor supplied from an AC-DC inverter.
While there has been shown and described what is
at present considered to be t~e preferred embod;ment of
the present inventionr modifications thereto will readily
occur to those skilled in the art. It is not desired,
therefore, that the inventt,on be limited to the specific
arrangement shown and described, but it is intended to
cover all such modifications as fall within the true
spirit and scope o~ the invention as defined in the
appended claims.
