Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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MOTOR PROTECTION DEVICE
This application is a division of Canadian
Serial No. 358,~40, filed August 15r 1980.
This invention relates to protective systems
for elec-tric motors. More specifically, it relates to
overload, over-temperature, phase unbalance, overcurrent,
and ground fault protection for electric motors.
Unnecessary motor shut-downs from premature
relay trips can rob a critical process, industry, or
utility of valuable operating time. A relay that does
not trip soon enough can result in a heat damaged
or burned-out motor which also results in lost opera-ting
time. Critical operations that require high reliability
drives need motors that have precise protection.
A bimetal type relay provides overload
protection against motor overheading under steady state
conditions. Bimetal relays, however, cannot accurately
reproduce the temperature of motor elements under
transient and cyclic conditions of short time durations.
Therefore, bimetal relays do not provide good protection
for repeated starts or hot starts and may trip prematurely
on cyclic loads.
Most large motors have resistance temperature
detectors placed in the stator slots and near bearings.
~5 Resistance temperature detectors (RTD's) are essentially
resistance elements of copper, platinum or nickel.
Measuring the resistance of the RTD ' s installed in the
motor gives an indication of motor winding and bearing
temperatures.
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The use of a thermal analog of a motor having
motor current inputs and winding temperature inputs from
RTD's closely approximates the heating characteristics of
most motors during both starting and steady sta-te
operations. The IEEE paper Thermal Tracking - A Rational
Approach to Motor Protection T7~029-5 discusses a thexmal
analog using RTD's and mo-tor curren-t inputs that precisely
tracks motor -temperature changes precisely as they occur;
rapidly during stall, more slowly during gradual load
increases, and takes accurate account of temperatures
during cooling.
A relay using an accurate thermal analog of a
motor, while a vast improvement over -the bimetal type
relay, has some disadvantages. One disadvantage is that
lt is not readily adjustable in the field. Many times
the calculated motor data, given initially by the motor
designer, does not agree with the actual motor data
obtained in tests in the field. These differences
necessiate adjustment of the relay which requires returning
the relay unit to the factory for adjustment or the use
of expensive field equipment for adjustment.
Another disadvantage -to the thermal analog relays
is that should an RTD open, the high resistance of the open
RTD input would then be mistakenly interpreted as indicating
a very high temperature which in turn would cause a
premature trip of the motor.
An object of the present invention is to provide
a motor protection device that has field adjustable set
points, for the various functions monitored, that do not
require special instrumentation or tools or enter.
Another object of the present invention is to
provide a motor pro-tection device that can monitor more
than one winding RTD and more than one bearing RTD.
Another object of the present invention is to
provide a motor protection device that disregards open RTD's.
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SUMMARY OF THE INVENTION
A motor protection device is provided that
monitors motor currents and motor temperatures and provides
protec-tive functions whose charac-teristics are based on
field settable data and motor operating conditions. The
pro-tective functions provided are over-tempera-ture, over-
load, instan-taneous overcurrent, ground fault, phase
unbalance, and phase reversal. Field se-ttable da-ta is
entered by means of a keyboard and consists of motor
trip points for the protective functions, and motor and
system parameters.
The values of the protective functions (bearing
temperature for bearing overtemperature protection or
percent phase unbalance for phase unbalance protection,
for example) are compared to the entered trip points for
the protective functions and if the values of the
protective tunctions exceeds the trip point, a trip relay
is activated.
DESCRIPTION OF THE DRAWINGS
While the specification concludes with claims
particularly pointing out and distinctly claiming the
present invention, the objects and advantages of the
invention can be more readily ascertained from the
following description of a preferred embodiment when used
in conjunction with the accompanying drawings in which:
FIGURE 1 is a schematic block diagram of a
motor protection device in accordance with the present
invention.
FIGURE 2 is a functional block diagram of a
motor protection device in accordance with the present
invention.
FIGURE 3 is the front panel of a motor protection
device in accordance with the present invention.
FIGURE 4 is a flow chart showing the Maximum
Values of RTD Temperatures program in accordance with
the present invention.
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FIGURE 5 is a schematic block diagram showing
the RTD thermal analog model.
FIGURE 6 is a flow chart showing the Phase
Unbalanee proyram in accordance with the present invention.
FIGURE 7 is a chart showing the Phase Unbalanee
Trip Characteristic.
FIGURE 8 is the overall flow chart for the
motor proteetion device in aceordance with -the present
invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to FIG. 1, the inputs and ou-tputs
of proeessor 1 are shown. Starting with the analog inputs,
up to six resistance temperature deteetors (RTD's) 2 for
measuring winding temperatures and up to two RTD's for
measuring bearing temperatures ean be used. RTD's are
loeated in a motor (not shown) to be proteeted. Eaeh
RTD 2 has two terminals with two leads A and B
conneeted to one terminal and a lead C eonnected to the
other. Eaeh A lead is eonneeted to an input of eight
to one multiplexers 3 and 4. Eaeh B lead is eonnected
to an input of an eight to one multiplexer 5. The output
of multiplexers ~ and 5 and all the C leads are connected
to an RTD input bridge cireuit 6. Up to 6 winding RTD's
are connected to the first six inputs of the multiplexers
3, 4 and 5 while the bearing RTDIs are always eonnected
to the seventh and eighth inputs of the multiplixers 3
4 and 5.
The RTD input bridge circuit 6 has a current
souree 7 connected through a multiplexer 3 to the A leads.
A resistor 8 whieh has the value of 2R is connected through
multiplexer 4 to the A leads as well. The other side of
the resistor is connected to the inverting input of an
operational amplifier 9. A resistor 10 with a value of R
is conneeted through the multiplexer 5 to the B leads~
The other side of resistor 10 is eonneeted to the non-
inverting input of operational amplifier 9. Conneeted to
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the non-inverting input of opera-tional amplifier 9 and
ground are two resistors in series; resistor 11, which has
the ~alue of R and resistor 12 which has the value of Ro~
The resistor 12 is connected to ground. Connected to the
junction between resistors 11 and 12 are all the C leads
from the RTDIs 2. Connected between the non-inverting
input of operational amplifier 9 and the ground is a
resistor 13 with a value of 2R. The output of operational
amplifier 9 is connected to diode 14 which in turn connects
to the input of comparator 37a. Feedback resistors 17, one
of which is in series with line 18, are connected between
the inverting input of operational amplifier 9 and the
output of diode 14. A power supply 15 is also connected
to the input of comparator 37a through a resistor 16.
Another analog input to processor 1 is obtained
from current transformers 20, 21, 22 connected to lines
Ll, L2 and L3- Line Ll, L2 and L3 feed the motor (not
shown) to be protected. Each current transformer 20, 21
and 22 is connected to an isola-tion transformer 23, 24
and 25, respectively. The output of each isolation
transformer 23, 24, and ~5 is connected respectively to
a rectifier/filter 26, 27 and 28. All three lines
Ll, L2 and L3 pass -through a window-type current
transformer 30. The output of the window-type current
transformer 30 is connected to an isolation transformer
31 and then to a rectifier/filter 32.
The output of each of the rectifier/filters
26, 27, 28 and 32 are connected to the first four inputs
of an 8 to 1 multiplexer 33. The outputs of the rectifier
filters 26, 27 and 28 are also connected respectlvely
to input 5, 6 and 7 of multiplexer 33 and to diodes
34, 35 and 36. Diodes 34, 35 and 36 are connected to
a peak detector 37 which in turn is connected to the
eigh-th input of the multiplexer 33. The output of -the
multiplexer 33 is connected to a selectable gain amplifier
35a. The output of the amplifier 35a is connected
through diode 36a to an input of comparator 37a.
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The output of comparator 37a is connected to an input To
on processor 1. An 8 line output from the input/output
port of processor 1 is connected to an 8-bit digital-to-
analog converter 38, the output of which is connected to
the other input of comparator 37a.
Address latch 39 is connected by means of a bus
to processor 1. The output of address latch 39 is connected
to multiplexers 3, 4 and 5 as well as multiplexer 33 by four
address lines. The address line indicative of the most
significant bit has an inverter 42 between the latch 39
and multiplexer 33. The address line indicative of the
second most significant bit is also connected to the gain
selector of the selectable gain amplifier 35aO
The field setable da-ta is entered by means of
keyboard 41 and an ENTER switch 57 which is connected to
the read write enable line of a battery powered random
access memory (RAM) 44. The latch decoder 40 provides
four input lines to the keyboard 41. The latch decoder
40 also provides an enable line to address latch 39.
The keyboard 41 is connected to a tri-state driver 42
which is connected by means of a bus to the processor 1.
The tri-state driver 42 is enabled by a line from -the
latch decoder 40.
A program read-only memory (ROM) 43 and the
battery powered random access memory (RAM) 44 are both
connected to the processor 1 by a bus. A crystal
oscillator 45 is connected to processor 1 to provide an
internal timing reference.
Lines Ll, L2 and L3 are connected to a J-K
flip-flop 58 and a J-K flip-flop 59 through three
wave-shapers 61, 62 and 63, one for each line. The
output of waveshaper 61 is connected to the J input of
flip-flop 58 and the K input of flip-flop 59. The
output of waveshaper 62 is connected to the clock input
of flip-flop 58 and the J input of flip-flop 59. The
output of the waveshaper 63 is connected to the K input
331~C~
of flip-flop 58 and -the clock input of flip-flop 59. The
inverting output of flip-flop 58 and -the inver-ting output
of flip-flop 59 each provide an input to NAND gate 64. The
output of NAND gate 64 is connected to an input Tl of
processor 1 and supplies phase reversal information.
Outputs from the processor are connected -to
latches 46, 47 and 48 by means of a bus. Latch 46 is
connected to a function dlsplay 49. La-tch 47 is connected
to a value display 50. Latch 48 is connected to six fault
indicators 51 and to a timer 52. Timer 52 is connected to
a normally energized alarm relay 53. Latch 48 is also
connected to a tri-state driver 54 which in turn is
connected to a trip relay 55 which is normally de-energized.
The alarm relay 53 and the trip relay 55 are connected to
external control circuitry, not shown. An enable signal
is connected to the tri-state driver 54 from the input/
output port of processor 1. Another output from the
processor is a line from the input/output port to an
inactive indicator light 56.
The operation of the mo-tor protective device
will now be described. First, the overall operation will
be broadly described. Referring to FIG. 2, which is
composed of functional blocks, the reference numerals used
in this figure are used in this figure only. ~ther figures
in the specification use like numerals for like elements.
The motor protection device monitors motor line curren-ts
by means of current transformers in block 7~ and monitors
fault currents by means of a window-type current
transformer in block 71. Temperatures of motor windings
and bearings are monitored by RTD's located in the motor
in block 72. Protective functions are provided with
characteristic based on field settable data which is
made up of trip points, and motor and system parameters
which are entered through the keyboard block 73. The
field settable data points are stored in a RAM motor
data storage located in block 74. The numerical display
block 75 provides visual feedback that the proper key
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has been entered and received.
The ground fault functlon block 76 receives data
from block 74 and ground fault current input information
from block 71. If the ground fault current is 67% of the
trip point an alarm condition is given. The ground fault
function 76 and the other protective functions are all
connected to -the relay drivers block 77 and annuncia-tor
block 78. An alarm condition from a function block causes
the relay driver to activate the alarm relay in block 79
which is connected to an alarm, not shown. In addition
a ground fault indicator light in the annunciator block
78 flashes. r~hen the ground fault current exceeds the
trip point a trip signal is given. The relay drivers
block 77 is also connected to a trip relay located in
block 80. A trip condition in one of the function blocks
causes the trip relay to be activated and external control
circuits interrupt power to the motor. The flashing
indicator light in annunciator block 78 stays li-t to
indicate the reason for the trip.
The phase function block 81 which includes phase
unbalance, phase loss, and phase reversal functions has
inputs from the current transformer block 70 and the RAM
motor data storage 74. When 67% of the trip point is
reached, an alarm signal is given. When the trip point
has been exceeded, a trip signal is given.
The instantaneous overcurrent function in block
82 has inputs from the current transformer block 70 and
the RAM motor data storage block 74. When the overcurrent
exceeds the trip point the trip condition exists. Since
the device responds to a single cycle of overcurrent no
alarm condition precedes the trip. The instantaneous
overcurrent indicator in the annunciator block 78 is lit
during the trip condition.
The overload/overtemperature functions block 83
has input from the RTD's in block 72, current transformers
in block 70, and RAM motor da-ta storage in block 74. A
motor temperature analog is used in the overload/
overtemperature functions and an alarm signal is
given when the motor temperature is 10 C. from the
trip point. A trip signal is given when the -trip
polnt is reached. I-t is also possible to have
overload/overtemperature protection of block 83
without RTD input from block 72. Motor tempera-ture
would be calculated from just the current inputs
from block 70.
10Turning now to the specific elements, FIG.
3 shows the front panel of the motor protection device.
The front panel has a keyboard 41 which has 16
inputs which consists of zero to nine numerals
85, FUNCTION switch 86, VALUE switch 87l DISPLAY
15switch 88, SCAN switch 90, STORE switch 91 and RESET
switch 92. The switches are in the form of pushbuttons.
The panel also contains a two-digit Function display
93, a two and a half digit Value display 94. There
is an Inactive light 96 and an annunciator panel
97 containing six fault indicators. In addition,
there is an ENTER switch 95 located to the left of
the Inactive light 96.
Each motor/system parameter is assigned
a number called a Function number as shown below.
Function numbers 0 to 12 are measured motor parameters.
Function numbers 15 to 28 contain field settable
data consisting of trip points and motor and system
parameters which must be enetered by the user into
random access memory ~4.
. .
_ _ _ . . .. _, _ .. . . .
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FUNCTION MEA~URED AND
NUMBER DISPL~YED VALUES UNITS
0 Maximum ~inding RTD Temperature C
1 RTDl Winding Temperature C
2 RTD2 ~inding Tempera-ture C
3 RTD3 Winding Tempera-ture DC
4 RTD4 Windin~ Temperature C
RTD5 Winding Temperature C
6 RTD6 Winding Tempera-ture C
10 7 RTDl Bearing Temperature C
8 RTD2 Bearing Temperature C
9 Line 1 Current % FLC
Line 2 Current % FLC
11 Line 3 Current % FLC
1512 Ground Fault Current -O Trip Current
FUNCTION TRIP POINTS MOTOR/ VALUE
NUMB~ER SYSTEM PARAMETERS UNITS _MITS
Total number winding RTD's Qnty. 0-6
16 Total number bearing RTD's Qnty. 0-2
2017 Winding RTD trip temperature C 20-155
18 Bearing RTD trip temperature C 20-155
19 Full Load Current (FLC) % CT
secondary 20-100
Locked Rotor Current X FLC 3-12
2521 Stall Time Sec. 1-99
22 Instantaneous Overcurrent X FLC 3-15
23 Phase Unbalance Trip Current % FLC 5-30
99 disables
function
3024 Ground Fault Trip Current % of/Amp 5-100
Ground Fault Trip Time Delay Sec. 0.10-0.99
26 Phase Reversal Number 1 disables
function
2 enables
function
27 Time Overcurrent Trip
(Ultimate Current) % FLC 100-120
28 Reset Mode Number 51 manual reset
85 automatic
reset
If winding RTD's are used, Function 27 should always be
selected to be 120% of full load current. If winding RTD's
are not used, function 27 must be used to selec-t an
ultimate current of 100-120% of full load current.
The specific data for each of the above functions
15 through 28 must be established and s-tored in -the random
access memory 44 before protection can begin. For example,
if a motor llad the following data ~or a particular
application:
Full ~oad Current (FLC) = 400A
Locked Rotor Current = 6 X FLC or 2400A
Instantaneous Overcurrent = 10 X FLC or 4000A
Stall Time = 5 seconds
Phase Unbalance Trip Current = 20% X FLC or 80A
Ground Fault Trip Curren-t = 18A
Line CT Ratio = 500:5
Ground Fault CT Ratio = 100:5
The following information will be obtainea for
function No. 15 through 28.
Total number of winding RTD's 3
Total number of bearing RTD's 2
Winding RTD trip temperature 130C
Bearing RTD trip temperature lOO~C
20 Full load current (% of CT rating) 80%
Locked rotor current 6X FLC
Stall Time 5 Sec.
Instantaneous overcurren-t 10 X FLC
Phase unbalance trip current 20% of FLC
25 Ground fault trip current 90O of lA
Ground fault trip time delay 0.50 Sec.
Phase re~-ersal Yes
Time overcurrent trip (ultimate current) 120% FLC
Type reset Automatic 85
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Values are calculated as follows:
Eull load current (FLC) = 500A x 100~ = 80% of CT ra-ting
~ocked rotor current (~RC) = 400~ = 6 x FLC
Qhase unbalance = 80 x 100% = 20% of FLC
~round Fault = 18A ~ 1OO x 100% = 90% of lA
Time overcurrent trip - Always set to 120 when winding RTD's
are used.
Data could be entered into each function 10
through 28 by using the following data entry procedure:
1. Depress the "ENTER" switch 95.
2. Depress the "FUNCTION" switch 86.
3. Enter the desired function number (15-28~
by serially depressing the appropriate digit entry buttons
on keyboard 41. The number entered will appear in the
"FUNCTION" display 93.
4. Depress the "VALUE" switch 87.
5. Enter the desired value, most significant
digit first, by depressing the digit entry buttons. The
value will be displayed in the Value Display 94.
6. To store the displayed data, depress and hold
the "ENTER" switch 95, then momentarily depress the "STORE"
switch 91, while holding the "ENTER" switch 95. Now release
the "ENTER" switch. A flashing display 94 indicates the
value was not stored because it was out of range or because
of improper procedure.
7. Repeat steps 2--6 for all functions 15-28.
The identification number (I.Do number) is meant
to provide some measure of protection against unauthorized
"tampering" with the stored data. The ID number is also
used to select manual or automatic reset operation.
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The ID number ls the last function to be en-tered
and will not be accepted unless, and un-til, all other
functions have been properly stored into storage memory.
Only two numbers will be accepted as valid ID numbers.
These are: 51 for manual reset, 85 for automatic reset.
Knowledge of the ID number is required to return
the unit to "ACTIVE" status following the change of any
stored setpoint.
Prior to the required motor/system data being
entered into the random access memory 44, the motor
protection device was in the inactive mode. The inactive
mode is indicated by the light 96 labeled "INACTIVE" on
the front panel being lit and the alarm relay 53 being
in the alarm state. The inactive mode means that motor
protection is not being provided. When the device is in the
inactive mode, the status of the trip alarm relay 55
remains unchanged, i.e., if -the trip relay is tripped it
remains tripped or if it is not tripped it remains
untripped. In addition to the device being in the
inactive mode when any of the required motor/system data
is not stored in memory it also becomes inactive when the
supply power is lost, any of the stored motor/system data
is altered without proper entry of the identification code,
or when an internal malfunction of the device is detected.
The Inactive light will not be lit when the device is in
the inactive mode and there is no power being applied to
the device.
The internal malfunction of the device as
mentioned above can occur in two ways:
1. The motor protection data stored by the
user into RAM Memory 44 is des-troyed or lost. The device
frequently checks the data which is stored three times
in random access memory 44 and if any distortion or loss
of data is detected by comparing the data entries, false
tripping due to incorrect data will be avoided by assuming
the inactive state. The alarm relay will be activated when
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the device is in the inactive mode. Also, the ke~vboard
and the numerical display will not function and no motor
protection is provided until the user restores operation
by depressing -the special "ENTER" switch 95. This will
activate the keyboard and the display functions and also
clear the bad data. The user then must check all the
data in Functions 15 to 28, enter and store the missing
values and finally store the ID number.
2. The processor loses control over its normal
operation. The processor normally generates a pulse
train to keep the alarm relay in -the non-alarm state.
Should the processor unit malfunction and not produce
this pulse train, the result would be that the device
would assume the alarm state. The inactive light may
or may not be on.
The annunciator panel 97 containing the fault
indicators 51 located on the front panel consist of six
light-emitting diodes labeled Overload, Phase Reversal,
Ground Fault, Instantaneous Overcurrent, Phase Unbalance
and searing, indicate an alarm condition when they are
flashing and a fault (trip condition) when a steady
indicator signal is given. Flashing overload and bearing
lights also indicate an open RTD.
The keyboard 41 on the front panel can be
utilized in checking motor conditions. Any function
can be examined through the following steps: (1) depress
FUNCTION switch 86, (2) enter the Function number in the
keyboard 41 and the respective value will appear in the
~alue Display 94. The display will remain energized for
three minutes after the last command is entered through
the keyboard. After three minutes, the display will
automatically blank in order to prolong display life.
Depressing the DISPLAY switch 88 will energize the display
for an additional three minutes. The RESET switch 92 is
used for manually resetting the device after a trip has
occurred. The SCAN switch 90 located on the front panel
activates the Scan function. This function provides an
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automatic, sequential display of the motor conditions
that exist in functions 1-11. Unused unctions wi]l
not be scanned. For example, if no bearing RTD's are
used, function 7 and 8 will be omitted Erom the Scan.
The Scan function can be hal-ted by depressing the
FUNCTION switch.
Any set poin-t stored in -the memory can be
changed by following the six s-teps previously discussed
for entry of set poin-ts. Should any set poin-t (function
15-28) be changed, the ID number will be reset to zero
by internal programming. The inactive light 96 will
turn on and the alarm relay will be in the alarm state
to signal that motor protection has been interrupted. To
regain protection, the identification number (function
28) must be stored again into the RAM memory 44.
A flashing display for function numbers 15 to
27 indicates tha~ a selected value to be entered is
outside the limits previously discussed for the various
functions. A flashing display for function number 28
indicates one of the following: (1) an invalid ID number
is selected; (2) all the set points (function numbers 15
to 27) are not stored into the storage memory. A
flashing display may be stopped by depressing VALUE or
FUNCTION buttons.
Phase unbalance (function 23) may be disabled
by storing the value 99 for function 23. The device
considers an open phase as a special case of phase
unbalance; therefore, if the phase unbalance function is
disabled, open phase protection is also disabled. Storing
function 26 with 1 disables phase reversal protection.
Storing function 26 with 2 enables phase reversal
protection.
For application where no winding and/or bearing
RTD's are used, functions 15 to 18 and function 27 must
be selected as follows: (1) if no bearing RTD's are used,
function 16 is set to zero and function 18 is set to 130
(2) if no winding RTD's are used, function 15 is set to
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-16
zero, function 17 is set to 130, and function 27 is se-t to
the desired value (100 to 120% of full load current) of
the ultima-te trip current.
During a power outage to the motor protection
device, no protection is provided; however, a recharge-
able battery located inside the motor protection device
will retain the user set points stored in the random
access memory 44. This permits the motor protection
device to begin protection as soon as the power i5
re-established without having to store all -the field
settable data again. If some of the data is lost from
the memory when the motor protection device is not being
supplied power, the device will switch to the inactive
mode and the user will have to re-enter the set poin-ts5 before the motor protection can be restored.
The computational portion of the processor 1,
the trip relay driver, and the trip relay can be tested
by means of a built-in test function. This test
artificially simulates a rising winding RTD tempera-ture0 which will eventually result in actuating the trip relay.
The test will not operate when the device is
protecting the motor (the "INACTIVE" indica-tor light-OFF).
The following procedure is used to perform
this test:
1. Check the following:
a. All of the user data for function number 15
to 28 must be stored into RAM s-torage memory 44.
b. All the seven indicator ligh-ts (LED's) of
panel 97 including the "INACTIVE" light 96 to
the front panel must be off.
c. The alarm relay should not be in -the alarm
state~
d. The trip relay should not be in the trip
state.
2. Put the device into the Inactive mode by
storing 0 into function 28.
~q,!3~
The "INACTIVE" light 96 should turn ON~ The
alarm relay should go to the alarm state.
3. Not e the winding RTD trip temperature
stored lnto ~unction 17.
The winding RTD alarm temperature is 10C
below the trip -temperature.
~. Se]ect function number 0.
If the winding RTD's are used (Function 15 is not
zero), the value display 94 will show the prevailing
maximum winding RTD temperature.
If the winding RTD's are not used (Function 15
is zero), the Value display 94 will show zero.
5. Depress and hold the VALUE swi-tch 87.
The Value display 94 will increase slowly as long as
the VALUE switch is held depressed
If no winding RTD's are used, the Value display
94 will first jump to 40C or higher temperature and then
increase slowly.
6. When the winding RTD alarm temperature is
reached, the OVERLOAD indicator will begin to flash
indicating alarm condition.
The alarm relay is already in the alarm state
since step 2 above.
7. When the winding RTD trip temperature is
reached, the OVERLOAD indicator will come on steady and
the trip relay will go to the trip state.
8. If the ~ALUE switch 87 is held depressed
even after the trip temperature is reached, the displayed
temperature will eventually reach 199C and then roll over
to 0C.
9. Release the VALUE switch 87 and then depress
and hold the RESET switch 92.
If winding RTD's are not used, the Value display
94 will jump to zero and the OVERLOAD indicator light will
be turned off immediately.
~8'~'3~
-18-
If winding RTD's are used, the maximum winding
RTD temperature displayed by the Value display 9~ will
revert to the prevailing value a-t a controlled rate. The
OVER-LOAD indicator will turn off when the temperature of
15C below the trip temperature is reached.
Even though no trip condition remains and the
~ESET switch 92 is depressed, the state of the trip relay
(tripped) does not change. This is because the protection
device is in the Inactive mode (no ID number in function
28 to define reset).
10. Select the desired type of resct by storing
appropriate ID number into function 28.
The trip relay should then assume the non-trip
state since there is no trip condition present.
The "INACTI~E" indicator light 96 should turn
off and the device again assumes protective functions.
All temperature readings are displayed directly
in degrees Celsius. The maximum temperatures can be
displayed as 199C. Line currents are displayed as
percentage of full load current. The maximum current
which can be displayed is l99~ of full load current.
Ground fault current is displayed as a percentage of
the set point. The maximum ground fault current which
can be displayed is a 199% of a set point.
A summary of the operation of the various front
panel elements of FIG. 3 is provided below:
Panel Name Type Element Function
FUNCTION Switch 86 o Prepare for a new
"function" entry.
o Steps a flashing
display
Function display 93 2-digit read- Displays the last-
out entered function
number which
represents a unique
motor parameter.
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Panel Name Type Element Function
~ALUE Switch 87 o Prepares for a new
da-ta en-try for the
function whose number
(15 to 28) is
displayed in the
function aisplay.
Value display 94 2-1/2-digit Displays the value of
read-out the -Eunction whose
number is displayed
in the function display.
DISPLAY Switch 88 o Energize the Function
and Value displays for
a 3-minute interval.
o Displays the pre-
viously entered
function and value.
SCAN Switch 90 o Examines and displays
the motor conditions of
function numbers 1-11
sequentially.
STORE Switch 91 o Stores a new
acceptable value in
the memory.
o Initiates a flashing
display if the value
is out of range.
ENTER switch Switch 95 Used in conjunction
with STORE to enter
date into storage
memory 44.
O through 9 Numberals 85 Digit en-try for the
function and Value
display.
RESET Switch 92 Allows the trip relay
to be manually reset
after a trip has
occurred.
INACTIVE Light 96 Indicates device is
(LED) protecting the motor.
3`13;~
-20-
Panel Name Type Element Function
OVE~LOAD Panel 97 Fault indication - A
PHASE REVERSAL (IED's) flashing light signals
GROUND FAULT an alarm condition.
5 INST. OVERCURRENT A steady indicator
PHASE UNBALANCE light signals a
BEARING fault (txip) condition.
Flashing Overload and
BEARING lights also
indicate an open RTD.
Referring to FIG. 1, the processor 1 which may be
an Intel 8035, 8-bit chip microcomputer or other suitable
processor has a crystal oscillator 45 having a frequency of
5.898 MHz which is used to provide internal timin~ references
for an instruction cycle time of 2.54 microseconds and an
internal 8-bit timer interval of 81.38 microseconds per
count.
An 8-bit timer of processor 1 is used to generate
timer interrupts every .016 seconds. To provide various
timing references such as .25 seconds, .5 seconds~ 1 second,
etc., an 8-bit memory locations of processor 1 is used as a
system clock. This clock is incremented one count every
.016 seconds. This cloc~ over~lows from 255 counts to zero.
A bus is used to interface the battery powered
random access memory 44, latch decoder 40, address latch
39 and latches 46, 47 and 48 with the processor 1.
These devices are assigned specific addresses called
external addresses which are listed below.
~(33~
-21-
Hexadecimal Address
F3 Latch Column #3 4 Bits ( 4 keys)
F2 Decoder Column ~2 4 Bits (4 keys) KEYBOARD
Fl 40 Column #1 4 Bits (4 keys)
F0 Column ~0 4 Bits (4 keys)
Not Used
E8 Address Latch 39 (4-bit): Input Selector
Not Used
E4 Latch 48 (8-bit): Annunciator, Alarm,
and Trip Signals
Not Used
E2 Latch 50 (8-bit): Value Bu-ffer
El Latch 49 (8-bit): Function Buffer
Not Used
15 BF RAM 44 192X4
00
A program storage read-only memory 43 is also
connected to the bus and consis-ts of the total of 2,048
8-bit bytes. There are two locations in the program memory
43 of special importance: (1) the first instruction to be
executed after initialization (Reset/Power-up) is stored in
location zero (RESET); and (2) the first instruction to be
executed after timer interrupt is s-tored in location 7
(TMRIMT).
3~
The processor 1 contains a total of 12~ 8-bit
bytes O F resident data memory. Bank 0 working registers
are used during the system reset and normal operation~
Bank 1 working registers are used during the timer interrupt
program. Bank 0 and bank l each contain the eight 8-bit
bytes. The resident da~a memory also has an eight level
stack.
The keyboard 41 is read by pulses being provided
at one of the 4 outputs of latch decoder 40 which are
connected to keyboard 41. The 4 output lines of keyboard
41 indicate which 4 of 16 keys are closed for each l of 4
input lines to the keyboard addressed. The keyboard can be
checked for key closures and releases, 4 keys at a time.
The tri-state driver 42 is used to connect and
disconnect the output of the keyboard to the bus, based
on the enable signal received from decoder latch 40. The
function numbers entered are stored in resident data memory
of processor 1 and displayed. When field settable data is
entered, depressing the ENTER switch 95 enables the write
function of the read~write enable line of RA~ 44 storing
the data in RAM 44.
Program memory 44 is a battery powered 192x4
random access memory. This memory is divded into three
sections. Each set point or calculated constant is stored
three times in the memory, one copy in each section. This
makes the contents of section l, section 2 and section 3
identical. This arrangement provides a check against any
undesirable changes in the contents of this memory. As was
explained earlier, a special procedure is necessary to
enter set points into this memory.
Address latch 39 is a four-bit latch which is
used to select one of 16 analog input signals from multi-
plexers 3, 4, 5 and 33. Based on the contents of ~atch 39,
one of the 16 inputs shown below is selected.
-23-
INPUT CONTENT OF SELECTED
NUMBER LATCH 39 INPUT
1 0 HEX WINDING RTD 1
2 1 HEX WINDING RTD 2
3 2 ~EX WINDING RTD 3
4 3 HEX WINDING RTD 4
4 HEX WINDING RTD 5
6 5 HEX WINDING RTD 6
7 6 HEX BEARING RTD ].
8 7 HEX ~EARING RTD 2
9 8 HEX P~ASE 1 CURR~NT (HIGH GAIN)
9 HEX PHASE 2 CURRENT (HIGH GAIN)
11 A HEX PHASE 3 CURRENT (HIGH GAIN)
12 B HEX GROUND FAULT CURRENT
15 13 C HEX PHASE 1 CURRENT (L~W GAIN)
14 D HEX PHASE 2 CURRENT (LOW GAIN)
E HEX PHASE 3 CURRENT (LOW GAIN)
16 F HEX INSTANTANEOUS OVERCURRENT
.
Up to eight RTD's can be monitored with up to six
RTD's (one or two per phase normally) in the windings of
the motor. If less than six winding RTD's are used, then
the lower number addresses of the multiplexars 3, 4 and 5
are filled first. Up to two bearing RTD's can be connected
to the seventh and eighth input of multiplexers 3, 4 and 5.
Multiplexing the RTD's allows a single RTD input
bridge circuit 6 to be used. The purpose of -the RTD input
bridge circuit 6 is to compensate for the RTD lead resis-
tance which can introduce significant errors in the RTD
resistance readings.
A link 18 is placed in series with the proper
value of feedback resistor 17 of the operational amplifier
9 in RTD input bridge circuit 6. The feedback resistor 17
-24-
is chosen to correspond with the type of RTD that is going
to be used. For example, 10 ohm copper, 100 ohm platinum,
100 ohm nickel, 120 ohm nickel. Only one type of RTD
should be used.
When the address latch 3g is connec-ted to the
bus by an enable signal received from the decoder latch
40, one of the addresses previously lis-ted is loaded into
the latch. If address is below 8 HEX than multiplexers
3, 4 and 5 are enabled while multiplexer 33 is disabled
because of the inverter 42 in the most significan-t bit
line feeding the multiplexer 33~ Likewise, if the address
in latch 39 is above 7 HEX, then multiplexers 3, 4 and 5
will be disabled while multiplexer 33 will be enabled.
The second most significant bit line from address latch
39 serves to select the high gain or low gain range of
selectable gain amplifier 35a. A logic zero input causes
the high gain setting of the amplifier 35a to be chosen
while a logical one signal causes the low gain amplification
setting of amplifier 35a to be selected.
The voltage output of operational amplifier 9 is
proportional to the selected RTD resistance in -terms of
volts per degree C, independent of the lead resistance.
The currents of lines Ll, L2 and L3 are
monitored by current transformers 20, 21 and 22,
respectively. Each current transformer is connected to
a corresponding isolation transformer 23, 24, 25 which has
an output of one volt per amp. The isolation transformers
23, 24 and 25 are connected to corresponding rectlfier/
filters 26, 27 and 28. The output of rectifier/filter
26 which is associated with line 1 is connected to the
first and fifth input of multiplexer 33. The output of
rectifier/filter 27 which is associated with line 2 is
connected to the second and sixth input of multiplexer
33, and the output of rectifier/filter 28 which is
associated with line 3 is connected to -the third and
seventh input of multiplexer 33.
-25-
The analog outputs of the selectable gain
amplifier 35a and the analog output of the operational
amplifier 9 are coupled to one input of a comparator 37a.
The signal available at the comparator 37a is determined
by the contents of latch 39. A logic level 1 output
from comparator 37a signifies that the analog outpu-t o-f
the digital-to-analog converter 38 is more -than the
measured value input to the compara-tor 37a. A logic level
zero output from the comparator signifies that the analog
output from the digital-to-analog converter 38 is less
than the measured signal. The output of the comparator
37a is connected to a successive approxima-tion program
located in processor 1 which adjusts the digital output
fed to the digital-to-analog converter 38 so that the
analog value output from the digital-to-analog converter
which is fed to one input of the comparator, approaches
the measured analog values input to -the other input of the
comparator 37a. A selectable gain amplifier 35a provides
two sets of phase currents, one being the high gain phase
currents having a range of zero to 195% full load curren-t
which are used for phase unbalance and overload calculations,
and the other being the low gain phase current which provide
full range measurements of zero to 152 times full load
current and are used for instantaneous overcurrent and
overload protection. The 16 inputs are stored in the
resident data memory of processor 1.
Phase reversal information is provided by the
output of NAND gate 64 to processor 1. Two flip-flops
58 and 59 are used. Flip-flop 58 is clocked by line 2
and steered by the other two lines (Ll and L3) while
flip-flop 59 is clocked by line 3 and steered by the other
two lines (Ll and L2~. Should the phase sequence reverse
the flip-flops 58 and 59 will no longer stay in the proper
state (which results in a logic level "0" output from NAND
gate 64), rather the output of NAND gate 64 will go high
indicating a phase reversal.
-26-
The software used b~ -the motor protection device
will now be discussed. The software for the motor
protection device is organized in -the Eollowing -functional
categories:
1. Current and Temperature Inputs~
2. Keyboard and Display ~'unctions.
3. Protection E'unc-tions.
4. Annunciator, Alarm and Trip Outputs.
5. General Purpose Subroutines.
Each of these functional categories is broken down into
several program subroutines. The current and temperature
input related functions are organized in the following
categories:
1. Analog to digital (A/D) conversions (ANALOGI).
2. The maximum value of phase currents (MAXLOG).
3. The maximum values of RTD temperatures (MAXRTD).
The A/D conversion of the sixteen current and
temperature inputs is performed by the successive
approximation method. Each analog input signal is selected
for the A/D conversion as previously described. After
performing the A/D conversion, the digital data is
stored into the assigned data memory (RAM) location in
the resident data memory of processor 1. After each
RTD input signal is selected, time delay of 0.016 second
is required before the A/D conversion can be performed.
To satisfy this requirement, the program is executed once
every 0.016 second time interval.
The following scale is used in storing the 16
temperature and current inputs.
.
3~
-27-
INPUT
NUMBER INPUT DATA SCALE
1 WINDING RTDl TEMP. 1.28 COUNT=1C
2 WINDING RTD2 TEMP. ].28 COUNT=1C
3 WINDING RTD3 TEM~. 1.28 COUNT=1C
4 WINDING RTD4 TEMP. 1.28 COUNT=1C
WINDING RTD5 TEMP. 1~28 COUNT=l~C
6 WINDING RTD6 TEMP. 1.28 COUNT=1C
7 BEARING RTDl TEMP. 1.28 COUNT=1C
8 ~EARING RTD2 TEMP. 1.28 COUNT=1C
9 PHASEl CURRENT (~IGH GAIN) 128 COUNTS=5A
PHASE2 CURRENT (HIGH GAIN) 128 COUNTS=5A
11 PHASE3 CURRENT (HIGH GAIN) 128 COUNTS=5A
12 GROUND FAULT CURRENT 255 COUNTS=lA
13 PHASEl CURRENT (LOW GAIN) 16.7 COUNTS=5A
14 PHASE2 CURRENT (LOW GAIN) 16.7 COUNTS=5A
PHASE3 CURRENT ~LOW GAIN) 16.7 COUNTS=5A
16 INSTANTANEOUS OVERCURRENT 16.7 COUNTS=5A
A digital filter is provided by the software for
the maximum value of the low gain phase current inputs.
The new maximum value can only be a few counts higher or
lower than the old maximum value, i.e.,
OLD MAX. - 4 COUNTS < NEW MAX. < OLD MAX. + 4 COUNTS
To provide this digital filter, the maximum value of
phaseCurrents ~MAXLOG) program is executed once every
0.016 second interval.
The device uses the maximum values of the winding
and the bearing RTD temperature inputs to provide protection
functions, rather than individual RTD temperatures.
Digital filters are provided for the maximum values of
the winding and the bearing RTD temperatures so that:
OLD MAX - 1 COUNT < NEW MAX ~ OLD MAX -~ 1 CO~NT
To provide these digital filters, the maximum values of
RTD temperatures (MAXRTD) program is executed once
~3'{3~
-28-
every 0.25~ second interval. The user stores the number
of winding RTD's used in Eunction No. 15 and the number
of bearing RTD's used in Function No. 16. This information
is used to determine the maximum RTD -temperatures. The
l~AXRTD program also determines the following modes of
operation.
1. No windlng RTD's (NOWRTD).
2. Open winding RTD (OPNWND).
3. Open bearing RTD (OPNBRD).
Each mode is represented by one bit message called a flag.
A logic level 0 means that the message is false. A logic
level 1 means that the message is true. Referring now to
FIG. 4 the MAXRTD flow chart is shown. The first block
of the MAXRTD flow chart is decision block 100. Here a
check is made to see if the trip test flag (TRIPT) is equal
to 1. If the flag is equal to 1, it would mean that a trip
test is being conducted. If the flag is equal to zero,
then a trip test is not being conducted. If a trip test
is going on, then block 100 is connected to node 120 at
the end of the MAXRTD program since no bearing or winding
input calculation is to be made. Winding temperatures
will be simulated elsewhere for test purposes. If a trip
test is not going on, then block 100 is connected to
subroutine block 101 which sets the no winding RTD flag
(NOWRTD), open bearing flag (OPNBRG) and the open winding
flag (OPNWD) ali equal to 0. Block ]01 is connected to
the maximum bearing temperature (MAXBRG) subroutine block
10~. Block 102 is shown in greater detail starting with
subroutine block 103. In block 103 N is set equal to the
number of RTD's selected by the user, A is set equal to
the maximum of winding RTD's and the decrement flag (DECPMT)
is set equal to 1. Block 103 is connected to decision
block 104 where if no winding RTD's were selected to be
monitored by the user, block 104 is connected to sub-
routine 105. Block 105 sets the no winding RTD flag
3~ 33~3~
-29-
equal to 1 or, in o-ther words, -true. Block 105 is connected
to node 117. If the number of winding RTD's selected by
the user is not equal to 0, then block 104 is connected to
subroutine block 106 which sets M equal to 1 and count
equal to 1. Block 106 is connected -to loop connec-ting
node 107. Node 107 is connected to condition block 108.
The Mth RTD is checked to see if it is equal to 199.22 C
(2S5 Counts) and if the Mth RTD is e~ual to 199.22C, i-t is
open. If the RTD is open, block 108 is connected to
subroutine block 109 which sets the open winding RTD flag
(OPNWND) equal to 1. Block 109 is connected to decision
connecting node 110. If the Mth RTD is not open, then
block 108 is connected to condition block 111. Condition
block checks if the Mth RTD is greater than the previous
maximum RTD. If this condltion is true, then block 111 is
connected to subroutine block 112. Block 112 sets the
decrement flag (DECP~T) equal to 0 and if COUNT is not
equal to 0 then the previous maximum RTD is increased by
one count and count is set equal to 0 to allow only one
decrement for each check of N winding RTD's. Block 112
is connected to node 110. If the condition of block 111
is false, then block 111 is connected to subroutine block
1130 In bloc]c 113 if the Mth RTD is equal to the previous
maximum, then the decrement flag is set equal to 0. Block
25 113 is connected to node 110. Node 110 is connected to
subroutine block 114. The RTD to be checked is increased
by one and the number of RTD's to be checked is decreased
by one. Block 114 is connected to condition block 115.
Block 115 checks if all the RTD's have been checked.
If there are RTD's left to be checked block 115 is
connected to node 107. If all the RTD's have been checked
block 115 is connected to condition block 116. In block 116
the decrement flag is checked to see whether or not it has
been set to 0. If the flag has been set to 0, then the
previous maximum winding RTD has been incremented and block
3q~3~
-30-
116 is connected to node 117 at the end of the MAXWND
subroutine. If the decrement flag is equal to 1, then the
N RTD's checked were not equal to or greater than the
previous maximum. Block 116 is connected to subrou-tine
block 118. In block 118 if the previous maximum winding
RTD is not 0, lt is reduced by one count. Block 118 is
connected to node 117.
Node 117 is connected to subroutine block 119.
Block 119 contains the maximum bearing RTD (MAXBRG)
subroutine which is similar to the maximum winding subroutine
just described. Block 119 is connected to node 120
at the end of the maximum RTD program.
The Keyboard and Display Functions will now be
discussed. The primary function of the 16-key keyboard
and the numerical displays (Function and Value) is to enable
the user to store the motor and system data (setpoints)
into RAM 44. However, using the keyboard, various measure
currents and temperatures are also displayed. The
functions performed are organized in the following three
programs:
1. Receive commands and data from the keyboard (KYBORD).
2. Prepare Function and Value data for display (UPDART~.
3. Display the Function and Value data (DISPLY).
The user gives a command using one of the six
command keys (Function, Value, Store, Scan, Reset, and
Display). The user enters a digit using one of the ten
number keys (0 to 9). The KYBORD program is executed once
every 0.016 second interval to help provide adequate time
delay for a bouncing key. Two successive key closure
detections, 0.016 second apart, are required before a key
entry is accepted. Also two successive key release
detections, 0.016 second apart, are required before a
new key entry is accepted.
The Prepare Function and Value Data for Display
tUPDATE) program will now be discussed. Depending on
which mode of operation is selected by the user using the
-31-
keyboard, this program determines what data should be
displayed. When the scan mode is selected (SCAN = 1),
function numbers 1 to 11 are selected for display at
regular interval of 4 seconds. Of course, the unused
~TD temperatures are skipped in this process. Depending
on which function number is selected, corresponding value
data is prepared for the display. When any one of the
RTD temperature function numbers (0 to 8) is selected,
the corresponding value da-ta prepared for display is in
C. When any one of the three phase current function
numbers (9, 10, 11) is selected, the corresponding value
data prepared for display is in percent of full-load
current (FLC). When the ground fault current function
number 12 is selected, the value data prepared for
display is in the percent of the ground fault trip
current.
The values stored in the user data memory RAM
44 for the setpoints (Functions 15 -to 29) are in binary.
When one of the setpoin-t function numbers is selected,
the corresponding value data prepared for display is in
the three digit BCD value. The function number data
prepared is two BCD digits and the value data prepared
is three BCD digits. The UPDATE program is executed
once every 0.256 second. The three minutes display
timer is decremented once every second.
The Display the Function and Value Data (DISPLY)
program sends the function and the value data for display.
This program is executed once every 0.016 second interval.
If the flashing display mode is active (FLASH = 1), the
flashing display is generated. If the three minutes
display timer has timed-out, the display is blanked.
The leading zeros in the function number and -the value
data are blanked, i.e., instead of 01, 1 is displayed.
Whenever the user stores a setpoint (Functions 15
to 29), a set of constants is calculated based on the data
stored by the user. These calculated constants are then
~.8~331~
-32-
stored in the RAM 4~.
The constants must be stored at this -time since
the write enable line of RAM 44 can only be enabled
externally by the enter switch.
The following pro-tection functions are per~ormed:
1. Overload/Overtemperature protection (CUTEMP, OVRLOD).
2. Bearing Overtemperature protection (OVTBRG).
3. Ground fault protection (GFAULT).
4. Phase Unbalance protection (P~IAUNB, PUNBAL).
5. Phase Reversal protection (PHAREV).
6. Instantaneous Overcurrent protection (INSTOC).
The necessary ~unctions to provide the overload/
overtemperature are organized in the following two programs.
1. Calculations for the copper winding temperature (CUTEMP).
2. Determination of Overload Alarm and Trip conditions (OVRLOD).
Two separate calculations for the copper-winding
temperature (CUTEMP) are made depending on whether winding
RTD's are used or not.
When the winding RTD's are used, -the calculations
are based on the RTD model and when the winding RTD's are not
used, the calculations are based on the non-RTD model. When
the winding RTD's are not used, the user stores 0 into
Function 15 which in turn selects the non-RTD model. Other-
wise, the RTD model is selected. The copper temperature
calculations assume Class B insulation, i.e., the trip
temperature of 180C. The CUTEMP program is executed
once every 0.256 second. One data memory (RAM) location
in the processor contains the RTD temperature
(1.28 count = 1C) which is used to calculate the copper
temperature. When the winding RTU's are used~ this
temperature is the maximum of the winding RTD temperatures,
otherwise, it is the calculated RTD temperature.
When the winding RTD's are used, the model shown
in FIG. 5 is used. FIGURE 5 has a current source 125
equal to KIm connected to a node 126. A maximum RTD
'3~
-33-
value 127 is connected to an input. of amplifier 128.
A resistor 129 is connected between node 126 and the
output o~ ampll~ler 128. A capacltor 131 ls connected
between node 126 and ground. Amplifier 12~ provides a
current path to ground. ~ constant current source 132
is connected to a node 133.
The output of amplifier 128 is proportional to
the maximum RTD winding temperature. The voltage at node
126 is proportional to the motor copper winding temperature.
dCU CT - RTD
10 I = KIM = C +
dt R
Where
K is a constant
IM is the maximum value of the phase currents, ln per unit
(R~U.)~
CU is the copper winding temperature
RTD is the maximum winding RTD temperature.
RC is the thermal time constant between the copper windings
and the RTD.
If we apply the boundary condition:
CU = CUO when t = O
where CUO is the previous value of copper winding temperature
when we have the solution.
-t/RC -t/RC
CU = (KRIM + RTD) (l-e) + e CUO
To simplify this formula, the following two assumptions are
made:
1. t = 0.256 second
This implies that the copper temperature calculations
are made every 0.256 second.
2. RC = 65.4 seconds
The RC time-constants for many motors is between 30 to
s~
60 seconds. So -this time constant will slightly over
protect the motor.
Substituting these values into the copper tempera-ture
~ormula/ we get: 2
CU = KRIM + RTD) /256 -~ 0.996 C~O
This formula i~ used -to calcula-te the present value
of the copper -temperature (CU) from the previous value of
the copper temperature (CUO) during an overload condition.
When the maximum value of the phase currents (IM) is equal
to or greater than 1.95 P.U. ~195~ FLC) it is defined
as the overload condition. For the lesser value of -the
current, it is defined as the steady-state condition. The
constant KR in the copper temperature formula is called
the RTD model calibration constant.
The user stores, in Functions 20 and 21, the
value of loc~ed-rotor current and the stall time
respectively. The value of the calibration constan-t is
determined ~ased on this information using the following
formula for Class B insulation:
KR = (80 + 8871/STALL TIME) / (LOCKED ROTOR CURRENT)
When the maximum phase current (IM) is less -than
1.95 P.U. (195% FLC), it is defined as the steady-state
condition for the RTD model. For this condition, the
copper temperature formula is modified as follows:
CU = (10 IM + RTD) /256 + 0.996 CUO
This gives the copper temperature a few degrees
(0 to 19C) higher than the RTD temperature during the
steady-state conditionO This modification of the original
copper temperature formula prevents nuisance tripping
during moderate overloads and cyclic loading. In this
region of operation, the device relies on the RTD
temperature to cause a trip.
';3~
~35-
When the winding RTD's are not used, the Eollowing
three calculations are involved wi-th the non-RTD case:
1. The RTD temperature.
2. The copper temperature Eor overload.
3. The copper temperature for steady-state.
Since the winding RTD's are not used, the RTD
temperature is calculated based on the motor current (IM).
Every 65 seconds, a new value of the RTD temperature is
determined which is either 2.34C higher or 0.78C lower
than the previous value of the RTD temperature.
One data memory (RAM) location in the processor
is used to determine 65 seconds time interval (0.256 second
per count). One reference temperature (REFTMP) is calculated
using the following formula:
REFTMP = 40C + (IM %FLC)/2.56C
or
REFTMP ~ (105 -~ IM ~FLC)/2 counts
Where
0 ~ IM %FLC ~ 100
If the reference temperature is lower than the previous RTD
temperature then the new RTD temperature is 0.78% lower,
otherwise, it is 2.34C higher than the previous RTD
temperature.
The user stores in Function 27 a value (100 to
120%) of ultimate trip current. This value of the ultimate
trip current is used to define an overload or a steady-
state condition.
When the maximum value of the motor current
(IM) is equal to or greater than the ultimate trip
current, it is considered as an overload condition.
Otherwise, it is considered a steady-state condition.
For this non-RTD model overload condition, simple I t
curves are yenerated using the following formula:
`;3~
-36~
CU = (KR IM + RTD)/256 ~ CUO
Where
CU is the calculated copper temperature.
CUO is the copper temperature at t=o,
IM is the maximum value of the motor current,
RTD is the calculated RTD temperature.
KR is the calibration constant, given by -the formula,
KR = (8960/STALL TIME)/(LOCKED ROTOR CURRENT)
The user selects the value (1.0 to 1.2 P.U~) of
ultimate trip current using Function No. 27. When the
maximum phase current (IM) is less than the selected
ultimate trip current, it is defined as the steady-state
condition. For this condition, the copper temperature
formula is modified a~ follows:
CU = (10 x IM + RTD)/256 -~ 0.996 CUO
Note that this is -the same formula as the RTD model for
the steady-state condition.
The following two programs determine the over-
load alarm and trip conditions (OVRLOD):
1. The Copper Temperature Alarm and Trip (OVLCUT).
2. The Winding RTD Temperature Alarm and Trip (OVLWND).
The Copper Temperature Alarm and Trip (OVLCUT)
program will now be discussed. A data memory (RAM)
location of processor contains the value of calcula-ted
copper temperature in C.
The trip temperature is 180C.
The alarm temperature is 170C.
The reset temperature is 165C.
Two one bit flags, CUTALM and CUTTRIP, are used to reflect
the determined alarm and trip conditions respectively. If
there is the alarm condition, the CUTALM bit is set
(CUTALM = l); otherwise it is cleared (CUTALM = 0). If
there is the trip condition, the CUTRIP bit is se-t
(CUTRIP = 1); otherwise it is cleared (CUTRIP = 0).
3~3~
The Winding RTD Temperature Alarm and Trip
(OVLWND) program has a data memory (RAM) location in
processor that contaiIIs -the RTD temperature (1.28 coun-t =
1C). Depending upon whether the winding RTD's are used
or not, this temperature is either the ma~imum -temperature
of the winding RTD's or the calculated RTD temperature
respectively.
Function 17 contains the value of winding RTD
trip temperature (20 to 155C). Based on this information,
the winding RTD trip temperature counts (WRTDT):
WRTDT = 1.28 x (Function 17)
are calculated and stored into RAM ~ by the KYBORD program
at the time when the user stored the setpoints. The trip
temperature constan-t WRTDT and the RTD tempera-ture in the
RA~ in this processor have the same scale (1.28 count = 1C).
This makes it easier to compare them and determine the alarm
and trip conditions.
The trip temperature = WRTDT counts
The alarm temperature = (Trip Temperature - 10C).
= (WRTDT - 13) counts
The reset temperature = (Trip Temperature - 15C).
= (WRTDT - 19) counts
There are two one bit flags, WNDALM and WNDTRP, which
are used to reflect the determined alarm and trip conditions
respectively. If there is the alarm condition, the
WNDALM bit is set (WNDALM = 1): otherwise it is cleared
(WNDALM = O).
The Beariny Overtemperature Protection (OVTBRG)
uses a data memory (RAM) location in processor that contains
the maximum temperature of the bearing RTD's (1.28 count =
1C). For the comparison purpose this temperature is
converted in to C by dividing the counts by 1.28. Function
18 contains the bearin~ RTD trip temperature (20 to 155C).
The alarm temperature = The trip temperature - 10C.
The reset temperature = The trip temperature - 15C.
-38-
There are two one bit flags, BRGALM and BRGTRP,
which are used to reflect the determined alarm and trip
co.nditions respectively. If there is the alarm condition,
the BRGALM bit is set (BRGAL.M = l); otherwise, it is
cleared (BRGALM = 0). The beariny alarm condition caused
by an open bearing RTD (OPNBRG) is determined by the
OUTPUT program.
The Ground Fault Protection (GFAULT) program
uses a data memory (RAM) location in the processor which
contains the measured value of the ground fault current
(255 counts = 1 Amp). The Function 24 contains the ground
fault trip current in % of 1 Amp. Multiplying this value b~
2.55, we get the ground fault trip current in counts. 76%
of the trip value is the ground fault alarm current. The
ground fault reset current is 4 counts less than the ground
fault alarm current.
There are two one-bit flags, GFALRM and GFTRIP,
which are used to reflect the determined alarm and trip
conditions respectively. If there is the alarm condition,
the GFALARM bit is set (GFALRM = l); otherwise, it is
cleared (GFALRM = 0).
If there is the trip condition, it is necessary
that the trip condition must exist at least for the time
interval (time delay) selected by the user in Function 25.
To determine this time delay one data memory (RAM) location
in the processor is used as the ground fault timer (GFTIME: 1,
count = 0.016 second). After the ground fault time delay,
if there is the trip condition, the GFTRIP bit is set
(GFTRIP = l); otherwise, it is cleared (GFTRIP = 0).
The phase unbalance protection functions are
organized in the following two programs:
1. Phase unbalance calculations (PHAUNB).
2. Phase unbalance alarm and trip (PUNBAL).
Calculations are made to calculate the phase unbalance
level (V):
O _ V _ 255
3~
-39-
which will be used to determine the phase unbalance alarm
and trip conditions. One data memory (RAM) location in -the
processor is assigned to store the calculated phase
unbalance level (V). At the time of the system
initialization (power-up/reset), V = 0 is stored.
The PH~UNB program is executed once every 0.256
second.
1. The minimum value of -the three phase currents (IMIN) is
found.
If the IMIN ~ 150% FLC then there is no phase unbalance.
Then the value of V is decremented by 1 count and no
further calculations are made for V.
If this situation prevails for some time, V will decrease
from 255 to 0 in about 255 x 0.256 = 65 seconds.
2- If the IMIN ~ 150% FLC, then the maximum value of
the three phase currents ~IMAX) is found.
If IM~X > 150Po FLC then IMAX = 150% FLC is assumed.
3 The phase difference ( IMAX MIN
4. The normalized phase unbalance (U) is determined by
the following formula.
U = (IMA~ - IMIN) x K
Where
K = (100/FLC)/(PHASE UNBALANCE SETPOINT)
5. If U > 1 then it is defined as the phase unbalance
condition, otherwise it is not unbalance condition.
6. If there is the phase unbalance condi-tion then
V = V ~ u2 (1 ~ u2 255)
7. If there is no phase unbalance condition (U ~1), then
the phase unbalance reference level (REFLEV) is
calculated by the following formula:
REFLEV = 256 x U
8. If REFLEV ~V then the value of V is decremented by 1 count.
9. If REFLEV ~V then the value of V is incremented by 1 count.
3~
-40-
V = 255 counts is defined as the phase unbalance trip level.
When there is a phase unbalance condition (1 ~ U ~ 15),
i.e., the measured phase unbalance is equal to or greater
then the selected phase unbalance trip current in Function
23; then the phase unbalance trip characteristic can
approximately be represented by the following formula:
Trip-Time t = 64/V where 1 ~ U ~ 15.
When there is no phase unbalance (0 ~ U ~ the phase
unbalance level V will reach the level given by the
following formula:
V = 256 x W where 0 ~ U C
To reach this level, the value of V is incremented or
decremented only by 1 count per 0.256 second.
Referring to FIGURE 6 the flow chart for the Phase
Unbalance Calculations (PHAUNB) is shown.
The first subroutine block 135 of the flow chart
is to set A equal to 150~ of fuil load current. Block
135 is connected to subroutine block 136. Block 136
sets B equal to the minimum value of the three high gain
phase currents. Block 13~ is connected to condition block
137. Block 137 checks if B is greater than or equal to A.
If B is greater than or equal to A then there is no phase
unbalance and block 137 is connected to subroutine block
138 which reduces V by one count if it is not already 0.
Block 138 is connected to node 139 at the end of the
phase unbalance calculation program. If B is not greater
than or equal to A, then block 137 is connected to sub-
routine block 140. Blcok 140 contains the phase maximum
subroutine which is shown in greater detail in the Figure
starting with subroutine block 141.
In block 141, C is set equal to the maximum
value of the three high-gain phase currents. Block 141
is connected to block 142. If the maximum value of the
three high gain phase currents is greater than 159~ of full
load current (FLC) then the maximum value of the three high
g~3~¢~
gain currents is se-t equal -to 150~ FLC. Block 142 is
calculated as equal to the maximum of the three high
gain currents minus -the minimum of the phase currents
divided by the unbalance current trip point. The
unbalance current trip point is determined by multiplying
the percent phase unbalance stored hy the user by the
full load current.
Block 143 is connected to condition block 144.
If U is greater than or equal to 1, then block 144 is
connected to subprogram block 145. In block 145, V is
set equal to U . Block 145 is connected to subroutine
blocks 146 and 147 where, if V is greater than 255, V
is set equal to 255. Block 147 is connected to node 139.
If U is not greater than or equal to 1, then block 144
is connected to subroutine block 149. Block 149 sets
~ = 1 and R equal to 256 multiplied by U. Block 149
is connected to condition block 150. ~lock 150 checks if
R is equal to 0. If R is equal to zero, then block 150 is
connected to block 151. Block 151 lowers V by one count
if it is not already 0 since there isn't any phase
unbalance. Block 151 is connected to node 148. If R
if not equal to 0, then block 150 is connected to
condition block 152. Block 152 checks if R is less
than V; then block 152 is connected to subroutine block
153. Block 153 reduces V by one count if it is not
already 0. If R is not less than V, then block 152
is connected -to block 154. Block 154 increments V by
one cou~nt. If V is greater than 255, then V is set equal
to 255. Block 154 is connected to node 139.
The phase unbalance alarm and trip conditions
(P~NBAL) are determined by checking the phase unbalance
level (V) stored in the data memory ~RAM) and the
process unbalance level (V) stored in the data memory
(RAM) in the processor.
~B~
-~2-
V = 255 coun-ts is the trip level.
V = 171 counts is the alarm level.
(The alarm level is 67% of the trip level~
V = 12~ is the reset level.
The phase unbalance trip characteristics is shown in FIGURE
7. Two one bit flags, PUALRM and PUTRIP, are used to reflect
the determined alarm and -trip conditions respectively.
If Function 23 contains the disable phase unbalance
protection code (99), then both the flags are cleared
(PUALRM = O and PUTRIP = O). Then neither the alarm nor
the trip will take place. If the disable code (99) is not
stored, then the alarm and trip conditions are determined.
If there is the alarm condition, the PUALRM bit is set
(PUALRM = l); otherwise it is cleared (PUALRM = 0). If
there is the trip condition, the PUTRIP bit is set
(PUTRIP - l); otherwise it is cleared (PUTRIP = 0).
The user has an option to select the phase
reversal protection. When the phase reversal protection
is selected, the enable code (23 is stored in Function 26.
To disable this protection, the disable code (1) is stored.
As described previously, the phase reversal condition
is detected (Tl = 1) or not (Tl = 0) by the hardware. The
phase reversal trip condition is said to exis-t when
"the phase reversal Input Tl = 1 and -the maximum value
the the three phase currents is at least 50% FLC" for
0.24 second. To determine this 0.24 second time delay,
one data memory (RAM) location in the processor is used
as the phase reversal timer. Presetting this timer to
15 counts (0.016 seconds per count) generates the
required time delay of 0.24 second. One one-bit flag:
PRTRIP is used to reflect the determined trip condition.
There is no alarm condition for this protection function.
PRTRIP = 1 for the trip condition.
Instantaneous Overcurrent Protection (INSTOC)
uses one data memory location in the processor
3~J~
-~3-
which contains the measured value of the instantaneous
overcurrent in counts (16.7 counts = 5 Amp).
Function 22 contains the trip value (3 x 20 x FLC)
selected by the user. ~ased on this data, the
instantaneous overcurrent trip value in counts (IOCTRP):
IOCTRP = (Function 22) x (Function 19)/6
is calculated and stored by the K~ORD program at the -time
when the user stored the setpoints. Thus, the IOCTRP and
the measured value both have the same uni-ts (16.7 coun-ts =
5 Amp). So it is easier to compare them to determine the
trip condition. One one~bit flag IOCTRP is used to reflect
the determined trip condition. IOCTRP = 1 for the trip
condition. There is no alarm condition for this protection
function.
The Annunciator, Alarm and Trip Outputs (OUTPUT)
program prepares and sends to Latch ~8, the fault indicator
signals, the annunciator alarm and the alarm and trip
rela~ signals.
There are six fault indicator signals:
1. OVERLOAD
2. BEARING
3. GROUND FAULT
4. PHASE UNBALANCE
5. PHASE REVERSAL
6. OVERCURRENT
When any of these signals is logic 1, the corresponding light
turns on; otherwise, it turns off. To provide the flashing
indicator ~or an alarm condition, logic 1 is maintained for
half-second and logic 0 is maintained for half-second.
During a trip condition, the indicator stays on.
OVERLOAD_Signal reflects the following five conditions:
1. OPNWND: Open winding RTD alarm condition.
2. WNDALM: Alarm condition due to the winding RTD temperature.
3. CUTALM: Alarm condi-tion due to the calculated copper
temperature.
~. WNDTRP: Trip condition due to the winding RTD temperature.
3~
-4~-
. CUTRIP: Trip condition due to -the calculated copper
temperature.
BE~RING Signal reflects the following three conditions:
1. OPNBRG: Open bearing RTD alarm condition.
2. BRGALM: Alarm condition due to the bearing RTD
temperature.
3. BOTTRP: Trip condition due to the bearing RT~
temperature .
GROUND FAULT Signal reflects the following two conditions:
-
1. GFALRM: Alarm condition due to the ground fault current.
2. GFTRIP: Trip condition due to the ground fault current.
PHASE UNBALANCE Signal reflects the following -two conditions:
1. PUALRM: Alarm condition due to the phase unbalance.
2. PVTRIP: Trip condition due to the phase unbalance.
PHASE REVERSAL Signal reflects the trip condi-tion due -to the
-
phase reversal (PRTRIP).
OVERCURRENT Signal reflects the trip condition due to the
instantaneous overcurrent (IOCTRP).
There are following two signals for the relay drivers.
1. ALMPLS: For the alarm relay.
2. TRIP: For the trip relay.
The ALMPLS signal reflects on alarm condition due to any of
the protec-tion function. During an alarm condition this
signal is maintained logic 1; otherwise, this signal is
pulsing. This arrangement provides -the watchdog timer type
action for alarm relay. The TRIP signal reflects a trip
condition (TRIPF) due to any of the protection functions.
When this signal is logic 1 the trip relay will assume the
trip state provided that the trip relay state-change-permit
signal (P24) is logic 1 too. During the inactive mode
(Fl = 1) the change in the state of the trip relay is not
permitted. However, during the trip test (TRIPT = 1), the
change in the state of the trip relay is permitted.
Referring to FIGURE 8, the program for the
processor one is organized into the following main modules:
3~!~
-45-
l. The Rese-t program (RESET) 156.
2. The Loop program (LOOP) 157.
3. The Timer Interrupt Program (TMRINT) 158.
At the time of the system initialization, -the program control
vectors to the beginning of the Reset program. The end of
the Reset program marks -the beginning of the Loop program.
The Loop program is a program-loop.
At fixed intervals of 0.16 seconds a timer interrupt
is generated to perform some time dependent functions. The
execution of the Loop program is momentarily interrupted and
the program control vectors to the beginning of the Timer
Interrupt program. The program control returns back to the
Loop program at the end of the execution of the Timer
Interrupt program. The program control stays with the Loop
program until the next Timer Interrupt is generated.
The Reset program performs the followin~ functions:
1. Clears the interval data memory of the processor.
Contents of the processor RAM are lost on power loss.
2. Presets the display timer to 3 minutes. The display
timer is used to determine 3 minutesof active display
time for the function and the value data display. One
internal data memory location of the processor is used
as this timer.
3. Presets the value of the maximum temperature of the
winding RTD's equal to 40C. One internal data memory
location of the processor is used to store this value.
4. Preset the value of the calcula-ted copper temperature,
which is used to provide the overload protection, to 85C.
5. Starts the internal hardware timer which is used to
provide timer interrupts.
THE LOOP PROGRAM
(LOOP)
The Loop program performs the following functions:
l. Sends command to permit timer interrupt. Without this
command the timer interrupt will not be ~enerated.
(EN TCNTI)
3~
-46-
2~ Checks for the ground faul-t alarm and trip conditions.
Prepares messages to reflect present conditions,
(GFAULT)
3. Checks for the phase reversal trip conditions. Prepares
a message to reflect present condition.
(PHAREV)
Checks for the phase unbalance alarm and -trip conditions.
Prepares messages to reflect present conditions.
(PUNBAL)
5. Checks for the instantaneous overcurrent trip
condition. Prepares a message to reflect present
condition.
~INSTOC)
6. Checks for the overload alarm and trip conditions due to
the calculated copper temperature. Prepares messages to
reflect present conditions.
(O~LCUT)
7. Checks for the overload alarm and trip conditions due to
the maximum of winding RTD temperatures. Prepares
messages to reflect present conditions.
(OVLWND)
8. Checks for the bearing overtemperature alarm and trip
conditions. Prepares messages to reflect present
condition.
(OVTBRG)
9. Checks for the Identification Number stored in the external
data memory. Sets present ACTIVE/INACTIVE condition.
(IDNMBR)
10. Prepares and send s the following output data reflecting
present conditions:
a. The six LED outputs.
b. The alarm relay output.
c. The trip relay output.
(OUTPUT)
3~
-47-
TIMER INTERRUPT PROGRAM
(TMRINT)
The Timer Interrupt program performs the following func-tions:
1. Sends command to select the reyisters of Bank 1. The
Timer Interrupt program uses the working registers of
Bank 1 while the Loop program uses the working registers
of Bank 0 to prevent their interference with each otherO
(SEL RBl)
2. Saves present accumulator data, being used by the Loop
program, into one internal data memory (RAM) location
of the processor. Restores this data back to accumulator
at the end of the Timer Interrupt. Thus, the accumulator
content will be the same before and after the Timer
Interrupt program.
3. Presets the hardware timer to have next timer interrupt
every 0.016 second. This results in having timer
interrupt every 0.016 second.
4. Updates, every 0.016 second, the ground fault timer which
is used to generate the ground fault trip time delay.
One internal data memory (RAM) location of the processor
is used as the ground fault timer.
(GFTIME)
5. Updates, every 0.016 second, -the phase reversal timer
which is used to generate the phase reversal trip time
delay. One internal data memory (RAM) location of the
processor.
(PRTIME).
6. Converts, every 0.016 second, the analog inputs to
digital data and stores them into the internal data
memory (RAM) of the processor.
(ANALOGI)
7. Determines, every 0.016 second, the maximum of the three
low gain phase currents input data and stores it into one
internal data memory (RAM) location of the processor.
(MAXLOG)
8. Generates one, 0.016 second time base, clock to determine
various times such as 1~4 second/ 1 second etc. One
internal data memory (RAM) location is used as this clock.
tCLOCK)
9. Updates, every 1.024 second, the display timer which is
used to determine 3 minu-tes of active display time for
the function and the value data display. one internal
data memory (RAM) location is used as this timer.
(ONESEC)
10 10. Performs, every 0.256 second, caLculations to determine
present value of the copper temperature which is used
to provide overload protection.
(CUTEMP)
11. Prepares, every 0.256 second, the function and the value
data to be displayed.
(UPDATE)
12. Determines, every 0.256 second/ the maximum temperatures
of the winding RTD's. Prepares messages to reflect open
RTD.
MAX~TD)
13. Performs, every 0.256 second, calculations -to provide the
trip characteristics for the phase unbalance protection
(PHAUNB)
14. Performs, every 0.016 second/ the keyboard service
functions~
(KYBORD)
15. Prepares and sends, every 0.016 second, data for the
function and the value display
(DISPLY)
3Q While the present invention has been described with
reference to a specific embodiment thereof it will be obvious
to those skilled in the art that various changes and
modifications may be made without departing from the invention
in its broader aspects.
