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Sommaire du brevet 1181870 

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  • lorsque la demande peut être examinée par le public;
  • lorsque le brevet est émis (délivrance).
(12) Brevet: (11) CA 1181870
(21) Numéro de la demande: 1181870
(54) Titre français: DISPOSITIF DE PROTECTION POUR CIRCUIT INTEGRE
(54) Titre anglais: INTEGRATED CIRCUIT PROTECTION DEVICE
Statut: Durée expirée - après l'octroi
Données bibliographiques
(51) Classification internationale des brevets (CIB):
  • H01L 27/04 (2006.01)
  • H01L 29/74 (2006.01)
(72) Inventeurs :
  • AVERY, LESLIE R. (Etats-Unis d'Amérique)
(73) Titulaires :
  • RCA CORPORATION
(71) Demandeurs :
  • RCA CORPORATION (Etats-Unis d'Amérique)
(74) Agent: ROLAND L. MORNEAUMORNEAU, ROLAND L.
(74) Co-agent:
(45) Délivré: 1985-01-29
(22) Date de dépôt: 1982-03-22
Licence disponible: S.O.
Cédé au domaine public: S.O.
(25) Langue des documents déposés: Anglais

Traité de coopération en matière de brevets (PCT): Non

(30) Données de priorité de la demande:
Numéro de la demande Pays / territoire Date
249,612 (Etats-Unis d'Amérique) 1981-03-31

Abrégés

Abrégé anglais


INTEGRATED CIRCUIT PROTECTION DEVICE
ABSTRACT OF THE DISCLOSURE
Disclosed is a protection circuit which may be
used, for example, in a television receiver to protect
circuitry formed within an integrated circuit from damage
due to excessively high voltage transients. The protection
circuit comprises a PNPN structure forming a silicon
controlled rectifier (SCR) and metal-oxide-semiconductor
(MOS) transistor integral to the SCR structure. The SCR
and the MOS transistors are arranged to form a two terminal
protection circuit which is rendered conductive when the
potential difference across the two terminals is greater
than a predetermined threshold. One terminal of the
protection circuit is connected to an input or output signal
terminal of the protected circuit, and the other terminal
is connected to a reference terminal to which a reference
potential such as ground potential is applied. Transient
voltages appearing at the integrated circuit terminal greater
than the predetermined threshold voltage causes the protection
circuit to conduct current, thereby dissipating the energy
of the high voltage transient and protecting the integrated
circuit from damage. In one embodiment, the gate electrode
of the MOS transistor is connected to the reference terminal,
and in another to the signal terminal. The latter connection
provides a much larger predetermined threshold voltage than the
former, and typically considerably in excess of the supply
voltage.

Revendications

Note : Les revendications sont présentées dans la langue officielle dans laquelle elles ont été soumises.


CLAIMS:
1. A semiconductor protection circuit comprising:
a semiconductor substrate of a first conductivity
type;
a semiconductor layer of a second conductivity
type disposed on said substrate, said semiconductor layer
having a surface;
first and second semiconductor regions of said
first conductivity type, each disposed in PN junction
forming relation with said semiconductor layer;
a third semiconductor region of said second
conductivity type disposed in PN junction forming relation
with said second semiconductor region;
a layer of insulating material disposed on the
surface of said semiconductor layer lying between said
first and second semiconductor regions;
a layer of conductive material disposed on said
insulating layer; and
conductive means for connecting said conductive
layer to one of said first and third semiconductor regions.
2. A semiconductor protection circuit in
accordance with claim 1 wherein said conductive means
connects said conductive layer to said first semiconductor
region.
3. A semiconductor protection circuit in accordance
with claim 1 wherein said conductive means connects said
conductive layer to said third semiconductor region.
-11-

4. A semiconductor protection circuit in
accordance with claim 1 wherein:
said second semiconductor region extends in a
direction along the surface of said semiconductor layer
so as to form a resistor comprising that portion of said
second semiconductor region disposed between said third
semiconductor region and the end of said extension of said
second semiconductor region.
5. A semiconductor protection circuit in
accordance with claim 4 further comprising means for
connecting said extended end of said second semiconductor
region to said semiconductor substrate.
6. A semiconductor protection circuit according
to claim 5 wherein said means for connecting said extended
end of said second semiconductor region to said semi-
conductor substrate comprises a fourth semiconductor region
of said first conductivity type extending from said surface
of said semiconductor layer to said substrate, said fourth
semiconductor region intersecting with said second semi-
conductor region at said extended end thereof, said fourth
semiconductor region surrounding said semiconductor layer.
7. A semiconductor protection circuit in
accordance with claim 5 further comprising:
a reference terminal for receiving a reference
supply potential;
means for connecting said reference terminal to
said substrate and to said third semiconductor region;
a utilization circuit including a signal terminal
for receiving a signal; and
means for connecting said signal terminal to said
first semiconductor region.
-12-

8. A semiconductor protection circuit in
accordance with claim 4 further comprising a buried semi-
conductor region of said second conductivity type, said buried
semiconductor region disposed between said semiconductor
layer and said substrate, and extending beneath said first
semiconductor region, said third semiconductor region, and
that portion of said semiconductor layer between said first
and said third semiconductor regions, said buried semi-
conductor region having a lower resistivity than that of
said semiconductor layer.
-13-

Description

Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.


-1 RCA 76,823A
INTEGRATED CIRCUIT P TECTION DEVICE
This invention relates to integrated pro-tection
clrcults .
~any types of electîical equipment contain IC
(integrated circuit) devices which are vulnerable -to
damage from high voltage transients.
In a television receiver, the anode of the
image-producing kinescope is typically biased a-t a high
potential, e.g., 25,000 volts. High-voltage transients
may be produced when the high-voltage anode of the
kinescope is rapidly discharged to points at lower
potentials. Such high-voltage transients have positive
and negative peaks often in excess of 100 volts and may
last several microseconds. High-voltage transients may
also be produced when electrostatic charges are discharged
as a user contacts -the controls of the television
receiver. ~igh-voltage transients may be coupled to the
terminals of IC's employed in the television recei~er for
video and audio signal processing. Accordingly, these
IC~s may be damaged by high-voltage transients.
,~

1 -~_ RCA 76,fl23/A
In a televisi.on receiver, nar-ticular
si.gnals applied to an IC may have positive voltac~e excursions
6which in normal operation exceed the positive supply ~otential.
For example, a typical television horizontal/vertical
regulator IC re~uires a feedback connection fron the
kinescope deflection coils ~o one of its input terminals.
While the power supply for the IC is typically ~ volts,
10 the peak feedback voltaqe Erom the deflection coils is
typicall~ ~27 volts. Therefore, it is desirable to provide
a positive transient protection circuit for such IC's
that permits normal si~nal voltaaes to exceed the power
supply potential without activatin~ such protection circuit
16and nevertheless protects the IC from excessively larae
transients.
The present invention is embodied in an in-tegrated
eireuit protection device eomprising a pair of complementary
20eonduetivity transistors and a metal oxide sPmiconductor
(MOS) transistor formed intearal to the semiconductor
strueture. The pair of eomplementary conductivity -transistors
and the MOS transistors are arran~ed to form a two-terminal
deviee eapable of conductinq a hi~h current when the
26potential difference across its two terminals exceeds a
predetermined threshold. The protection device is
connected at one terminal thereof to a circuit terminal
of the circuit to be protected and at the other terminal
thereof to a souree of reference potential. I~hen the
30potential at the circuit terminal of the protected circuit
exceeds the predetermined threshold, which is preferably
set above the maximum expected si~nal voltaae, the
protection circuit is rendered conductive, thereby
protecting the IC from damaqe.
3~ In one embodiment, the aate electrode of the .~OS
transistor is connected to the source of reference poten-tial,
so that the predetermined threshold of the protection device
is substantially equal to the threshold of the MOS transistor.
In a seeond embodiment, ~he ~ate electrode of the MOS
~0

37~
1 -3~ J~ 7(~ 3/A
transistor is connec~ed to the circuit termil-al ol t~
c.ircuit to be protected so that the MO~ transistor is
6 conditioned for nonconduc~ion. The Predetermil-ed thl-eshold
of th latter protection device is considerably ~reater
than that of the form~r.
In the dxawin~:
FIGURE 1 is a plan view of an integra~ed circuit
10 pro~ection device in accordance with an e~bodi~ent of the
present invention;
FIGURE 2 is a cross-sectional view of a
semiconductor structure illustratina Further structural
details of the protection device of FI~,~PE l;
16 FIG~RE 3 is a schematic dia~ra~ of the se~i-
conductor protection device in FI~ ES 1 and 2;
FIGURE 4 is a plan view of an intearated circuit
protection device in accordance with an alternate e~bodi~ent
of the present invention;
FIGURE 5 is a cross-sectional view of a
semiconductor structure illustratina further structural
details of the protection device of FIGUR~ 4; and
FI~,URE 6 is a schematic dia~ram of the
semiconductor protection device of FI~URF~S 4 and 5.
2~
As shown in FI~URE~ 1 and 2, a semiconductor
circuit is fabricated on a substrate 10 ~ade of P type
silicon material. An epitaxial layer 12 of N- type
conductivity is disposed on the substrate 10. A P region
30 1~ is disposed within N- epitaxial layer 12, formin~ a ~N
junction with layer 12. A P+ reaion 20 is further formed
within P region 14u Another P region 16 is disPosed within
N- epitaxial layer 12, forming a ~N junction with epitaxial
layer 12. An N+ reaion 18 is disposed within P re~ion 16
formina a PN junction with P region 16. A buried N+
region 11 underlies re~ions 1~, 20, 16 and 18. The
structure thus formed within N- epitaxial layer 12 is a
protection circuit, the sche~atic for which is shown in
FIGURE 3. A P+ region 32 surrounds N- epitaxial layer 12
~0

4 RCA 76,823/A
and extends from the surface of epitaxial layer 12 -to the
substrate 10 thereby isolatin~ the ~rotection circui-t formed
5within N- epitaxial layer 12 from other circuits on the
substrate 10 in regions 21a and 21b. The P+ reqion 32 also
overlaps P region 16 ~o provide a connection between the
subs~rate 10 and P region 16.
An insulating layer 22, which may for exa~Ple be
silicon dioxide, overlies the surface of N- epitaxial layer
12. Openings are formed in the insula~inq layer 22 over
regions 20, 18 and 32 in order to make respec-tive electrical
contact thereto. A conduc~ive layer 24, which may for
example be aluminum, overlies the insulatin~ layer 22 and
~makes contact with P~ reqion 20. Another conductive layer
30 overlies the insula~ing layer 22 and makes contact with
N+ region 18 and P~ reaion 32. A further conductive layer
26~ which is connected to conductive layer 30, overlies that
portion of N- epitaxial layer 12 extendina between P reaion
2014 and P region 16 so as to form a P channel MO~ transistor.
A bond pad 28 is connected to P+ region 20
through conductive layer 24. The bond pad 28 is further
connected to a si~nal terminal of utili.zation circuit 101
. . .. ... . . . .. ...... .
elsewhere on the IC chip, such as in regions 21a and
2621b. A terminal 3~ is further connected to P reaion 32
and N+ region 18 through conductive layer 30. Terminal 34
is connected to receive a source of reference potential,
such as ground potential.
FIGURE 3 is a schematic circuit model of the
30 structure illustrated in FIGURES 1 and 2. The protection
circuit comprises a PNP transistor Ql, an NPN transistor
Q2,a P channel MOS transistor Pl, and a resistor Rl. The
emitter electrode 114, base electro~e 112 and collector
electrode 116 of transistor ~1 correspond to reoions 14,
3~ 12 and 16, respectively,in FIGURF.~ 1 and 2. P~ reqion 20
increases the injection efficiency of the emitter reqion 14
of transistor Ql which increases the com~on emitter forward
current gain,commonl~ referred to as "beta" of that
transistor. The emitter electrode 118, base electrode 116
4~

-5- RCA 76,823/A
and collector electrode 112 of -transis-tor ~2 correspond to
regions 18, 16 and 12, respectively,in FI~,UR~ I and 2.
6Source electrode 114 and drain electrode 116 oE transistor Pl
correspond to reg.ions 14 and 16, re.spec~ively, in FI~URE~ 1
and 2. The gate electrode 126 of trarlsistor P1 corresPonds
to conductor 26 in F`IGURE~ 1 and 2. Resistor R1 corresponds
to the extended portion of P region 16 between N-~ re~ion 18
and P+ region 32 plus the pinch resistor formed by that
portion of P region 16 that underlies N~ reaion lfl.
The value of resistor Rl is determined by the
resistivity of the P region 16, and the ~eometry of N~
region 18 relative to P region 16 (see FI~U~ 2). For
example, the resistance of resistor Rl may be increased by
further extendinq P region 16 further away from N+ reaion
18 or making the extension narrower. Also, as is known -to
those skilled in the art, the value of resistor Rl
attributable to the pinch resistor beneath N+ region 18
20may be increased by diffusin~ N+ reaion 18 deeper into P
region 16. The buried N~ region 11 provides increased
conductivity across the lower reqion of epitaxial layer 12
which increases the ability of transistors Ql and ~2 to
conduct current when a hiqh-voltaae transient has triaoered
2~the protection device.
As shown in FIGURE 3, transis~ors Ql and Q2 are
connected to form a silicon control rectifier (~CR).
Specifically, the base electrode of Ql is connected to the
collector electrode of Q2,and the base electrode of Q2 is
30connected to the collector electrode of ~1. Resistor Rl
is connected between the base and emitter electrodes of
transistor Q2. The source electrode of transistor Pl is
connected to the emitter electrode of transistor Ql and
the drain electrode of transistor P1 is connected to the
3~collector electrode of transis~or ~1 so that the conduction
channel of Pl ls connected in parallel with the main
conduction path of transistor Ql. r~ate electrode 126 of
transistor Pl is connected to the emitter electrode of
transistor Q2. The resultino protection device is connected
~0

~.~h~ 7~.~
-6- ~CA 76,~2yA
between bond pad 28, which is a signal ter~inal (either for
input or output signals) of a TV utiliza-tion circuit 101 to
6be protected,and terminal 34, which is connected to ground
potential.
The present structure differs from a conventional
SCR device in that the integral ~OS -transistor and its
connections to transistors Ql and Q2 converts the three-
terminal SCR device into a two-terminal device tha-t is
rendered conductive when the vol-tage across its terminals
exceeds a predetermined threshold. Since ~he ~ate and source
electrodes are connected between sianal ter~inal 2~ and
ground terminal ~4, the predetermined threshold of the
$~protection device is .substantially eaual to the gate-to-
source threshold voltage of transistor Pl, i.e., the gate
voltage at which transistor Pl conducts.
In operation, assume that transistors Ql and Q2
are initially non-conductive. Resistor Rl prevents
~ electrical and thermal noise from inadvertently causina
transistors Ql and ~2 to conduct. So long as the signal
applied to bond pad 28 has a potential below the qate-to-
source threshold vol~age of transistor Pl, -transistor~ Ql
and Q2 remain non-conductive.
~6 A high-voltaqe transient appearing a-t bond pad 28
having a potential greater than the aate-to-source threshold
voltage of Pl causes the gate-to-source voltage of transistor
Pl to exceed the threshold voltage of Pl, which causes
channel current to flow in transistor Pl. Conduction by
30 transistor Pl provides base c~rrent to transistor Q2. The
resulting collector current of transistor 02 provides base
current to transistor Ql, causing that transistor to conduct.
The conduction between collector and eritter electrodes of
transistors Ql and Q2 is regenerative, thereby drivina
36 transistors Ql and Q2 into high conduction. The eneray of
the high-voltage transient is diverted by virtue of the
conduction of transistors Ql and Q2 to around, thereby
protecting the TV signal processing utilization circuit 101
from damage.
4~

1 ~7- RCA 76,823 /A
When the current supplied by the hiah-voltaae
transient from bond p~d 28 to power suPply terminal 34 falls
5below a minimum sustaining current, transistor ~2 is provided
with insufficient base current to remain conductive, and
therefore Q2 ~urns off. In response, the base current to
transistor Ql is removed, causing ~1 to turn off. Accordingly,
the protection circuit becomes nonconductive. ~e~istor Rl,
lOin addition to stabilizing the protection device against
inadvert~nt firing, also determines the minimum holding
current below which Ql and Q2 beco~e nonconductive. As
the value of resistor Rl is increased, the minimum holding
current is decreased, and vice versa.
16 The predetermined threshold voltage of the
protection device is substantially equal to the threshold
voltage of transistor Pl. As is known in the art, the
threshold voltage of an r10S transistor is related to the
oxide thickness beneath the gate electrode thereof and the
20 conductivity of the channel material. Typical values for
the threshold voltage of MOS transistors such as Pl are
in the range between 20 and 30 volts. Accordingly, by
appropriate desi~n of ~IOS transistor Pl, the predetermined
threshold of the protection circuit can be set at a
2~ relatively high value, e.g. 30 volts,which is typically
much higher than the most positive power supply voltaae,
e.g. 10 volts.
An alternate embodiment of the present inventlon
wherein the predetermined threshold voltaae of the
~ protection device is substantially increased,compared with
that of the protection device shown in FI~URE5 1, 2 and 3,
is shown in FIGU~ES 4, S and 6. The structure of the
protection circuit of FIGURES 4,5 and 6 is the same as that
shown in FIGURES 1, 2 and 3 except that the gate electrode
of transistor Pl is not connected to ground potential as
in the first embodiment, but rather to the bond pad 28 via
a connection between conductive layer 26 and conductive
- layer 24. Such connection between the qate and source
electrodes of transistor Pl conditions that transistor to

1 -8- RCA 76,823 /A
be nonconductive for all positive voltages at boncl pad 2~.
In this embodiment, the predetermined ~hreshold voltage of
6the protection device depends on -the reverse bias breakdown
voltage between collec-tor and hase electrodes of transistors
~1 and Q~ rather than on the threshold voltage of transistor
Pl. The collector-to~base reverse bias breakdown voltage is
that voltaye applied to the collector which causes base
current to be applied from the collector. As lonq as -the
collector to base current is not excessive, the transistor
conducts, but no damage occurs to the transistor. ~he
purpose of transistor Pl is to increase the reverse bias
breakdown voltage of transistors ~1 and ~2. Towards this
~5 end, it is believed that the electric field induced beneath
the gate electrode of transistor Pl tends to inhibit the
collertor to base breakdown of transistors ~1 and Q2 fro~
occurring near the surface of the integrated circuit. As
a result, the collector to base breakdown phenomena tends
20 to occur at a greater depth into the semiconductor wafer,
which has the effect o~ increasing the collector-to-base
breakdown voltage. Thus, connectinq the gate electrode of
transistor Pl to bond pad 28,where it receives the positive
transientlincreases the predetermined threshold voltage of
26 the SCR formed by transistors ~1 and Q2.
The reverse bias breakdown occurs at the junction
of regions 12 and 16. Therefore, the predetermined threshold
voltage of the prot-ection device is substantially e~ual to
the reverse bias collector-to-base breakdown voltage of
30 transistor Q2-
The breakdown voltage of transistor Q2 is, tosome extent, determined by the value of resistor Rl. In
particular, as the value of resistor Rl is decreased,
the reverse bias collector-~o-base breakdown voltaae of
~6 transistor Q2 is increased, and vice versa. ~lso, the
reverse bias breakdown voltage of transistor Q2 is
affected by particular parameters of transistor Pl.
For example, the thinner the oxide insulator beneath the
gate electrode 26 o~ transistor P1, the deeper the

~h~-r~
~9- RCA 76,823/A
respective collector-to-base breakdown occurs,resulting in
potentially h~her hreakdown voltages~ Breakdown voltages in
6the ranae of 40 to 60 volts are obtainable.
In operation, a signal is applied at bond pad 28,
and transistors Ql and Q2 are initially nonconductive. A
high-voltage transient appearing at bond pad 28 will cause
the potential at bond pad 28 to rlse sharply. Such positive
potential substantially appears across the collec-tor-to-base
junction of transistors nl and Q2. ~hen the potential
applied exceeds the reverse bias breakdown of transis-tor ~2,
base current is provided to transistor ~1 which in turn
supplies base current to transistor 02,regeneratively driving
~both transistors into high conduction.
When the current supplied by the high-voltage
transient from bond pad 28 to power supply terminal 34
falls below the minimum holding current, transistors O1
and Q2 will turn off and the protection circuit becomes
20nonconductive. In such manner, the energy of hiah-voltaae
transients producing a positive voltage at bond pad 28
in excess of the threshold voltage of the pxotection circuit
is dissipated by the conduction of transistors ~1 and 02 to
power supply terminal 34. Furthermore, since the
~6predetermined threshold voltage of the protec-tion device
is 40 volts or more, the input signal variation may
considerably exceed the positive power supply potential,
typically in the order of ~10 volts,without tri~ering the
protection device.
While the present invention has been described
wi h reference to a specific structure,it will be
understood that modification within the scope of the
invention as defined in the following claims are
contemplated. For example, P and N ~ype semiconductor
36regions may be interchanged to provide a protection device
that is rendered conductive for negative voltage transients.
Also,i~ is to be understood that conductive layer 26,which
forms the gate elec~rode of ~OS ~ransis~or Pl,may be a
conductor other than aluminum,and the insulatinq material
4~

-lO- RCA 76,823/A
beneath the gate may be an insulator other than silicon
dioxide .
This is a divisional application of Canadian Serial No.
399,038 :Eiled March 22, 1982
2~1
~6
3~
36

Dessin représentatif

Désolé, le dessin représentatif concernant le document de brevet no 1181870 est introuvable.

États administratifs

2024-08-01 : Dans le cadre de la transition vers les Brevets de nouvelle génération (BNG), la base de données sur les brevets canadiens (BDBC) contient désormais un Historique d'événement plus détaillé, qui reproduit le Journal des événements de notre nouvelle solution interne.

Veuillez noter que les événements débutant par « Inactive : » se réfèrent à des événements qui ne sont plus utilisés dans notre nouvelle solution interne.

Pour une meilleure compréhension de l'état de la demande ou brevet qui figure sur cette page, la rubrique Mise en garde , et les descriptions de Brevet , Historique d'événement , Taxes périodiques et Historique des paiements devraient être consultées.

Historique d'événement

Description Date
Inactive : Périmé (brevet sous l'ancienne loi) date de péremption possible la plus tardive 2002-03-22
Inactive : Renversement de l'état périmé 2002-01-30
Inactive : Périmé (brevet sous l'ancienne loi) date de péremption possible la plus tardive 2002-01-29
Accordé par délivrance 1985-01-29

Historique d'abandonnement

Il n'y a pas d'historique d'abandonnement

Titulaires au dossier

Les titulaires actuels et antérieures au dossier sont affichés en ordre alphabétique.

Titulaires actuels au dossier
RCA CORPORATION
Titulaires antérieures au dossier
LESLIE R. AVERY
Les propriétaires antérieurs qui ne figurent pas dans la liste des « Propriétaires au dossier » apparaîtront dans d'autres documents au dossier.
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Description du
Document 
Date
(aaaa-mm-jj) 
Nombre de pages   Taille de l'image (Ko) 
Abrégé 1993-10-29 1 35
Revendications 1993-10-29 3 82
Dessins 1993-10-29 2 63
Description 1993-10-29 10 392