Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
~3~B~65
SLIP ENERGY RECOVERY CONTROL SYSTE~ USING HYBRID
INVERTER TO IMPROVE QUADRATURE CURRENT CONSUMPTION
Back~round of the Invention
This invention relates to systems for changing
the speed of a wound rotor motor and recovering the slip
energy thereof, the former being achieved by removing
controlled amounts of power from the rotor of the wound
rotor motor and the latter by returning the removed power
to the power source for the wound rotor motor.
It is well known that the speed of a wound rotor
motor can be adjusted by changing the power flow through
the rotor circuit of -the motor. With early wound rotor
motor speed controls the removed power was dissipated
in adjustable resistor banks or in large liquid-cooled
rheostats, an obviously wasteful use of the power Sub-
sequently, slip energy recovery (SER) systems were developed
making it possible to recover the previously wasted power
inverting it back to 60 Hz AC power and returning it to
the power source for the motor through a voltage matching
transformer.
Slip energy recovery systems have been employed
in North America for about ten years. Prior art systems
presently marketed share a common problem, particularly
as the system becomes a large part of the total installed
electrical load. Thus, due to the characteristics of
the line-commutated inverter employed in the SER system,
the reactive current drawn from the supply when the motor
is operating at full speed and full load is equal to the
full-load motor current, resulting in a total KVA draw
~30 from the supply that is almost double the normal full-
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load value. Fortunately this can be reduced to normal
values by connecting power ~actor correction capacitors
across the system input, these being equal in rating to
the full KVA rating of the motor.
While the use of power factor correction capacitors
reduces the full speed KVA to more normal proportions,
it introduces other problems with potentially greater
impact on the system. These include:
~a) A leading power factor at speeds below
75~ resulting in supply system instabilities, particularly
in the presence of emergency diesel-driven standby power
generators.
(b~ A large capacitive standby current when
the motor is not actually running.
(c) Harmonic pollution of the supply caused
by resonance of the large capacitive component with the
supply impedance (inductive reactance) with resulting
higher voltages, system overloads, capacitor fuse operation
and magnetic saturation.
By way of elaborating on the foregoing, if the
SER system becomes a large part of the total electrical
load, which may be, for example, a complete pump house
having lights, heaters, fixed speed drives etc. in addition
to SER systems, the AC transformer supplying power to
the pump house will have a large inductance that will
resonate with the large power factor correction capacitors
at a harmonic (the 5th) that is the same as that of the
inverter-rectifier subsystem of the SER system. Also,
if the AC supply should be lost, power then may be supplied
on an emergency basis from a diesel generator. At this
point the wound rotor motor is not operating. When the
diesel motor gets up to speed, the correct field is supplied
to the generator driven by it to give the required voltage,
and when this generator is connected to the system the
result is a leading current to supply the large power
factor correction capacitors. This creates an unstable
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generator becauce the field of the generator becomes self-
exciting. The same thing can happen if the system is
being supplied from a diesel generator and tlle speed of
the wound rotor motor is reducedr i.e., depending on the
extent of the speed reduction, a leading power factor
can result.
A number of methods have been employed to limit
the effect of the large power factor correction capacitors
employed with SER systems including switching banks of
capaci~ors onto the system as the motor load is increased
and switching them off again as the load decreases. This
solution sharply increases the cost of the overall system,
decreases its reliability due to the increased mechanical
stress on the switching contactors and generates undesirable
switching transients on the system supply.
Summar~ of the Invention
An object of an aspect of this invention is
to reduce the amount of system power factor correction
required in an SER system to eliminate or reduce the severity
of the aforementioned problems of prior art SE~ systems~
In accordance with one aspect of this invention
there is provided a slip energy recovery system for a
wound rotor motor having an AC supply source of at least
one phase, said system including rectifying means and
a hybrid inverter each having the same number of phases
as said source connected between the wound rotor of said
motor and said source for converting AC power from said
rotor to DC power and for inverting said DC power to AC
power for delivery to said source, said hybrid inverter
including in each phase thereof first and second groups
of gate-controlled, bistable, unidirectional conducting
devices; and means for controlling the operation of said
first and second groups of bistable unidirectional con-
ducting devices in each said phase of said hybrid inverter
such that said first bistable unidirectional conducting
; device group is continuously in the inversion
mode and gated into conduction at a fixed firing angle while
said second bistable unidirectional conducting device group
is gated into conduction at a firing angle of from 0 to 180,
whereby said hybrid inverter produces zero quadrature
current at full speed of said motor, zero volts at maximum
motor current and maximum volts at zero motor current.
Brief Descriptlon of the Drawings
This invention will become more apparent from
the following detailed description, taken in conjunction
with the appended drawings, in which:
Figure 1 is a block diagram of a slip energy
recovery system;
Figure 2 illustrates various three-phase converter
bridge configurations, Figures 2(a) and 2(b) being priox
axt configurations;
Figure 3 is a vector diagram of the current
o an SER system comparing that of a conventional system
to that of the system of the present invention;
Figure 4 is a graph showing various system para-
maters plotted against speed for both a conventional SER
system and one embodying the present invention; -
Figures 5(a) and (b1 show the AC supply current
waveorms for the 6-pulse converter of Fig. 2(a) for phase
retardation angles varying from 15 to 165 with a constant
direct current flowing;
Figures 5(c) and (d) show the AC supply current
waveforms for the semi-converter of Fig. 2(b) for phase
retardation angles varying from 15 to 165 with a constant
direct current flowing;
Figures 5(e) and (f) show the AC supply current
waveforms for the hybrid inverter of Fig. 2(c) for phase
retardation angles varying from 15 to 165 with a constant
direct current flowing;
Figure 5lg) depicts converter waveforms for
~ a phase retardation angle of 0;
Figure 5(h) depicts hybrid inverter waveforms
for a phase retardation angle of 0;
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Figure 6 shows alternating current transformer
connections that can be employed usefully with a hybrid
inverter of the present invention;
Figure 7 is a vector diagram of vario~s voltages
shown in Fig. 8;
Figure 8 illustrates a control logic system
that may be employed to provide gating waveforms for a
three-phase hybrid inverter embodying the present invention;
Figure 9 illustrates the phase control and phase
retardation angle (~ ) limit waveforms associated with
thyristor TH3 (Figs. 2(c) and 6) and also shows the gating
waveforms for ~ min. (less than 0~ and c~ max. (165);
and
Figure 10 is a complete system diagram in greater
detail than that shown in Fig. l.
Detailed Description of the Invention
Including Preferred Embodiments
An examination of the slip energy generated
at the slip rings of a wound rotor motor as the speed
is varied from zero t~ full speed reveals that there is
no slip energy generated at full speed. In addition,
when the motor is driving a centrifugal load, such as
a fan or pump, the slip energy reaches a maximum value
at 66% speed and reduces to zero at zero speed. On the
other hand, the current which is directly proportional
to torque, is maximum at full speed and decreases as a
square function of speed to zero at zero speed. It is
this current which is required to produce ~ull load torque
at full speed but which contains no power, that requires
compensation.
Further examination of the slip ring voltage
vs. speed characteristic reveals that the voltage at full
speed is zero and is maximum at zero speed. The line-
commutated inverter (Fig. 2(a)) must be operated at a
"firing angle" of 90 degrees (lagging) to achieve zero
volts. At this operating point the inverter is operating
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just between the inverting and rectifying mode carrying
full current but producing an average of zero volts at
its termina]s.
~nother rectifier configuration (Fig. 2(b))
commonly employed in the DC drive ~ield is the semi-
converter or hybrid bridge. This configuration employs
three thyristors and three diodes to produce a full range
of DC voltage from zero to maximum by varying the "firing
angle" from 0 to 180. The circuit is limited in operation
to the rectifier quadrant, since inversion is not possible
with the rectifier diodes in the circuit.
If one examines the operation of the semi-
converter, it can be imagined as two rectifiers connected
in series, one being a fixed voltage diode rectifier
producing a voltage of +VDC/2 and one being a variable
voltage thyristor inverter operating from -VDC/2 to +VDC/2.
At full output the two rectifiers add resulting in +VDC
at the output. At minimum output the rectifier produces
+VDC/2 and the converter produces -VDC/2 resulting in
zero net output volt-age~ Because the thyristor portion
operates over a 180 firing angle and produces only 1/2
the output, the power factor variation from zero to full
output is considerably less than that of the six thyristor
converter equivalent. In fact, at zero volts the quadrature
current ~xawn from the line is zero, in comparison to
the full converter which draws maximum quadrature current
at zero volts.
By replacing the three diodes with three
thyristors a full converter bridge is obtained, as shown
in Fig. 2(c). However, if the three thyristors replacing
the diodes now are operated continuously in the inversion
mode, while the other three thyristors are operated from
0 to 180, a characteristic identical to the semi-converter
is obtained, except in the inversion mode.
This means that at full speed where the full
converter (Fig. 2(a)) produces maximum quadrature current,
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the hybrid inverter produces zero quadrature current,
but does possess the re~uired characteristics for operating
as an SER system;
i.e., (1) zero volts at maximum current, and
(2) maximum volts at zero current
and, in addition, does not draw any supply current at
full speed. The characteristics of the SER system employing
a hybrid inverter at full speed then match those desired
since no power factor compensation is required at full
speed. This can best be seen by considering Fig 3.
As the speed is reduced, however, more quadrature
current is drawn reaching a maximum at about 80~ speed
(see Fig. 3). This maximum value is only 25% of the total
current drawn at full speed and may be fully compensated
with 25% of the compensation required with a full converter
(Fig. 2(a)). In addition, the system power factor will
always be lagging, as may be seen from Fig. 3, eliminating
instability problems with the power system.
Figure 4 compares the essential operating parameters
of a conventional SER s~stem and one embodying the present
invention as a function of speed.
It should be apparent from the foregoing that
the essence of the present invention is ~he employment
of a hybrid inverter that includes in each phase thereof
first and second groups of gate-controlled, bistable,
unidirectional conducting devices, e.g., thyristors and
controlling the operation thereof such that in each phase
the first group is operated continuously in the inversion
mode while the second group is operated from G to 180.
3Q This contrasts with the superficially similar full converter
of Fig. 2(a) wherein all of the six thyristors always
are fired at the same phase retardation angle and, depending
upon the phase retardation angle, the converter operates
in the rectifier mode (+) or the inversion mode (+).
A control logic system is required in order
to operate the hybrid inverter of the present invention,
35~5
just as a control logic system is required to operate
the full converter shown in Fig. 2~a). One such control
logic system now will be described, but it is to be under-
stood that it is illustrative only of a suitable system,
although it contains numerous innovations itself, and
that other control logic systems may be employed without
departing from the present invention as broadly described
hereinbefore.
The requirements of a hybrid inverter (Fig.
2(c)) control logic are different from those of a full
converter (Fig. 2(a))or a semi-converter (Fig. 2~b)) in
that, while six gating signals are required, the positive
and negative thyristor banks are controlled independently.
A desirable attribute of the gating circuit is one whereby
the relationship between the logic control signal and
the terminal DC voltage of the hybrid inverter is linear
to permit optimal control system operation. The further
requirement to reduce the terminal voltage to its minimum
value at the full speed operating condition of an SER
system necessitates special limiting techniques to provide
this condition. In addition are the stringent requirements
of maintaining sufficient commutation angle during full
inversion operation of the negative thyristor bank.
To provide system stability and protection,
it is necessary to monitor and control the DC current
flowing through the hybrid inverter. While this may be
accomplished with a resistive shunt in the DC path, this
method precludes electrical isolation from the high voltage
DC power bus, i.e., the DC terminals of the hybrid inverter.
It is desirable to use current transformers on the AC
side of the hybrid inverter, but this cannot be done because
of the assymetrical nature of the hybrid inverter thyristor
bank gating control.
The control logic system hereinafter described
is, as aforementioned, innovative in itself and is designed
to accurately model the DC bus current in a hybrid inverter,
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hile maintaining electrical isolation from the power
system; and to provide means for limiting the phase advance
and phase retard angles of the gating control independently
but reliably, independently controlling the positive and
negative thyristor banks to provide hybrid inverter
operation.
CURRENT MONITOR
Figure 5 shows the AC supply current waveforms
for the six-pulse converter, Figs. S(a) and (b), the semi-
converter, Figs. 5(c) and (d) and the hybrid inverter,Figs. 5(e) and (f) for phase retardation angles varying
from 15 to 165 with a constant direct current flowing.
It will be noted that in the case of the full
six-pulse converter, the waveform is of the same Eorm
irrespective of the phase angle ~ . Since this waveform
is symmetrical under all conditions, a conventional AC
current transformer can be used to extract this current
waveform from the AC supply feeder. Full~wave rectification
of a set of polyphase current waveforms will reconstruct
the current flowing i-n the DC link. In the case of both
the semi-converter and the hybrid inverter, however, the
waveform departs significantly from the six-pulse case.
In both cases part of the DC link current circulates
through the bridge semi-conductors and does not flow in
the AC supply line. Thus the current transformers located
in the AC line no longer will be able to reconstruct the
DC link current by rectification of the current waveforms.
During the time when the direct current is not
flowing in the line, it is flowing in a corresponding
semi-conductor branch, so monitoring of the semi-conductor
curren~ will provide the necessary waveforms for DC current
reconstruction. However, the semi-conductor current is
unidirectional by nature and not suitable for use with
a current transformer which requires an AC waveform. By
reconnecting the thyristor branches containing thyristors
THl to TH6 inclusive as shown in Fig. 6, AC current trans-
formers CTl and CT2 can be employed to reconstruct the
- DC link current by full wave rectification. Since the
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conductors passing through the current transformers CTl
and CT2 are all the same potential, a simple buswork assembly
may be employed. This technique of current monitoring
provides a predictable, accurate method of measuring the
direct current in the three phase bridge and is effective
for any type of bridge conEiguration~ The isolation level
is a function strictly of the insulation of the current
transformer, whose secondary may be directly connected
to the motor control logic.
GATING SIGNAL LOGIC
In a DC converter the DC output is characterized
by the expression:
DC VDM cos ~
where VDM is the peak supply voltage, VDc is the DC output
voltage and ~ is the phase retardation angle for the
thyristors (see Fig. 5).
If the control voltage Vc which determines the
delay angle ~ is constrained such that
VC = cos ~ , where VcM = Vc (max.),
VCM
then the over-all transfer characteristic of the power
converter will be a linear relationship
VDC ~ Vc VDM
VcM
In addition, if the gating signal logic reference waveform
is derived from the same supply as the thyristor converter,
the ratio VDM / VcM will be constant and the DC output
of the converter will be independent of AC line voltage
variations.
The required logic reference waveEorm, by virtue
of its transfer function, Vc = VcM cos ~ , must be a cosine
function of the thyristor AC waveform and thus must be
phase displaced 90 from it. Since three phase voltages
are, by definition, phase displaced by 120, there are
no naturally occurring cosine waveforms available. However,
if, for example, phase C is phase-shifted by 30~ using
a phase lag network, the resulting wave-Eorm will lead
, ~
phase A by 90. This is illustrated in Figure 7. VTl
which lags Vc N by 30, leads VA N by 90O This waveform
is used as the "cosine" wave to provide the reference
waveform for the gating signal logic.
A circuit which detects the intersection between
the cosine wave and a ~C control voltage proportional
to the desired DC output voltage will result in a logic
signal which will be phase~displaced from the appropriate
thyristor voltage b~ an angle ~ .
A control logic diagram which provides the
gating waveforms for a three-phase hybrid inverter is
shown in Figure 8.
Three line-to-neutral voltages VA N~ VB N~ VC N~
are generated from the Y-connected secondary 30 of a three
phase logic supply transformer. These voltages are each
phase-shifted by 30 b~ phase shift networks 31 and then
inverted by inverters 32 to produce six 60 displaced
cosine reference waveforms (VTl to VT6), one for each
thyristor gate signal. (See Figs. 7 and 8).
By phase shifting voltages VTl, VT3 and VT5
using 30 phase shifting networks 33 and inverting the
phase shifted signals by inverters 34, another set of
six 60 displaced waveforms are produced (Vl to V6) which
are again in-phase with the line-neutral voltages. These
voltages are rectified to produce a limit potential elim
which is used for phase retardation limiting as described
hereinafter under "Phase Modulation Limits". The additional
phase shifting is used in producing voltages Vl to V6
to provide the additional filtering inherent in this phase
shiftins function which removes spikes, harmonics and
noise that can be present on the line-neutral voltages.
The comparators CMl to CM6 in Fig. 8 compare
the reference and control voltages on their inputs and
produce a logic output signal at the point of intersection.
This logic signal is transmitted in the form of a pulse
to a flip-flop network 35 whose function is to produce
120 wide gate signal envelopes corresponding to the
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conducting period of each thyristor. These gate signals
are produced in two sets, one for the three thyristors
connected to the positive DC bus, (TH1, TH3 and TH5~ and
one for the three thyristors connected to the negative
5 bus (TH2, TH4 and TH6).
The 120 gate signal envelopes, which are shown
in Fig. 5(h~, are modulated with a high frequency oscillator
36 by means of AND gates AGl to AG6 to produce "bursts"
of pulses which are amplified and directed to the gate
10 terminals of the appropriate bridge thyristors.
PHASE MODULATION LIMITS
.. ..
The production of the gate logic signals from
the comparators CMl to CM6 necessitates the detection
of an intersection between the phase control signal EC
15 (Fig. 8) and the cosine reference waveO To provide full-
range control of o~, the amplitude of the control voltage
EC must be sufficient to equal the extremes of the cosine
reference wave excursions. If the amplitude of EC exceeds
the cosine peak, no intersection takes place and the gating
20 signal will not be produced. Since the cosine reference
wave is derived from the AC supply voltage, it is also
subject to variations in amplitude. Thus the limits applied
to EC must insure an intersection independent of the cosine
wave amplitude and still permit full range control of oc.
25 It also is important, practically speaking, that the maximum
angle be precisely limited to 165 to ensure successful
"commutation" of the outgoing thyristor giving a "commutation
angle" of (180-165) = 15.
MAXIMUM ~ LIMIT
13y rectifying the si~ voltages Vl to V6 as des-
cribed in the Gating Signal Logic section, a negative
DC voltage elim is produced whose peak amplitude is equal
to the peak of the cosine voltages VTl to VT6. However,
because V1 to V6 are delayed 30 from VTl to VT6 respectively,
35 the rectified voltage elim has its peak amplitude occurring
30 displaced from the peak amplitude of the cosine reference
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waveform. The intersection between these two waveforms
(see Fig. 9) occurs at an ~ of 165, and this intersection
angle remains constant regardless of waveform amplitude,
since elim also is derived from the AC supply voltage.
By the use of a limiter circuit, the amplitude
f EC may be limited in the negative direction to the
absolute value of elim so that irrespective of AC supply
variations, ~ max is fixed. Thyristors THl, TH3 and
TH5 which are connected to the positive DC bus are phase
controlled from ~ min to ~ max by means of the control
voltage Ec.
On the other hand, thyristors TH4, TH6 and TH2
are connected to the negative DC bus and are operated
in the full inversion mode continuously. This requires
that the gating signal be phase delayed by a constant
angle c~ max = 165. In this case the comparators only
detect the intersection between the reference cosine waveform
and the limit voltage elim. The resulting logic signal
is employed to trigger the flip flops which, in turn generate
three se~uential 120 gating signals corresponding to
the conduction periods of the thyristors.
MINIMUM ~ LIMIT
Thyristors THl, TH3 and TH5 whose firing angle c~
is variable are phase controlled over the entire range
from ~ min to ~ max. If a similar method to that used
for ~ max limiting is employed for ~ min, the minimum
reliable intersection which could be employed would be
min = 15. With this limitation on phase angle, however,
the positive (or variable) half of the hybrid inverter
cannot produce enough additional voltage to overcome the
forward voltage drop of the inverting half of the hybrid
inverter leaving a residual voltage across the DC terminals
that prevents operation of the control at full rated speed.
It is desired that the minimum firing angle ~ be 0,
but 0 corresponds to the peak of the cosine wave where
the slope is zero, and no intersection can be achieved
with a DC voltage. To achieve an intersection at this
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point, it is necessary to introduce a distinct discontinuity
at zero degrees to ensure an intersection even though
the control voltage EC exceeds t~e peak amplitude of the
cosine wave. This is accomplished by summing a rectified
sine wave with the cosine wave which efectively increases
the amplitude of the cosine wave at zero degrees, permitting
an intersection to occur for angles of 0 or even less.
This technique ensures that ~ min occurs a-t 0 or earlier
and that thyristors TH1, TX3 and TH5 can be gated into
conduction at the very earliest possible moment.
Figure 9 illustrates the phase control and ~
limit waveforms associated with thyristor TH3 and showing
the gating waveforms for ~ min (l~ss than 0) and
max (165).
OVERALL SYSTEM
A complete system diagram for a wound rotor
motor controller embodying the present invention is
constituted by Figure 10. In that Figure and Fig. l the
wound rotor motor is shown at 50, the power factor
correcting capacitors at 60, the rectifier at 70, the
hybrid inverter at 80 and the system control and protection
logic at 90.
While preferred embodiments of the present
invention have been disclosed herein, those skilled in
the art will appreciate that changes and modifications
can be made therein without departing from the spirit
and scope of the invention as defined in the appended
claims. Thus, for example, while a three phase system
has been disclosed herein, the invention could be practised
using a single phase. Also, while thyristors constitute
the preferred devices for practising the present invention,
other gate-controlled, bistable, unidirectional conduc-ting
devices could be employed.
