Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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PROTECTIVE CIRCUIT FOR THRUSTER
SWITCHES USED IN STATIC VAT GENERATORS
BACKGROUND OF THE INVENTION
Field of the Invention:
_
This invention relates generally to surge pro-
tooting means for a static VAT generator circuit and more
S particularly to surge protecting means for anti-parallel
thruster utilized in static VAT generators in switching
high power capacitor banks.
Description of the Prior art:
The equipment that comprises switched capacitor
banks is generally known as static VAT generators. Under
normal system voltage conditions, the controlled closing
and opening of the thruster switches to insert capacitor
banks into and out of an AC network does not generate a
significant amount of current transients. The AC Theresa
ion switch of the capacitor bank is implemented by con-
netting several thrusters in series in an anti-parallel
configuration. One of the considerations of a thruster
array design is that the individual thrusters share the
voltage stresses equally during the various states ox
conduction and current blocking. The problem of limiting
voltage stresses during the beginning of conduction lot-
lowing a firing pulse is handled mainly by the Somali-
Tunis firing of all thrusters via short delay, matched
firing circuits. This way, all thrusters turn on within
a few microseconds. When, after current conduction the
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thruster array is turned off, the voltage transfer to the
switch must also be implemented without over stressing
individual thrusters in the array.
If the thruster array is turned on or misfired
at non-zero switch voltages high transient currents may
result. Since the thruster switch is rated to handle
capacitor bank currents at a certain voltage and at a
certain frequency, misfiring result in extreme stresses
that greatly exceed the withstanding capability of the
- 10 thruster switch.
SUMMARY OF THE INVENTION
There is provided by this invention a unique
circuit monitoring and control circuit that detects excess
size current surging conditions and avoids excessive
voltage stresses on the thruster array under high surge
conditions by preventing the ~hyristor switches from
shutting off at the zero current crossovers with con-
trolled refiring of the thruster arrays before its
current zero crossing.
BRIEF DESCRIPTION OF 'EYE DRAWING
Figure 1 is a typical power circuit for the
capacitor bank of a prior art static VAT generator;
Fig. 2 illustrates voltage switch and current
waveforms for the static VAT generator shown in Fig. 1;
Fig. 3 illustrates the voltage and corresponding
current waveforms that may result from a misfiring of the
static VAT generator shown in Fig. 1;
Fig. 4 is a schematic of the surge protecting
circuit incorporating the principles of this invention;
Fig. 5 illustrates waveforms of control pulses
and a corresponding voltage and current waveforms for a
static VAT generator incorporating the principles of this
invention; and
figs. pa and 5b illustrate control pulse wave-
forms and the corresponding voltage and current waveforms
for the respective positive and negative test sequences of
a static VAT generator incorporating the principles of
this invention.
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BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to Fig. 1 there is shown a typical schematic
for a prior art static VAT generator power circuit utilized for
switching capacitors into an AC network. The prior art control
system for controlling the normal operation of the thruster
switches is taught in US. Patent 4,307,331, entitled "Hybrid
Switched-Capacitor Controlled-Inductor Static Van Generator
And Control Apparatus" issued December 22, 1981 to Lasso Judge
and assigned to the same assignee as the present invention.
Particular attention is called to Figure 2 the "Firing Circuits"
identified by reference symbol 29 and those parts of the specie
ligation associated therewith In the present arrangement an
inrush current limiting reactor L is connected in series with
the capacitor bank C in order to limit the theoretically very
high value of inrush current into a capacitance when it is con-
netted to a voltage source different from its own voltage. The
value of the reactor L is frequently chosen so that it provides
a harmonic current filter with its associated capacitor. Typical
filters are tuned to the third, fifth, seventh, etc., harmonics
of the AC power network. Sometimes a damping resistor R here
shown in parallel with the reactor L is added to dampen oscil-
lotions of the L-C harmonic filter. The AC thruster switch
of the capacitor bank is implemented by connecting several
thrusters THY in series in an anti-parallel configuration.
One of the major considerations of a thruster array design is
that the individual thrusters share the voltage stresses equally
during the various states of conduction and current blocking.
Referring to Fig. 2, there is illustrated wave
forms for the voltage and currents typical of the operating
characteristics of the static VAT generator shown in Fig. 1
Point A in Fig. 2 illustrates the inrush switching surge
current IS when the line voltage AL and the voltage across
the switch Us are at their zero cross-over point thus demanding
that the thrusters conduct the maximum current available.
Ideally the thruster should be switched at point B when the
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line voltage AL is at its peak and the thrusters are turned
on at the current Nero cross-over. The capacitor voltage
VC and the consequent voltage buildup Us on the switch due
to the stored inductive energy in L, is seen by the anti
parallel connected thruster arrays. The off going arrays
sees it as a reverse voltage, the other one sees it as a
forward volt
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tare and forward dV/dT. All of these stresses must buckwheat under prescribed values for proper and safe operation
of the thruster switch. This must include the effect of
thrusters with unbalanced stored capacitor charges in the
thruster array.
Referring to Fig. 3 there is illustrated the
severe switch current surging charges that result when the
capacitors have been charged to the negative line voltage
peak and the thruster array is misfired to insert the
capacitor bank into the AC network at a time when the
system line voltage AL has reached its positive peak. Due
to the inherent characteristics, the thyrlstors would
normally cut off at the first current zero crossing of the
high surge in current generated due to the misfiring,
however, if a protective circuit were provided that gives
advanced indication of the switch current zero crossing so
that firing pulses can be provided to keep the thruster
arrays connected in the circuit to allow the transient
current to dissipate the excessive stress would be mini-
mixed.
A block diagram of a protective circuit is Shannon fig. that keeps the thrusters turned on minimizing,
excessive stresses created when if they required to block
high surging currents. Its operation is based on first
extracting the harmonic current component from the switch
current by the sensing filter SF. It then compares the
harmonic current magnitudes to fixed level references.
When the harmonic current magnitude exceeds either the
positive or the negative reference, a refiring of the
thruster switch is initiated. Once a refiring is in-
tinted, the duration of the firing pulses is extended by a
retriggerable monostable multi-vibrator RUM. The moo-
stable time constant, T, is longer than the duration of
one cycle of the harmonic current but shorter than the
duration of one-half cycle of the 60 hertz fundamental.
The action of the monostable thus maintains a continuous
firing signal to the thruster switch during the high
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transient harmonic current conditions initiated by the
inadvertent firing pulse.
The sensing filter SF contains only passive
components in the forms of two series connected different
tinting stages R1C1 and R2C2, and a low pass filter R3C3.
The differentiating action, with ARC filters, is stopped as
shown above frequencies indicated by the R-C time con-
slants. The time constants of the differentiation are
selected to lie above but close to the transient harmonic
frequency. This results in minimal noise amplification of
the differentiator. The output of the sensing filter SLY
Vfilt, is proportional to the differentiation of the
diS/dt after a low pass filter of R3C3. Using the second
derivative of the switch current instead of the first one
provides several advantages. At a fixed sinusoidal her-
manic frequency, Is diSjdt and d2iS/dt2 have fixed,
mathematically established relationships. It means that
knowing any of them perfectly defines the other two.
Therefore, after correction for insertion losses, the
amplitude of the filtered d2iS/dt2 can represent diSJdt.
The most important difference gained is that the filter
deadweight signal leads Is by more than 90 degrees and thus
provides the generation of the refiring signal sanely
before the actual zero crossing of IS. The other ad van-
tare is that some of the theoretically 180 degree phase advance of the deadweight signal can be sacrificed via
inserting the low pass filter R3C3. This, on the other
hand, permits the insertion of pure capacitance, C3,
across the common inputs of the magnitude comparatives
AMP-l and AMP-2. The comparators noise immunity is,
therefore, greatly increased.
The magnitude comparators AMP-l and AMP-2 can be
conveniently implemented with integrated circuit compare
ions. Whenever the capacitor current exceeds the pro-
scribed magnitudes, the "OARED comparator outputs, one ox
the comparators will respond with a low output state. The
low output of the comparator rapidly discharges the nor-
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molly fully charged capacitor C4. When a comparator output opens, the monostable timing becomes active with
R5C4 time constant. The output level of the timer, VmOno,
is sensed by a third comparator AMP-3. While VmOno stays
below a preset level, one-half of the positive supply
voltage V+ is indicated, a refire output is generated. As
can be seen in Fig. 5, a continuous refiring request is
generated due to the monostable action. The refiring
signal is maintained while the transient harmonic current
magnitude is considered to have dangerously high levels.
Referring to Figs. 4, pa and 6b the testing of
the refiring circuit during normal control firing pulses
is illustrated. The first control firing pulses turns on
a fully discharged capacitor bank in the positive line
voltage half cycle illustrated in Fig. pa. The test
positive sensor signal is simultaneously issued as India
acted. lye relatively short test signal initiates the
monostable timing and a refire signal is generated. If
the refiring circuit responds as expected, protection is
considered operational. The response is tested by setting
a set-reset flip flop with test rQguest and resetting it
with the refire response. If once set, the test flip flop
must be reset within a certain time, To. Otherwise a
protection failed signal is generated. A protection
failure is indicated during the third firing pulse in fig.
pa. Testing the negative sensor is illustrated in Fix.
6b. Here a capacitor bank is turned on in the negative
half-cycle of the line voltage. A test negative signal is
generated simultaneously with the control firing pulse
similarity as herein described. Simulation of a sensor
failure is indicated during a second control firing pulse.
It can be readily seen that there is provided by
this invention a new surge protective circuit for Theresa-
ion switches utilized in static VAT generators for switch-
in capacitor banks into an AC network.
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Although there has been illustrated and described a specific embodiment, it is clearly understood
that the same were merely for purposes of the illustration
and that changes and modifications may be readily made
therein by those skilled in the art without departing from
the spirit and scope of this invention.
