Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
~233S18
1 11-ME-13
POWER SUPPLY AND POWER MONITOR
FOR ELECTRIC METER
BACKGROU~D OF THE INVENTION
The present invention relates to electric
meters and, more particularly, to power supplies and
power monitors for electronic demand registers of
S electric meters.
Conventional electric meters employ an
aluminum disk driven as a rotor of a small induction
motor by an electric field at a speed which is
proportional to the electric power being consumed by
a load. Geared dials, or cyclometer discs, integrate
the disk motion to indicate the total energy
consuMed, conventionally measured in kilowatt hours
(one kilowatt hour equals one thousand watts of power
consumption for one hour).
In addition to the above measurement of
consumption, some electric meters contain means for
separating the consumption into those parts of
consumption occurring during pea~ and off-peak hours
(however defined) and for recording maximum demand
during a predetermined period of time in order to
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2 11-ME-134
adjust billing according to such parameters. In one
such dernand meter disclosed in U. S. Patent
3,586,974, a mechanical demand register records the
power usage during a predetermined period of time
and stores the value for reading. The predetermined
period of time may be, for example, the time between
meter readings, or a period of time corresponding to
the billing period of the utility providing the
power A clockwork mechanism restarts the demand
register at the ends of regular demand intervals of,
for example, a fraction of an hour, so that, at the
end of the predetermined period, the stored value
represents the highest value of power usage occurring
during any one of the regular demand intervals in the
predetermined period.
Demand registers of the mechanical type, such
as disclosed in the above U. S. Patent, have limited
flexibility. Once their design is completed for a
particular meter physical configuration, the design
is not transferrable to a meter having a different
physical configuration. In additi.on, the
demand-measurement functions cannot be redefined
without major mechanical redesign.
Greater flexibility may be obtainable using
electronic acquisition, integration and processing of
power usage. An electronic processor such as, for
example, a microprocessor may be emyloyed to manage
the acquisition, storage, processing and display of
the usage and demand data. U. S. Patents 4,179,654;
4,197,582; 4,229,795; 4,283,772; 4,301,508; 4,361,872
and 4,368,519, among others, illustrate the
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3 11-ME-134
fleY.ibility that electronic processing brings to the
power and energy usage measurement. Each of these
electronic measurement devices includes means for
producing an electronic signal having a
S characteristic such as, for example, a frequency or a
pulse repetition rate, which is related to the rate
of power usage. The electronic processor is
substituted for the mechanical demand register of the
prior art to keep track of the power usage during
defined periods of time.
An elec~ronic processor of an electronic
demand register conventionally employs volatile
random access memory for the high speed and low power
consumption characteristics offered by such devices.
lS However, several events can occur during normal and
emergency conditions which can threaten the integrity
of data being recorded for billing purposes in
volatile random access memory. If a power outage, by
removing power from the processor and the random
access memory, were allowed to erase all data stored
in random access memory, then the billing data
contained in the erased data would be lost. This is,
of course, unacceptable. Some means, therefore,
appears desirable for storing data in non-volatile
memory when a power outage occurs. On the converse,
certain normal deviations of the line power, such as,
for example, momentary overvoltage, surges, noise
and mornentary power outages enduring for a very short
time period, must be tolerated.
3~f~33~18
4 11-ME-134
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention
to provide an electronic demand register which
overcomes the drawbacks of the prior art.
S It is a further object of the in~ention to
provide an electronic demand register of the type
employing a digital processor and a random access
memory which includes means for storing volatile data
in a non-volatile storage medium upon the occurrence
of a predetermined deviation from normal power
conditions but which further includes means for
ignoring momentary deviat.ions of the power
conditions from normal.
Briefly stated, the present invention
provides an electronic register for an electric meter
having a non-volatile storage into which data is
writ,en upon the detection of an impending power
outage. A sufficient quantity of ele~tric energy is
normally stored in a capacitor to continue operation
of the electronic register for a long enough period
of time to complete the writing of data to the
non-volatile storage. In order to prevent writing of
the data to non-volatile storage in the presence of
noise or momentary power outages, when the voltage in
the capacitor decays to a point whlch indicates an
impending power outage, a timer-is s~arted. If the
voltage is not restored before the end of the timing
cycle of the timer, then the data is written to the
non-volatile storage. If the voltage is restored
before the end of the timing cycle, then writing of
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11-ME-134
the data to the non-volatile storage is prevented.
According to an embodiment of the invention,
there is provided an electronic register for an
electric meter of the type effective to
electrically accumulate data representing at least
a usage of an AC electric power by a load using an
electronic processor, the electronic processor
including a volatile data storage comprising a
non-volatile data storage, a DC power supply
effective for producing at least one DC voltage from
the AC electric power, means in the DC power supply
'or storing a predetermined quantity of stored
electric energy during normal delivery of electric
power to the load, sensing means responsive to a
predetermined level of depletion of the stored
electric energy for writing at least some of data
from ~he volatile data storage to the non-volatile
data storage-, the predetermined quantity of stored
electric energy being sufficient to maintain the
data in the volatile data storage and to transfer
the data to the non-volatile data storage in the
absence of the electric power to the load and the
sensing means including means for preventing the
writing in response to a pouer outage which con-
tinues for less than a predetermined period of time.
Accurding to a feature of the invention, thereis provided a method for controlling an electronic
register of an electric meter o~ the type effective
to electrically accumulate data representing at
least a usage of an AC electric power by a load
using an electronic processor, the electronic
processor including a volatile data storage com-
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6 11-ME-13
prising producing at least one DC voltage from
the AC electric power, storing a predetermined
quantity of stored electric energy during normal
delivery of electric power to the load, sensing a
predetermined level of depletion of the stored
electric energy for writing at least some of data
from the volatile data storage to a non-volatile
data storage, the predetermined quantity of stored
electric energy being sufficient to maintain the
data in the volatile data storage and to transfer
the data to the non-volatile data storage in the
absence of the electric power to the load and
preventing the writing in response to a power outage
which continues for less than a predetermined period
of time.
The above, and other objects, features and
advantages of the present invention will become
apparent from the following description read in
conjunction with the accompanying drawings, in which
like reference numerals designate the same elements.
~RIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a schematic diagram of an electric
meter t~ which the present invention may be applied.
Fig. 2 is a block diagram of a demand
register of Fig. 1 according to-an embodlment of the
invention.
Fig. 3 i9 El block diagram of a power supply
and power monitor of Fig. 2.
Fig. 4 is a schematic diagram of an unregulated
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supply and emergency storage circuit of Fig. 3.
Fig. 5 is a schematic diagram of a regulator
of Fig. 3.
Fig. 6 is a schematic diagram of a power failure
detector circuit of Fig. 3.
Fig. 7 is a schematic diagram of a processor
reset generator of Fig. 3.
Fig. 8 is a curve showing the reset signal
versus regulated DC supply voltage.
DETAILED DEC,CRIPTION OF THE PR~FERRED EMBODIMENT
Although the present invention may be adapted
to any suitable style of electric meter which employs
an element rotating at a speed proportional to power
consumption, including single phase meters with one
or more current windings and polyphase meters, for
concreteness~ the detailed description which follows
is directed toward an illustrative example of a
2-wire single phase meter of the type having a single
current coil and a single voltage coil.
Referring now to Fig. 1, there is shown,
generally at 10, an electric meter which includes a
small induction motor 12 driving a register 14.
Induction motor 12 includes a stator 16 made up of a
voltage coil 18 and a current coil 20 disposed on
opposite sides of a disk 22. Voltage coil 18 ernploys
a core 24 upon which is wound a lsrge nurnber of turns
of fine wire, Voltage coil 1~ is connected across
lines 26 and 28 which feed power to a load (not
shown). Current coil 20 employs a core 30 upon which
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8 11-ME-136
a small number of turns, typically one or two, of
heavy conductor are wound. Current coil 20 is
connected in series with the power being fed to the
load on line 26
Disk 22 is affixed to a shaft 32 which is
supported on suitable bearings (not shown) to permit
concerted rotation of disk 22 and shaft 32 under the
influence of a rotating magnetic field produced by
the combined influence of voltage coil 18 and current
coil 20. A permanent magnet 34, having its poles
disposed on opposite sides of disk 22, applies a
retarding force which is proportional to the
rotational speed of disk 22. The rotational torque
produced by voltage coil 18 and current coil 20
combined with the retarding torque produced by
permanent magnet 34 is effective to rotate disk 22 at
a speed which is proportional to the product of the
voltage and the current, that is, the power, consumed
by the load.
Register 14 includes a watthour register 36
which may include, for example, a plurality of dials
38 which are suitably geared and driven by a suitable
mechanical coupling 40 in proportion to the rotation
of shaft 32. In the embodiment shown, mechanical
coupling 40 includes a worm 42, which may be
integrally formed in shaft 32, which engages and
rotates a worm gear 44. Addi~ional elements may be
present in mechanical coupling 40 for coupling the
rotation of worm gear 44 to watthour register 36 with
or wi~hout change in speed and direction according to
the design of the particular electric meter 10. As
is conventional, watthour register 36 totals the
. . .
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9 11-ME-134
number of revolutions of shaft 32, suitably scaled ~y
the gear ratios employed, for billing purposes.
A demand register 46, shown schematically as
a box in Fig. 1, is also connected by a suitable
coupling means 48 to respond to the rotation of shaft
32. In the prior art, demand register 46 is
conventionally a mechanical register having dials, or
other indicating devices (not shown), and coupling
means 48 is conventionally a mechanical arrangement
including shafts and gearing driven by rotation of
shaft 32. The dials or indicating devices in the
mechanical embodiment of demand register 46 are urged
forward for a fixed period of time by a pusher
mechanism (not shown). The pusher mechanism is reset
and restarted at the end of each of the fixed periods
of time, leaving the indicating devices with an
indication proportional to the power usage (the
demand) during the fixed period of time. The
indica.ion on the indicating devices a~ any time is,
therefore, the highest demand which has occurred
during any of the time periods since the last time
the indicating devices were reset. The recorded
demand is em~loyed in billing. In the present
invention, demand register 46 is an electronic demand
register.
Referring nou to Fig. 2, there is shown, a
simplified block diagram of a demand re~.ister 46
according to an embodiment of the invention. For
present purposes, it ls sufficient to note that the
signal related to power usage fed from coupling means
48 to demand register 46 is an electronic signal
having a characteristic such as, for example, a
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11-ME-134
fre~uency, which is variable in dependence on the
rate of power usage. Any suitable electronic signal
generating apparatus, such as disclosed in the
referenced prior patents, may be employed to produce a
power usage signal which is applied on a line 50 to a
processor 52 in demand register 46. Processor 52
appropri3tely performs calculations on the usage data
to derive desired demand parameters and stores the
result. In addition, processor 52 may provide an
output on a line 54 suitable for driving a display
56. In addition, the stored data may be transmitted
on a line 5~ to a remote location (not shown) for
further analysis and/or billing.
Due to the extremes of environment in which
electric meters may be used, display 56 may need
special compensation for environmental parameters.
Such special compensation may include a display
temperature compensator 60 whose detailed structure
and function are not of interest to the present
disclosure.
The data which processor 52 transmits for
display and/or the manner in which processor 52
operates on the input data to produce internally
stored values may be modified according to a manual
input 62 which is not of concern to the present
disclosure.
As previously noted, processor 52
conventionally employs volatile~random access memory
elements which lose any data stored in them in the
event of a power outage. This is usually not
acceptable in an electric meter where such loss of
usage and/or demand data has a negative financial
35~3
11 11-ME-134
impact on the utility supplying the electric power
Non-volatile storage elements such as, for example,
electrically erasable programmable read only memory
elements, are well known for use with processor 52.
l~owever, such non~volatile storage elements normally
have relatively slou memory erase and write times on
the ordèr of 10 or 20 milliseconds. This is too slow
for most applications. In addition to this drawback,
the power required to write such memory elements is
quite high compared to that required by volatile
memory elements of processor 52. Finally, a wear-out
mechanism in electrically erasable programmable
read only memory cells limits the number of times
they can be erased and re-recorded. About 10,000
cycies of write and erase brings such a memory
element to the end of its reliable useful life.
Memory elements in processor 52 must, of course, be
written and erased many thousands of times a day.
Thus, an electrically erasable programmable read
only memory would have a Yery short life as the
operating memory for processor 52. In its role in
non-volatile memory 64, however, electrically
erasable programmable read only memory elements are
erased and rewritten only when a relatively serious
power outage occurs and possibly during a relativèly
small number of test cycles. Such operations are not
eY.pected to occur on a frequent enough basis in the
register of an electric meter t~ represent a limit on
the life of the register.
In order to provide safe storage for data
and/or programmed constants during a power outage, a
conventional non-vo]atile memory 64 is provided into
.
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12 11-ME-134
which such data and constants can be written in the
event of a power outage and from which the data and
constants can be again read upon restoration of
normal conditions.
A power supply and power monitor 66 receives
AC power from lines 26 and 28 for the production of a
regulated DC voltage which is applied on a line 68 to
all circuits in demand register 46 requiring such
power. In addition to producing regulated DC power,
power supply and power monitor 66 also monitors the
condition of the AC power on lines 26 and 28 and, in
response to certain detected conditions, applies
control signals on a line 70 to processor 52 which
controls the transfer of data from processor 52 to
non-volatile memory 64 in the event of an apparent
power outage and resets processor 52 in the event of
an actual power outage.
Referring now to Fig. 3, the AC power on
lines 26 and 28 is fed to an unregulated supply and
- 20 emergency storage 72 which includes a rectifier for
rectifying the AC power to produce a pulsating
unregulated DC output on a line 74. The unregulated
DC power on line 74 ~ay have any convenient voltage
such as, for example, 18 volts. Unregulated supply
and emergency storage 72 also includes sufflcient
capacitive storage to maintain power to critical
circuits in demand register 46 for a long enough
period after an apparent power outage is detected to
permit transfer of billing data and programmed
constants from the volatile random access memory in
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13 11-ME-13
processor 52 to safe storage in non-volatile memory
64.
The unregulated ~C power on line 74 is
applied to inputs of a power failure detector 76 and
a regulator 78. Regulator 78 produces a regulated DC
output voltage which is applied on line 68 to using
circuits throughout demand register 46. In addition,
the regulated DC output of regulator 78 is appl~ed to
inputs of power failure detector 76 and a processor
reset generator 80.
In summary, when a momentary power outage on
lines 26 and 28 cause the voltage of the unregulated
DC voltage to fall below a first threshold value, a
timer is started. If the unregulated DC voltage does
not rise above a second threshold, slightly higher
than the first threshold before the timer times out,
processor 52 is commanded to transfer billing data
and programmed constants to non-volatile memory 64..
The energy stored in unregulated supply and emergency
storage 72 is sufficient to maintain operation of all
functions in demand register 46 for a period of power
outage which includes a time required for the
unregulated voltage to decay to the first threshold,
the timing cycle of the timer and the time required
to store the data in non-volatile memory 64.
Finally, if the regulated supply voltage falls below
a third threshold at which proc~ssor 52 is no lon~er
able to reliably maintain its operating conditions, a
reset signal i5 produced to reset processor 52. The
third threshold is set lo~ enough that all data is
safely stored in non-volatile memory 6~ before a
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14 11-ME-134
reset signal may be generated.
The regulated DC output of regulator 78 is
applied to a second input of power failure detector
76 and to an input of a processor reset generator 80.
Regulator 78 is capable of maintaining the regulated
DC voltage at its full value while the unregulated DC
voltage fed to it decays substantially. Thus, the
regulated DC voltage is used as a reference in power
failure detector 76 to detect the decay of the
unregulated DC ~oltage below the first threshold.
~hen the unregulated DC voltage decays below the
firs, tr.reshold which may be, for example, about 14.8
volts, power failure detector 76 applies a low
voltage warning signal on a line 82 to an input of a
lj low voltage timer 84.
Immediately upon receiving the low voltage
warning signal, low voltage timer 84 applies a low
voltage acknowledge signal on a line 86 to a third
input of power failure detector 76. The presence of
the low voltage acknowledge signal is effective to
raise the threshold above which the unregulated DC
voltage must rise before the low voltage warning
signal i9 removed from low voltage timer 84. This
second threshold may be, for example, about 15.6
volts. The hysteresis applied by changing the
threshold in this way prevents power failure detector
76 from rapidly turning the low voltage warning
signal on and off in the presence of small variations
in the unregulated DC voltage.
If the timing cycle is not interrupted before
its end by the resoration of the unregulated DC
voltage to a value above the second threshold, low
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15 11-ME-134
vol~age timer 84 applies an emergency store signal on
line 70a to processor 52. This initiates the writing
of data from the volatile random access memory in
processor 52 to non-volatile memory 64.
The length of the timing cycle of low voltage
timer 84 is established at a value which is long
enough to ensure thst the reduction ln the
unregulated DC voltage probably results from a
serious power outage rather than from surges, noise
or a purely momentary power outage. The timing cycle
must, however, be short enough so that stored energy
in unregulated supply and emergency storage 72
rema~ns sufficient at the end of the timing cycle to
maintain the necessary functions in demand register
46 for a period beyond the end of the timing cycle
and to supply the power required to write data to
secure storage in non-volatile memory 64.
: Although the amount of energy storage in
unregulated supply and emergency storage 72 and the
length of the timing cycle of low voltage timer 84
may vary for different applications, in the preferred
embodiment, unregulated supply and emergency storage
72 is capable of storing enough energy to maintaln
demand register 46 for a timing cycle of about 120
milliseconds and then is able to supply about 15
milliamperes for a period of about 250 milliseconds
for writing the dsta to non-volatile memory 64.
Referring now to Fig. 4 the AC supply on
lines 26 and 28 is applied through dropping resistors
Rl and R2 to a full-wave bridge rectifier composed of
diodes Dl, D2, D3 and D4. The pulsating DC output of
the bridge rectifier is applied to a parallel
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16 11-ME-134
combination of a breakdown, or avalanche, diode D5 and
a storage capacitor C1.
The values of resistors Rl and R2 are chosen
to drop the line voltage to a value consistent with
the outpu~ voltage and current. In the preferred
ernbodiment, a load of from about 5 to about 10
milliamperes may be expected. For this load and an
unregulated DC voltage of about 18 volts, the values
of resistors Rl and R2 may be about 5K ohms. One
skilled in the art would recognize that, in some
applications, resistors Rl and R2 may be replaced
with a step-down transformer (not shown). If a
step-down transformer is employed, a resistor of
small value may be inserted in series between the
secondary of the transformer and the bridge rectifier
to limit the inrush current. For an unregulated DC
voltage of 18 volts, breakdown diode D5 may
convPniently be a lN4746 diode having a breakdown
voltage of 18 volts.
Storage capacitor Cl must have a capacitance
sufficient to permit it to feed energy to the
succeeding circuits for the timing period of low
voltage timer 84 plus the energy required to write
the data into non-volatile memory 64. In the
preferred embodiment, a capacitance of about 1000
microfarads appears satisfactory. If the using
circuits require more or less energy to safely
perform their func~ions upon the detection of a power
outage or, if more or less time is required for
completion of the data transfer to non-volatile
memory 64, then a larger or smaller value of
capacitance in storage capacitor Cl may be required.
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17 11-ME-13
One skilled in the art with the present disclosure
before him would be fully enabled to select an
appropriate value of capacitance for storage
capacitor Cl without requiring experimentation.
Referring now to Fig. 5, regulator 78 is seen
to contain a field effect transistor Q1 as a series
element and a breakdown, or avalanche, diode D1 as a
reference element to control a regulator transistor
Q2 which regulates the series resistance of field
effect transistor Q1 upward or downward as necessary
to closely maintain the output voltage in th~
vicinity of the desired regulated DC voltage such as,
for example, 5 VDC.
Referring now to Fig. 6, power failure
detector i6 includes a threshold detecting transistor
Q1 which receives the regulated DC voltage at its
emitter and the unregulated DC voltage through an
input resistor to its base. The low voltage
acknowledge signal orl line 86 is applied to the base
of threshold detecting transistor Ql. In addition, a
resistor R3 and a capacitor Cl are connected in
parallel from the base of threshold detecting
transistor Q1 to ground. The collector of threshold
detecting transistor Ql provides the low voltage
warning signal on line 82.
In operation, the low voltage acknowledge
signal on line 86 is normally high which, in
the preferred embodiment, is about ~5 volts, and the
unregulated DC voltage added to it for application to
threshold detecting transistor Q1 is sufficient to
norrnally cut off threshold detecting transistor Q1 by
the fact that its base is held more positive than its
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18 11-ME-134
emitter. ~he resistance values of resistors Rl, R2
and R3 are selected so that, at the first threshold
value of, for example, 14.8 volts, the voltage drops
in resistors R1, R2 and R3 reduce the voltage applied
S to the base of threshold detecting transistor Ql to a
value that is less positive than that of the
regulated DC voltage. This turns threshold detecting
transistor Ql on and thus applies an approximately 5
V~C output signal on line 82 to represent the low
voltage warning. Upon generation of the low voltage
warning signal, the lou voltage acknowledge signal
fed back on line 86 switches from high to low. It
thus requires a higher value of voltage on line 7~ co
cut off threshold detecting transistor Ql than it did
to turn it on.
Low voltage timer 84 may be any convenient
device such as, for example, a one-shot multivibrator
or an integrated circuit timer. In the p.e erred
embodiment of the invention, however, the
availability of processor 52 makes it desirable ~o
employ the timing capabilities of processor 52 rather
than to provide a separate hardware element to
perform this function. In the preferred embodiment,
processor 52 is an NEC7503 microprocessor. This type
of microprocessor can be programmed to produce a low
on one of its outputs when one of its inputs is
driven high. This output is conveniently the source
of the low voltage acknowledge s gnal on low voltage
timer 84. Furthermorel when the above input is
driven high, processor 52 begins the timing cycle
previously described and, if the input does not
return low, or floating, before the end of ~he timing
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19 11-ME-134
cycle, the data transfer to non-volatile memory 64 is
begun.
After the data has been saved in non-volatile
memory 64, provided that the power outage does not
last long enough to substantially reduce the voltage
of the regulated DC suppl~, when the unregulated DC
voltage returns to a value above about 15.6 volts,
the low voltage warning signal on line 82 is removed
and processor 52 is again enabled to perform normal
processing of the usage data.
If the power outage endures long enough that
the unregulated DC voltage drops to a value that is
no longer high enough to maintain the regulated DC
voltage at about its operating value, a reset signal
is applied to processor 52 by processor reset
generator 80. It is also convenient for processor
~ reset generator 80 to produce a reset sign21 for
processor 52 during normal power-up as the regulated
DC voltage rises from zero to its normal value
Referring now to Fig. 7, processor reset
generator 80 is seen to contain a switching
transistor Ql whose base is connected to the
regulated DC supply through a breakdown, or
avalanche, diole Dl in series with a resistor Rl. A
second resistor R2 is connected between the base of
switching transistor Q1 and ground. In the preferred
embodiment, breakdown diode Dl has a breakdown
voltage of about 2.7 volts and resistors Rl and R2
have equal resistance values.
In operation, when the regulate~ DC supply
voltage is below a threshold value, switching
transistor Ql is cut off and the reset signal on line
~33~B
11-ME-13L
70b follows the regulated DC supply v~~.tage. At and
above the threshold voltage, switching transistor Ql
is turned on and thus holds line 70b low. This
relationship is illustrated in Fig. 8. When the
regulated DC supply voltage decreases from its
nominal value of 5 volts to a threshold value of
about 3.9 volts the voltage on line 70b jumps from
about zero to about 3.9 volts and follows the supply
voltage as it decreases. The reset signal as shown
in Fig. 8 therefore provides a reset signal ~oth when
the regulated DC supply voltage decays below the
threshold as well as a normal reset as the regulated
DC supply voltage comes up following a power outage
or during a normal turn-on.
Having described preferred embodiments of the
lnvention with reference to the accompanying
drawings, it is to be understood that the invention
is not limited to those precise embodiments, and that
various changes and modifications may be effected
therein by one skilled in the art without departing
from the scope or spirit of the invention as defined
in the appended claims.
