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Sommaire du brevet 1255406 

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  • lorsque le brevet est émis (délivrance).
(12) Brevet: (11) CA 1255406
(21) Numéro de la demande: 1255406
(54) Titre français: CIRCUIT ELECTRONIQUE A TRANSISTORS EN COUCHES MINCES POUR CONTROLER UN DISPOSITIF MATRICIEL
(54) Titre anglais: ELECTRONIC CIRCUIT FORMED FROM THIN FILM TRANSISTORS FOR CONTROLLING A MATRIX DEVICE
Statut: Durée expirée - après l'octroi
Données bibliographiques
(51) Classification internationale des brevets (CIB):
  • G09G 03/20 (2006.01)
  • G09G 03/36 (2006.01)
(72) Inventeurs :
  • MORIN, FRANCOIS (France)
  • SERGENT, JACQUES (France)
  • DELAPLACE, STEPHAN (France)
(73) Titulaires :
(71) Demandeurs :
(74) Agent: LAVERY, DE BILLY, LLP
(74) Co-agent:
(45) Délivré: 1989-06-06
(22) Date de dépôt: 1985-11-28
Licence disponible: S.O.
Cédé au domaine public: S.O.
(25) Langue des documents déposés: Anglais

Traité de coopération en matière de brevets (PCT): Non

(30) Données de priorité de la demande:
Numéro de la demande Pays / territoire Date
84 18110 (France) 1984-11-28

Abrégés

Abrégé anglais


-11-
ABSTRACT
Electronic circuit formed from thin film transistors for
controlling a matrix device.
This circuit comprising Nxn outputs for controlling Nxn
rows of a matrix device is characterized in that,
it comprises a multiplexing circuit, formed from
N groups of n successive thin film transistors, a first
shift register with N outputs and a second shift
register n outputs, the gates of the n transistors of
the same group being connected to the same output of the
first register, whereby to each group corresponds a
different output of said first register, the source of
each transistor being connected to a different row or
column, the drain of the ith transistor of each group
being connected to the ith output of the second
register, i being an integer such that 1 ? i ? n.
B 8304.C LC

Revendications

Note : Les revendications sont présentées dans la langue officielle dans laquelle elles ont été soumises.


The embodiments of the invention in which an
exclusive property or privilege is claimed are defined
as follows:
1. An electronic control circuit having Nxn
outputs for controlling Nxn conductive lines of a
matrix device, such as a matrix display, comprising: a
single multiplexing circuit formed from N groups of n
first successive thin film transistors, a first shift
register with N outputs, and a second shift register
with n outputs, the gates of said first n transistors
of the same group being directly connected to the same
output of the first register, whereby to each group
corresponds a different output of said first register,
the source of each first transistor being directly
connected to a different conductive line, the drain of
the ith first transistor of each group being directly
connected to the ith output of said second register, i
being an integer such that 1 ? i ? n.
2. An electronic circuit according to claim 1,
comprising second thin film transistors, both said
first and second transistors being provided on one
insulating support.

Description

Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.


~s~
ELECTRONIC CIRCUIT_FORMED FROM THIN FILM TRANSISTORS
FOR CONTROLLING A MATRIX DEVICE
~ . . _ .
The present invention relates to an electronic circuit
formed fro~ thin film transistors (TFT) used for
controlling a matrix device.
More specifically, the invention relates to an
electronic circuit of the shift register type used for
sequentially controlling the rows or columns of a matrix
device and more particularly the rows or columns of a
liquid crystal display (flat-faced screen with active
matrix, screen for instrument panel, etc),
1Q photosensitive video "retinas" with thin film
transistors, optical sensors or restoration heads for
telecopying systems having rows of photodiodes, sensors,
etc.
In an active matrix-type screen, an electronic memory
formed from memory points distributed over the entire
surface of the screen, stores the video signal for the
duration of the image. An electrooptical transducer,
particularly a liquid crystal, is in contact with each
memory point and is excited for the duration of the
image. Each memory point is located at the intersection
of a connecting row and column and is constituted by a
thin film transistor produced on an insulating support
and a capacitor, whose coatings are formed in the case
where the transducer is a liquid crystal by the
electrodes of the liquid crystal cell, the insulating
support forming one of the two walls of said cell.
The electronic circuits of the shift register type
considered for controlling such a active matrix have
been studied in TFT technology, but as they are so
complex it has not proved possible to produce them on a
large scale.
Thus, it is very difficult to produce a shift register
:
B 8304 C LC -~
;.. ..
'

with thin film transistors, particularly when i~ must
have a very large number of stages (300 to 500 and even
more, as a function of the number of ro~,7s or columns of
the flat-faced screen) and if there is any defect the
screen will not function.
Each stage of the shift register generally has two
elementary inverters and a capacitor for storing the
video information. Moreover, each inverter is formed
from at least two thin film transistors arranged in
cascade.
As the thin film transistors of the active matrix are
generally produced with amorphous silicon, they have a
low transconductance and a high input capacitance, so
that relatively low operating limit frequency for the
inverters is obtained and which is usually below the
scanning frequency of the rose of a very complex
flat-faced screen (300 to 500 rows).
Moreover, the operation of such a shift register is
highly dependent on the homgeneity of the
characteristics of the thin film transistors, so that
the efficiency is not very high.
It has also been considered to produce shift registers
of the charged transfer type, known as bucket brigade
devices (BBD) or charge-coupled devices (CCD), which
require fewer thin film transistors, but whereof the
fault density in the amorphous silicon has led to an
inefficiency of the transfer of charges.
It is for this reason that in existing active matrix
flat screens, the peripheral control circuits of these
screens are not integrated therewith, the control of the
screens being ensured by standard integrated circuits
located outside them Unfortunately, in such a system,
it is necessary to arrange a large number of boxes on a
B 830~.C LC

~5~
printed circuit connected to the flat-faced screen,
which causes problems of complex, difficult connections,
or alternatively the corresponding integrated circuits
or chips must be placed on the glass support, 50 that a
large number of welds have to be made.
In certain externally controlled flat-faced screens, the
cost thereof is high due to the cost of the control
circuits and the number of connections to be produced
between the flat-faced screens and the corresponding
circuits, or the number of welds to be made on the glass
support~ It is generally accepted that the peripheral
integrated circuits, i.e. all the row and column control
circuits of the flat-faced screen amount to half and
even more of the total costs for said screen.
The present invention is directed at an electronic
circuit formed from thin film transistors used for
controlling matrix devices and particularly active
matrix flat-faced screens making it possible to obviate
the aforementioned disadvantages. In particular, it
makes it possible to simplify the connection of the
peripheral integrated circuits with the active matrix,
whilst minimising the cost of said circuits and
consequently the total price of the flat-faced screens
by reducing the number of such peripheral circuits.
Thus, the invention relates to an electronic circuit for
controlling the rows or columns of a matrix device and
using on the one hand standard integrated circuits
outside the device for ensuring the shift register
function and on the other hand thin film transistors for
ensuring the multiplexing function.
More specifically the present invention relates to an
electronic control circuit Nxn outputs used for
controlling Nxn rows or columns of a matrix device and
more particularly a matrix display, wherein it comprises
B 8304.C LC
'' "'' ~
.... .

a multiplexing circuit, formed from N groups of n
successive thin film transistors, a first shift register
with N outputs and a second shift register n outputs,
the gates of the n transistors of the same group being
connected to the same output of the first register,
whereby to each group corresponds a different output of
said first register, the source of each transistor being
connected to a different row or column, the drain of the
ith transistor of each group being connected to the ith
1~ output o~ the second register, i being an integer such
that 1 ~ i ~ n.
The term matrix device is understood to mean a device
having only a single row or column of components.
These electronic control circuits only have two external
integrated circuits, which are the two shift registers
making it possible to supply via the multiplexing
circuit, Nxn rows or columns of a matrix device and more
particularly an active matrix flat-faced screen. Thus,
it is possible to reduce the number of connections to be
made between the external circuits and the flat-faced
screen, as well as to reduce the cost of such screens.
When the electronic circuit according to the invention
makes it possible to control the Nxn rows or columns of
a matrix device having thin film transistors formed on
the same insulating support, the thin film transistors
of the multiplexing circuit of the control circuit
according to the invention can be advantageously
realised on said support and simultaneously with the
transistors of the matrix device.
Other features and advantages of the invention can be
gathered from the following non-limitative description.
For reasons of clarity, this description refers to the
control of the rows of an active matrix flat-faced
screen, but obviously the invention has a much more
B 8304.C LC
.

~;5~
--5--
general application, as stated hereinbefore. The
description refers to ~he attached drawings, wherein
show :
Fig 1. Diagrammatically an electronic circuit according
to the invention for controlling the rows of an active
matrix flat screen.
Fig 2. The different input and output signals of the
control circuit of fig 1.
Fig 1 shows an electronic control circuit according to
the invention making it possible to control the Nxn rows
of an active matrix flat-facel screen 2. This active
matrix 2 is formed in conventional manner from several
conducting columns 4 and Nxn conducting rows L ,
being an integer between 1 and Nxn. At each
intersection of a column 4 and a row L is located a
memory point 8 of the active matrix 2, formed from a
thin film transistor 10 and a capacitor 12 connected in
series.
This active matrix 2 also comprises Nxn capacitors 14,
one of the coatings of each capacitor being connected to
earth and the other to one of the conducting rows L
of the matrix 2.
According to the invention, the control circuit of the
Nxn conducting rows L of the matrix 2 is constituted
on the one hand by a multiplexing circuit 16, formed
from N groups G ~ T of thin film transistors,
each group Gi having n successive transistors
T1,...T and on the other hand a first shift
register 18, having N OlltputS and a second shift
register 20 having n outputs.
The multiplsxing circuit 16 has one thin film transistor
per conducting line L , i.e. in all Nxn TFT, e.g for a
flat screen with 320 rows, N can be = to 40 and n = to
8.
B 8304.C LC

Such a control circuit make it possible to greatly
reduce the number of connections to be made between the
control circuit and the active rnatrix, said connections
being reduced to N+n connections instead of NY~n
connections for the matrix devices according to the
prior art.
According to the invention, each conducting row L of
~he active matrix 2 is supplied by the source~ of a
single TFT, e.g. the source of the first transistor T
of group G is connected to row L , the source of
the second transistor T of group G is connected to
row L and so on and the source of the final
transistor T of group G is connected to row
L
N-n
The gates of the N consecutive transistors T ,...T
of the same group G are connected to the same output
Pi of the first shift register 18, a different output
Pi of said first register corresponding to each group.
In other words, the gates of the transistors
20 T ,...T of the first group G of transistors are
all connected to output P of the first register 18
and the gates of the transistors T ,...T of group
G of transistors are all connected to output P of
N N
the first register 18.
For the drains of the Nxn thin film transistors, they
are supplied in such a way that the drain of the ith
transistor Ti of each group Gi is connected to the
ith output S of the second register 20, i being an
integer such that 1 ~ i ~ n. In other words, the first
transistors T Gf each group of transistors
G ,...G are all connected to the first output S
of the second shift register 20, the second transistor
T of the groups of transistors G ,...G are all
connected to output S2 of the second register 20 and
so on and the final transistors T of groups
B 8304.C LC

G ,...G of transistors are all connected to the
1 N
final output S of the second register 20.
Fig 2 shows the different input and output signals of
the control circuit of fig 1. Signal R(n) corresponds
to the output signal of shift register 20, signal R(N)
corresponds to the output signal of shift register 18
and signal L corresponds to the input signal of the
first conducting row of matrix 2. Each pulse of
duration qF supplied by regis~er 20 corresponds to the
access time to a conducting row of the matrix, ~r being
close to 64 ~s and pulse ~ ' supplied by register 18 is
equal to nx T .
A voltage pulse -r supplied by shift register 18
functioning at the scanning frequency of the rows of the
flat-facelscreen will only be transmitted to a row of
said screen in group Gi made conductive by pul~e ~ '
supplied by shift register 18. When the thin film
transistors are non-conductive, the corresponding rows
of the flat-faced screen are kept at low level as a
result of the row capacitor 14, which remains charged or
loaded throughout the duration of an image or picture on
the screen.
According to the invention, when the transistors 10 of
the active matrix 2 are thin film transistors formed on
an insulating support, such as of glass, constituting
more particularly one of the two walls of the flat-face
screen between which is arranged the liquid crystal, the
thin film transistors of the multiplexing circuit 16 can
be advantageously produced on said support and
simultaneously with the production of the transistors 10
of the active matrix 2 of the screen. ~owever, the two
shift registers 18 and 20 will be standard integrated
circuits produced independently of the active matrix 2.
One of the processes which can be used for producing the
B 8304.C LC

~ 5~ ~
thin film transis~ors of ~he multiplexing circuit 16 at
the same time as those of the active matrix 2 has been
described in French paten~ publication 2,533,072, filed
on æeptsmber 14~ 1982 in ~he name of the ~pplicant
entitled "Process for ~he production of elec~ronic
circuits based on thirl film transistors and capacitor~".
As is indicated ~herein, thi~ process also mak~s it
possible to simultaneously produce matrix capacitors
such as 12 and 14.
In a simplified manner, this production process consists
of depositing on an insulating support, such as glass,
forming one of the walls of the flat-faced scrPen, a
transparent conductive coating, particularly of tin
oxide and indium and then a doped n amorphous silicon
coating~ These coatings then undergo photogravure with
the aid of a first mask, so as to form the sources and
drains of the ~hin film transistors of the multiplexing
circuit and the matrix, one of the coatings of the
capacitors 12 and 14, the conducting columns 4 of the
matrix, as well as the drain bus of the multiplexin~
circuit 16.
~his is f~llowed by the successive deposition of a
hydrogenated amorphous silicon coating, an insulating
coating, particularly of silicon oxide and a conductive
coating e.g. of aluminium. The stack of coatings is
then subject to photogravure using a second mask, so as
to find the gate of the thin film transistors of
multiplexing circuit 16 and matri~ 2, as well as the
conducting rows L of said matrix.
The assembly is then passivated with ~he aid of a
deposit of an e.g. silicon oxide coating, after which
openings are made in the passivation coating (by
photogravure using a third mask) at the ends of the
conducting rows of the matrix, on the gates of the thin
film transistors of the multiplexing circuit 16 and on
~3

the draln bus of ~aid circuit.
This is followed by making a metal deposit, e~g. of
aluminium, followed by ~he phot~gravure thereof using a
fourth mask, so as to form the connections between
multiplexing circuit 16 and active matr~x 2~ between the
drain bus and the drains of the thin film transi6tors of
the multiplexing circuit and between the gates of
transistors T~ T of a same group G of
transistors of multiplexing circuit 16.
For further details regarding the production of surh
electronics circuits based on thin film transistors and
capacitors, reference should be made to the
aforementioned French patent application.
The application of the electronic circuit according to
the invention to the control of the rows of a flat-face
screen with active matrix is obviously only an example.
In particular, the circuit according to the invention
can be used with advantage for controlling the rows of a
photosensitive video retina with thin film transistors.
Such a retina has in particular been described in Frencb
patent publication 2,523,371, filed on March 10~ 1982 in
the name of the Applicant and entitled "Photoconductive
hydro~enated amorphous silicon carbide element and video
retina cell using such an element". Moreover, the
circuit according to the invention can be used for
controlling an array of photodiodes used in telecopying,
said photodiodes and the thin film transistors of the
multiplexin~ circuit being produced simultaneously on
the same support.
In more general terms, the circuit according to the
invention can be used for controlliny any row of
electronic components of the integrated diode or
transistor type.

Dessin représentatif

Désolé, le dessin représentatif concernant le document de brevet no 1255406 est introuvable.

États administratifs

2024-08-01 : Dans le cadre de la transition vers les Brevets de nouvelle génération (BNG), la base de données sur les brevets canadiens (BDBC) contient désormais un Historique d'événement plus détaillé, qui reproduit le Journal des événements de notre nouvelle solution interne.

Veuillez noter que les événements débutant par « Inactive : » se réfèrent à des événements qui ne sont plus utilisés dans notre nouvelle solution interne.

Pour une meilleure compréhension de l'état de la demande ou brevet qui figure sur cette page, la rubrique Mise en garde , et les descriptions de Brevet , Historique d'événement , Taxes périodiques et Historique des paiements devraient être consultées.

Historique d'événement

Description Date
Inactive : Périmé (brevet sous l'ancienne loi) date de péremption possible la plus tardive 2006-06-06
Inactive : CIB de MCD 2006-03-11
Accordé par délivrance 1989-06-06

Historique d'abandonnement

Il n'y a pas d'historique d'abandonnement

Titulaires au dossier

Les titulaires actuels et antérieures au dossier sont affichés en ordre alphabétique.

Titulaires actuels au dossier
S.O.
Titulaires antérieures au dossier
FRANCOIS MORIN
JACQUES SERGENT
STEPHAN DELAPLACE
Les propriétaires antérieurs qui ne figurent pas dans la liste des « Propriétaires au dossier » apparaîtront dans d'autres documents au dossier.
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Description du
Document 
Date
(aaaa-mm-jj) 
Nombre de pages   Taille de l'image (Ko) 
Abrégé 1993-10-05 1 20
Revendications 1993-10-05 1 25
Dessins 1993-10-05 1 27
Description 1993-10-05 9 364