Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
1~9~3~fi
POWER CONV~RTER CONTROL CIRCUIT
BACKGROUND OF THE IMVENTION
Field of the Inventlon
The present invention relates to a control circuit of
power converter, and particularly to a converter control
circuit which controls the d.c. output voltaye to be constant
and the input current to be in phase with the power voltaye.
A description of the prior art will be discussed
hereinbelow.
SUMMARY OF THE INVENTION
This invention is intended to overcome the foregoing
prior art deficiency, and its prime object is to provide a
power converter control circuit which alleviates the fall of
d.c. output voltage caused by an abrupt change in the load and
also relieves the control system from the influence of load
current ripples.
The invention resides in the power converter control
circuit which evaluates the mean value of load current and
produces a feed-forward signal on the basis of the mean value.
In accordance with one aspect of the invention there is
provided a control circuit for a power converter which
~0 converts a.c. power to d.c. power comprising a voltage control
system which controls the d.c. output voltage of said power
converter to be constant, a current control system which
controls the input current to said power converter to be in-
phase with the power voltage, and an averaging circuit which
averages a detected load current of said power converter and
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~elivers the result to said voltaye control syste~.
Other objects and advantages of this lnvention ~/~ill
become more apparent from the following detailed description
of specific embodiments taken in conjunction with the
accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWIMGS
Fig. 1 is a block diagram of the conventional power
converter control circuit;
Fig. 2 is a block diagram of the power converter control
1~ circuit embodying the present invention;
Fig. 3 is a schematic diagram of the converter according
to the embodiment;
Fig. 4 is a block diagram of the voltage control circuit;
Fig. 5 is a diagram used to explain the principle of
moving average in the sampling control;
Fig. 6 is a flowchart showing the creation of the feed-
forward signal derived from the load current;
Fig. 7 is a set of waveform diagrams obtained by
simulation;
2~ Fig. 8 is a block diagram of the current control circuit;
and
Fig. 9 is a block diagram showing another embodiment of
this invention.
Description of the Prior Art
Fig. 1 shows in block diagram a conventional power
converter control circuit disclosed in an article entitled
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3L29~9,38~
'Review of Control Characteristics of PWM Converters", in the
proceeding of the 1985 national convention of The Institute of
Electrical Engineers of Japan. In the figure, indicated by 1
is a power converter, which is a PWM converter in this
example. Indicated by 2 is an a.c. filter reactor provided at
the a.c. input of the converter 1, 3 is an a.c. power source
which supplies an input current Is~ 4 is a d.c. filter
capacitor provided at the d.c. output of the converter 1,5 is
a load, 6a is a power voltage Vs detecting circuit, 6b is a
d.c. output voltage VD detecting circuit, 6c is an input
current Is detecting circuit, and 6d is a load current I~
detecting circuit.
Indicated by 101-117 (excluding 110) are sections of
control circuit, in which are included a reference voltage
generating circuit for producing a reference voltage VDR, a
subtracter which calculates the difference between the
detected voltage VD provided by the detecting circuit 6b and
the reference voltage VDR to evaluate the voltage difference, a
voltage control circuit 103 which produces a voltage control
signal depending on the voltage difference, a feed-forward
control circuit 117 which produces a feed-forward signal
derived from the detected value IL from the detecting circuit
6d multiplied by a constant K~, an adder 107 which calculates
the difference between the voltage control signal and the
feed-forward signal to produce an input current peak command
Im~ a sinusoidal wave generating circuit 108 which produces a
sinusoidal waveform sin ~ in phase with the power source
voltage Vs based on the detected value Vs of the detecting
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circuit 6a, a multiplier 109 which multiplies the peak command
Im to the sinusoidal waveform sin ~ to produce an input current
command Iss, a subtracter 111 which calculates the difference
between the detected value Is from the detectiny circuit 6c and
the input current command Iss to evaluate the current
difference, a current control circuit 112 for producing a
current control signal depending on the current difference, an
adder 113 which adds the detected value Vs of the detecting
circuit 6a to the current control signal to compensate the
l~ disturbance of the power voltage Vsl a carrier wave generating
circuit 115 which produces a carrier signal, e.g. a triangular
wave, a PWM (pulse-width modulation) circuit 114 which
compares the output of adder 113 with the carrier wave to time
the switching operation of switching devices (not shown)
constituting the converter 1, and drive circuit 116 which
activates the converter 1 depending on the output pulse width
provided by the PWM circuit 114.
Next, the operation of the above converter system will be
described. The converter 1 converts a.c. input power into
d.c. power and supplies it to the load 5. The capacitor 4 is
provided for absorbing the variation in the d.c. output
voltage VD of the converter 1. The control circuit controls
the d.c. output voltage VD SO that it is equal to the reference
voltage VDR, and also causes the input current Is to be
sinusoidal in phase with the power voltage Vs so that the
system operates at a 100% power factor, with less harmonics
and lower distortion factor.
; In ordeF to maintain a constant d.c. output voltage VD
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the voltage control circuit 103 provides a voltage control
signal for modifying the peak value of the input current Is~
If the voltage control has a laygard response, an abrupt fall
of the d.c. output voltage VD across the capacitor 4 could
cause a control disabllity, and this problem is overcome by
adding a feed-forward siynal with a value of KLI! to the
voltage control signal on the adder 107 so that the peak value
command Im is instantaneously responsive to a load variation.
The input current command Iss is produced through the
multiplication of the peak value command Im and the sinusoidal
waveform sin ~ in phase with the power voltage Vs on the
multiplier 109. The input current command Iss is subtracted by
the input current Is on the subtracter 111 to evaluate the
current difference, which is followed by the current control
circuit 112 to produce the current control signal. The
current control signal is added by the power voltage Vs on the
adder 113 so that the disturbance by the power voltage Vs is
compensated, and then the resulting signal is fed to the PWM
circuit 114. The PWM circuit 114 compares the current control
signal with the carrier wave, e.g., a triangular wave at 1-2
kHz, provided by the carrier generating circuit 115 to produce
a PWM signal with a pulse width dependent on the values of
voltage difference and current difference. The PWM signals
fed to the drive circuit 116, which operates the switching
~5 devices of the converter 1 accordingly.
The conventional power converter control circuit arranged
as described above is intended to be responsive to an abrupt
fall of the d.c. output voltage VD through the addition of the
3~}~
load current IL signal on a feed-forward basis to t~e ~/oltage
control signal for producing the input current co~mancl Iss.
Consequently, in case of a single-phase inverter for the load
5, the load current I~ has a significant amount of ripple,
which appears in the input current command ~ss~ resulting
disadvantageously in an increased harmonics included in the
input current IS waveform.
An embodiment of this invention will be described with
reference to the drawings. In Fig. 2, where portions
identical to those in Fig. 1 are given the command symbols and
explanation thereof is not repeated, indicated by 104 is an
averaging circuit placed between the detection circuit 6b and
subtracter 102, 105 is an averaging circuit placed between the
detection circuit 6d and adder 107, 106 is a filter which
passes the output of the averaging circuit 105, 118 is a
switch which delivers selectively the output of averaging
circuit 105 or the output of filter 106 to the adder 107, 117
is a limiter placed between the adder 107 and multiplier 109,
and llO is a low-pass filter placed between the detection
circuit 6c and subtracter lll.
Fig. 3 shows a specific circuit arrangement of the
converter l. The converter 1 comprises rectifying diodes
Dl-D4 in a bridge configuration and switching devices, e.g.,
transistors, Sl-S4 in anti-parallel connection with the
respective diodes D1-D4. The converter 1 is of the voltage
type, in which the switching devices Sl-S4 operate several
times in a period of power frequency in response to the drive
signal from the dri.e circult 116.
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Next, the operation o~ the inventive control circuit
shown in Fig. 2 will be described. The current cornmand
ISs is produced from the load current feed-forward signal
ILS and power voltage Vs so tha-t the input current Is has
an instantaneous response to the load by a minor current
loop, and the d.c. output voltage is controlled to the
reference voltage VnR by a major vol-tage loop.
First, the major voltage control loop will be
described. The voltage control system consists of the
circuitries 101-109, 117 and 118, and it is shown in more
detail in Fig. 4. The moving average circuits are employed
for the averaging circuits 104 and 105. Moving average is
a technique of digital control in which detected values are
sampled at a sampling interval Ts and a certain number of
sampled data of new sampled values are averaged. For
example, when the d.c. output voltage VD including periodic
ripples is averaged for every six data, the resutl of moving
average of d.c. output voltage VD at a time hetween KTs and
(K+l)Ts is given as follows.
6 {VD(K) + VD(K-l) + VD(K-2) + VD(K 3) + VD(K 4)
+ VD(K-5)}
The moving average at a time between (K~l)Ts and (K+2)Ts
is as follows.
6 {VD(K+l) + VD(K) + VD(K-l) + VD(K-2) ~ VD(K-3)
+ VD(K-4)}
By determining~the number of data for averaging depending
on the period of rlpple in this way, the moving average
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value becomes a virtually constant value, and the
influence of ripples on the control operation is eliminated.
In Fig. 4, the subtracter 102 calculates the voltage
- difference from the mean value of d.c. output voltage VD
provided by the moving average circuit 104 and the reference
d.c. voltage VDR(K)l and delivers the result to the voltage
control circuit 103. The voltage control circuit 103 consists
o~ a proportional operator 103a which multiplies a constant
Kp to the input, and an integral operator 103b which sums
the input multiplied by a constant XI and the multipled
result retarded by a delay element z-l, The voltage control
signal produced by the voltage control circuit 103 is added
to the feed-forward signal ILS(K) by the adder 107-
The creation of the feed-forward signal ILS(K) wil] be
described on the flowchart of Fig. 6. A moving average
circuit is assumed for the averaging circuit 105. Initially,
step STl evaluates the moving average value ILA(K) from the
load current detected valùe IL(K). Next skep ST2 calculates
the difference between the moving average value ILA(x) and
the feed-forward signal ILS(K-l) of the preceding sample
point, and tests whether the difference is greater than a
certain preset value ILo . If the difference is greater
than ILo step ST3 operates on the switch 118 to select
the b-position so that the then moving average value
~5 ILA(K) is delivered as a feed-forward signal ILS(K) to the
adder 107. In another case when the difference does not
exceed ILo, step ST4-operates on the switch 118 to select
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the a-position so that the moving average value ILA(K) is
fed through a filter 106 having certain l-order -time lag
characteristics, and step ST5 delivers -the resulting
feed-forward signal ILF(K) as a feed~forward signal ILS(K)-
to the adder 107.
Fig. 7 shows simulated waveforms for a single-phase
inverter for the load 5, with the preset value ILO being
25% of the rated current. Shown by (a) in the figure is the
load current IL(K) at the input of the inverter, and it
includes much harmonics. Shown by (b) is the moving-averaged
load current ILA(K), and shown by (c) is the feed-forward
signal ILS(K). It is observed on the waveform that the
feed-forward signal ILS(K) promptly follows a sharp fall of
the load current IL(K)-
Referring back to Fig. 4, the adder 107 has its output
representing the effective current command I~e(K) for the
d.c. output of the converter 1. In order to convert the
effective current comman~ Ime(K) to the input current
command ISs(K) for the a.c. converter input, the multiplier
119 multiplies the mean value VD(K) of d.c. output voltage VD to
, ` the Ime(K) and divides the result with the effective value
Vse(K) of power voltage Vs. The output of the operator 119
is clamped by a limiter 117 to the allowable current of the
converter 1, and then applied to the multiplier 109. The
multiplier 109 multiplies a waveform ~7- sin ~ in phase
with the power voltage Vs to the output of the limiter
117, and the input current command ISs(K) is obtained.
6~
Next, the minor current loop will be described This
current control system is formed by sections 111-113 in
Fig. 2, and it is shown in more detail in Fig. 8. In the
figure, the input current IS detected value is rid of ripple
components by a low-pass filter 110 (see Fig. 1). The
resulting signal Is(K) is applied to the subtracter 111
for subtraction from the input current command ISs(K)
and the current difference is evaluated, which is delivered
to the current control circuit 112. The current control
circuit 112 consists of an integral operator 112a which sums
the output of the subtracter 111 multiplied by a constant
GI and the multipled result retarded by a delay element
z 1, and a proportional operator 112b which multiplies a
constant Gp to the detected value IS(x)~
The integral operator 112a and proportional operator 112b
have their outputs merged and then added to the detected
value Vs(K~ of power voltage Vs by the adder 113, resulting
in a control signal V~s~K). The control signal Vcs(K) is
delivered to the succeeding PWM circuit 114, by which it is
compared with the carrier, and the switching devices Sl-S4
of the converter 1 are controlled for their switching
operation. The foregoing minor current control loop reduces
the retardation, allowing an increased loop gain, whereby
the total system has an instantaneous response.
Through the foregoing operations, the d.c. output
voltage VD is maintained constant, and the input current
IS is controlled to be a sinusoidal current with lower
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distortion factor and in phase with the power voltage ~S
By employment of moving average circuits for the averaging
circuits 10~ and 105, the ripple component of the 2~fold
output frequency is eliminated in the case of a sinyle-
phase inverter or the like for the load 5. The feed-forward
signal ILS~ by being fed through the filter 118, is rid of
the ripple caused by sampling for the averaging process,
whereby the input current eommand ISs includes less harmonics.
Although in the foregoing embodiment the feed-forward
control system for providing the load current IL detected
value for the control cireuit is designed to use the moving
average value ILA direetly as a load eurrent feed-forward
signal ILS instead of passing it through the filter 106
when the ILA exeeeds a eertain preset value ILo, this
treatment of direet feed-forward signal is not necessary
: in eases where the moving average value of load eurrent does
not vary greatly. Aecord1ngly, the switch circuit 118 as
shown in Fig. 9 can be removed, and yet the same effective-
ness as the preceding embodiment is achieved.
`` 20 Although in the foregoi~g embodiment the voltage
eontrol eireuit 103 and eurrent eontrol eircui-t 112 are
formed in a digital eontrol system, the whole or part of
the inventive eontrol eireuit may be eonfigured by analog
eontrol eireuitries, and yet the same effectiveness as
the preceding embodiment is aehieved.
Aeeording to this invention, as described above, the
load eurrent feed-forward control system is designed to
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use a detected value averaging circuit, and it alleviates
the influence of load current ripples on the control system
and is also effective for controlling the converter input
current to a sinusoidal current with lower distortion factor
and in phase with the power voltage.
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