Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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,r n~
The p~esent lnvention relate~ to cl~ctro-vptlc devlces
and ~n particular but not ~xclusively to li~hlum nlobate
electro-optic w~ve~uide dev~ce3.
S Wlth lithium niobate (LNB~ devices such a~ directional
couplers and ~ach Zehnder ~Z) interferomete~s, ther~
exist~ ~he pro~lem tha~ in order to achieve a giYen level
o~ extinctlon, swit~hing or ~od~lation, continually
greater electrode potentials are required throu~ho~t the
o operating li~e of the device. ~his phenomenon i~ ~noWn as
voltage induced drift. Ultlmately a l~mit is reached
where the driving electronic~ are supplying thel~ ma~i~um
potentlal and it i8 no longer po58ible to achieve the
~ desi~ed performance~ Alternatl~ely ~he device may fail
: 15 cata~rophically with elec~rod~ breakdown cau6ed by the
high applied potential. Noreover, the~e is a further
~; disad~antage of using high elsctrode potential~ with
dSrectlonal coupler~, in that the extinction ratio is
impaired relatiYe to that a~tainable with lower electrode
~: ~0 potentials.
~learly device~ sub~ect to such dri~ are un~uitable
or any long te~m systems appllcAtions uCh as
~elecommunicAtion8 or optical signal processing, because
there ls n~ long term certain~y that any p~ticular devl~e
output ~orr~sponds to a certain applied potential.
one ~ethod which has b~en sugge~ted as a mean~ of
o~ercoming the problem o~ vol~age induced drift ~n
electro-op~lc device~ for long term sy~temg use i~ to
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divert part of the device's optical output to a detector
in order to monitor the drift so that the bias voltage can
S be varied to track it. The disadvantages of this
hypothetical arrangement are two-fold: first, the
difficulty of monitoring part of the optical output and
deriving the required bias level; second, the drift tends
to continue at a near linear rate, consequently higher and
higher bias levels are reguired.
In accordance with an embodiment of the
invention a method of minimizing voltage induced drift in
electro-optic devices, the optical state of which is
controllable by the application of an electrical potential
between a first grounded electrode and a second electrode
of the device, the method comprises controlling the
electrical potential applied between the first and second
electrodes such that in use through the long term
application of both positive voltages and negative
voltages to the second electrode the average potential
difference between the first and second electrodes is
~; substantially zero.
; According to a second aspect, the present
invention provides a method of controlling an electro~
optic device the optical state of which is controllable by
the application of an electrical potential between first
and second electrodes of the device, the method comprising
the steps of applying a first electrical potent.ial to the
first electrode, and applying a second potential to the
second electrode, characterized in that one or both of the
first and second electrical potentials is/are adjusted so
that, in use, the average potential difference between the
first and second electrodes tends to zero.
According to a third aspect, the present
invention provides a driving arrangement for electro-optic
devices, which arrangement comprises electrode driving
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apparatus to supply both positive and negative drive
voltag~s, averaging apparatus to generate an average
signal indicative of the average electrode voltage, and
control apparatus for controlling the electrode driving
apparatus in response to the average signal, which control
apparatus causes the electrode driving apparatus ts supply
positive or negative drive voltages as necessary to
maintan, in use, a substantially zero average electrode
voltage.
According to a fourth aspect, the present
invention provides a driviny arrangement for electro-optic
devices, which arrangement comprises a data input to
receive an input data stream of known disparity, and
control apparatus responsive to the input data stream for
controlling the electrode driving apparatus to supply
: positive or negative drive voltages as necessary to
maintain, in use, a substantially zero average electrode
voltage.
In accordance with another embodiment, a
method of minimiæing voltage induced drift in electro~
optic devices having only two electrodes the optical state
of which is controllable by the application of an
electrical potential between a first electrode and a
second electrode of the device, the method comprises
controlling the electrical potentials applied to the first
and second electrodes such that in use the average
potential difference between the first and second
electrodes is substantially zero.
In accordance with another embodiment, a
method of controlling an electro-optic waveguide device
having only two electrodes, other than a liquid crystal
device, the optical state of which is controllable by the
application of an electrical potential between first and
second electrodes of the device, the method comprises the
steps of applying an electrical potential to either the
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first or second electrode whereby the electrical potential
is adjusted, with the potentials applied to the first or
S second electrode alternately being positive and negative
as necessary, so that, in use, the average potential
difference between the first and second electrodes tends
to zero.
Preferring embodiments will now be described
by way of example only with reference to the accompanying
drawings, in which:
Figure l(a) shows a schematic plan view of a
conventional Mach-Zehnder interferometer;
Figure l(b) shows schematically a cross-
15 section, on the line A-A, through the interferometer of ;.
Figure l(a~;
Figure l(c) shows the transfer characteristic ~ ~
of a device such as that shown in Figure l(a); ; :
Figure 2 shows schematically an arrangement .~
20 for driving an electro-optic device, such as the :~ .
interferometer of Figure l(a), according to the method of :~
the present invention; -
Figure 3 shows schematically an electro-optic
device driving arrangement according to the present -~
invention, for use with electrode drivers capable of
providing a DC offset; ~-
Figure 4 shows schematically an arrangement ~: -
similar to that shown in Figure 5, but suitable for use
with ~:
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el~ctrode drivers whlch are lncapable of provlding a ~C
off~at7
Figure 5 is a schematic logi~ ~t~te dla~ram for the
~rrangements sho~n ln Fl~ure~ 3 and 4;
~ gure 6 ~hows schemati~ally an electro-optlc devl~
drlYln~ ~range~ent for u~e with ~Y~tems in whl~h ~llerq i8
constant data disparity.
To ~acilltate an unders~anding of the ln~en~ion the
operatlon of a typica~ ~lectro-optlc devic~, ~n thls c~se
an ~Z interferometer, will first be des~rlbed. An NZ
interferometeF is formed on a Z-~ut lithium nlobate
subs~rate lt typically 40mm long, lO~m wlde and l~m thick,
and comprises an input waveguide 2 And an output
waveguide 3 coupled b~ a p~ir of waveguide portions 4, ~'
whi~h form the arms of the. inter~eromet~r. ~he ar~s arQ
about lO~m apart. The waveguides are about 5~m wide and
are f~r~ed in the substrate by the select~ve dif~usion of
tit~nium. An optical lnput to the input wavegu~de 2 will
g~n~rall~ ~e provided by means of an optical fi~re lo
Aligned therewith. ~imilarly, an opt~cal fibre 11 ~
generally ali~ned wi~h the output ~aveguide 3 ~o receive
the ~p~ical output. On the surfa~e of the ~ubstrate, over
the arms 4, 4', there is, optionallyt form~d a buf~er
layer 5 compri~ing a diele~trlc such as 5il~ or
alumina. In the ~b~ence of a buffer layer~ voltage
induced drift is le89 of a problem, but, unfortunately,
optical attenuation i~ very high. ~onsequently, a huf~er
layer i~ invariably used, despite t~e prohlems o~ voltage
induced drift. Electrodes 6, 61 of alu~lnium or gold are
for~ed on ~he bu~er layer 5 and are aligned with the arm~
'. The underside o~ the substrate is metalll,3ed 7.
One ele~trode 6 and the metall~sation 7 are con,n~c~ed to
ground. The o~her electrode 6~ upplied with a
~odula~ing sign~1. The potential on the ~lectrode ~'
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Qst~bll~he~ ~n elect~lc~l fi~ld between tne two
e~trodes, somQ o~ whlch pa~es througn the ~avQguide~.
The vertical component of thl~ elec~rlc field pas~lng
through the interferometer armg cause~ a change ln thelr
! re~ractive ind~xJ Increasing the index in one ~nd
decre~ln~ it in the o~h~r.
A~ a reRult o~ the dlfference in re~ractive ~ndlces
! ther~ iB a pha8e di~erence ~etw~en the outputs of thQ t~o
ar~s, producing constructive or de~tructiv~ intsr~erence
when the output8 ~re combined. Th~ re~ulting tran~P~r
charact~r~lc, showing the light outpu~ aqainst ~lactrode
voltage for a con~tant light inputJ 1~ presen~ed in
~igure l(c)~
The tran-~fer characteristic of an MZ interferometer i~
15 . essentially a periodic ~os ~qu~red functlon, the peak~ of
whlch correspond to points. of constructlve interferenc~,
:~. the troughs to de~tructive interference. The electrode
voltage - tha~ is ~he potentia~ difference between the two
;.~ electrodes, required to drive the output from a peak to a
trough i8 called the switching vol~age Y~. The voltage
r~quired to obtaln the output peak near~st to zero volts
.~ i8 the phase bias voltage YO~ A typ~cal ~witching
: volta~e ~or 20mm long elecerodes, on z-cut LNB, i8 about
3~5V. ~he phas`~ bias voltage can be an~ value up to the
sw~tch$ng voltage.
As should by now be clear, voltage induced dr~ft
:~: involve~ the phase bias ~oltage changing during the life
~:~ o~ the ~evice.
~- In accordance with the pre~ent invention we minimiBe
vol~age induced drift by dr~ving devices subject to such
dr~ft in such a way that the average electrode voltaqe
tends to zero. A zero or near zero average electrode
vo~tage i~ achieved by using both po~itlve and nega~ive
drive pulses. In outline a suitable drlving arrangement
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would comprise: two ~lectrode drlvers, one ~or each
polarlty; and an av~raging ~lrcuit to monitor the
electrode voltage; a comparat~r having so~e hygteresls,
connected to the averaginq circuit and u~ed to monitor the
electrode voltage; the output of the comparator being
U~d to select the appropria~e one of the d~lver~ ~o as to
mlnimise the av~rage ~lectrode voltage.
; A ~ult~ble device ~riving arrangement i9 9~0wn
6chematlcally in Flgurq 2. An XZ inter~erometer 10
! 10 ~o~prises a z-~ut LN~ ~u~t~ate Wl~h wav~guide regions 11
formed there~n. optlcal lnput ~ignalg are ~upplled by an
optical ~lbre 12 aligned with one end o~ the wav~gulde
11. A seond optical fibre 1~ i~ allgned with the
: opposite end o~ the waveguide to receive optlcal output
signals. Associated with each lnter~er~eter ar~ i5 an
; el~ctrode 14 and 14'. ~he optical output o~ the devica is
controlled ~y the pot~ntial applled aGros5 the two
lectrodes. In prac~ice the phas~ bia6 volta~e Yo ls
appli~d to one o~ other o~ the electrodes 90 tha~ when the
switchLn~ vol~age V~ i~ applied the device operates
~:~ betw~en a peak and a trough in the ~lectro-optic transfe~
characteristic. Thus the electrode voltage has an AC
com~onent corresponding to the swit~hlng voltaqe ~ and a
DC co~ponent corresponding ~o the pha3e bias voltage Vo.
: ~5 The phase h~as vol~age must be ta~en into ac~ount ln
determining the average electrode voltage and this may be
:~ ~ore easily done if Vo is applied to one electrode,
belng applied as appropriate to the other. The
. alternative, ~hown ln Figure 2, i8 ~0 ground one
: 30 electrode, and apply ~o and V~, as appropr~ate, to the
other electrode. The phas~ ~ia~ voltage source 15 is
connected between electr~de 14 and ground. AlSo connected
to electrode 14 are ~witching means 16 switchable to
conneCt lt t~ e~ther po~itive ~ource 17 or negatlve ~ource
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7 l 330228
18. ~ontrolling the sw~tching mean~ 16 dlrectly or
lndirectly is a comparator l~. Th~ comparator wlll
normally be associatQd w~th, or p~rt o~, the control
electronics 20, to ensure that the ~witching ~ean~ ~hange~
~tateB eithe~ during a break in ~ran5mi~Bion or
syn~hron~usly with a transition in the incoming data.
Averaging means 21 genera~e a ~alue corr~sponding to the
long term average electroda voltage, whl~h value i8
monitored con~tnuou~ly or periodically b:y the comparator.
1~ the comparator mQnitor~ ~he avera~ values only
pe~iodically, the un-monitored periods should not be so
long that slgnl~icant voltaye induc~d dri~t occurs. Aa
very many variables (includ~n~: elec~rode Yol~g~
hu~idity, temperature, ~aterial, cr~stal orlentatlon,
defect den~lty, device design, etc) influence the rate of
drit, it iE no~ pr~atia~l to ~ttompt to apcc~y
universally accepta~le upper ~lmit for the leng~h of eh~
un-monitored per~ods~ Clearly where thare is lik~ly to be
~apid drift, ~g l volt per hour, it would be de~irabls to
monitor the average at lea~t once ~ minute. Where the~e
iB likely to be a low drift rate, eg lmV per hour or less,
the aYera~ may be ~onitored as infr~que~tl~ as onc~ an
hour or even less~ However, ~here appears ~o be no
part~cular advant~ge to having long lnterval~ ~etween
assessment of the average, while thers ara clear
di~advantages. Preferably, therefore the average i8
monito~ed Beveral times a minute~ Nore preferably the
average i8 monitored at lea~t once every hundred
mllllsecond~.
In Figure 3 an ~lternative arranqement is shown in
~lightly greater detail. Thi~ e~bodiment ~ B desl~ned to
cat~ for electirode driver~ which hav~ the facllity ~or
offsetting their output6-to an externally defined lev~l.
~ho data lnput 30 feed~ ~la ~n ampll~ler 31 ~nto dat~
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~teerlng logic 32 and delay mean~ 33~ ~he delay mean~ ~3
feed~ lnto the C input of an edge-triggered dat~ ~AtCh (a
~-type ~lip~flop) 34~ ~he Q ~tpUt o~ dat~ lat~h 34 f0eds
an lnput of each o~ flrst and second AND g~te6 36 and 37
of the data steering logi~ 32, one, 36, directly, ~he
oth~r via an inYerter ~5~ The ~econd and final input of
each o~ the two AND gate 3~i and 37 ~erve~ ~ the data
~teering logic connsctlon of the outpu~ of a~pllfier 31.
The outpu~ of the ~ND gates, 36 and 37 trigger respectlve
one of a pair of electrode driYers 38 and 3~. The ~irst
electrode dFiver, 38 i~ dr~ven by AND gate 37 and provides
po3itive-going swltching vo~tag~ to one ele~trode of t~e
electro-optic device 50, the other electrode of the devl~e
being grounded. The ~econd e~ectrodQ driver, 39,
slmilarl~ provides negatlve-going switchin~ volta~ss. ThQ
outp~t~ of the electrod~ drivers are also connected to an
electrode avera~in~ clrcuit 40 which provides feedba~ to
th~ D input of the data latch ~4. The delay ele~ent 33
and the data latch 34 are provided to ensure that
~witching ~et~een electrode driver~ acc~rB d~ring a
logic-low state in the data blt pattern to ~ve
synchroni~ed ~ransparent operation. The electrode
avQra~ng circuit co~pri~e~ an R~ c~rcUit ~ ~nd a
co~p~rator 42, the R~ circuit being connected between the
outputs of the electrode dr~verB and the ~u~lng input Q
~he comparator 42, the second, reference inpu~ of which i8
grounded. The RC circ~t 41 pro~de~ some hysteresis in
order to prevent too frequ~nt ~witchlng between the
electrode drivers. ~h~ ph~e bia~ vo~tage Vo is provided
by ~he PC o~fset ou~put of ~he electrode driver~ and
should ~e chosen to be less than V~/2.
For a de~ic~ with a tran~er characteristic as shown
ln Figure lc, the logic tO~ state wo~ld be aligned to node
~2 by off~etting the outpu~B of the t~o elsctrode- drivers
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1 330228 : :
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by ~lY. Thus the gr~und electr~de wo~ld b~ at ~ro volts
and ~ logic "1" ~ould ~ppear as elther ~4V ~hen the
po~itive driver 1~ ~electe~ or -ZV ~hen ~he neqative
driver i9 sele~ed. The comparator input 19 then the
actual ~verags el~ctrod~ voltage and include~ th~ pha~e
bl~s offset.
Figure 4 ll~u~trates a further em~odlment whlch u~e~
ele~tr~de ~rivers which do not have a DC of~set
~apabillty. ~he arrangement di~ers from that shown in
o Pigure 3 only in that the phase bias voltRge is applled to
the gro~nd electrode, bu~ with oppo9ite polarity to give
the ~ame elect~od~ difference ~oltag~ n the previous
em~odiment. Additionally the reference conSact of the
comparator ~ ln the electrode a~eraging c~rcu~t i~
; Is connected ~o the ground electrode, and hence -~o, rat~er
th~n to ~round. Agaln the ~agn~tude of th~ phase bia~
voltage should be chosen to ~e le~s than Y~/2. With
refer~nc~ to ~igure lc, logic ~0~ ~ill now b~ OY a~d logi~
"1" would appear a~ elther ~3V when the positive driver i~
i 20 selected or -3V when the negative drlver is selected. By
connecting the reference input ~-) o~ the ~ompsrato~ to
~; ~he negative phase blas voltage, the comparator no~
operatos with the same d~f~erence volta~e as the
~; elec~rode~
Pigure 5 shows ~n lll~stratlve log~c ~tate dlagram for
:~ the embodiments shown ~n FigureQ ~ ana ~ Thi~ ~igure i6
largely sel~ explanatory, bUt it is wor~h noting the
¦ action o~ the compara~or. ~nitially, ~ln5 in the input
¦ data cau~e the positive electrode driver, 38, to operate,
~lt~ ~ons requiring a zero output from the electrode
d~ivers. Hence a ~1" initially cause~ ~he voltage on the
~um~in~ input of the compara~or to rise. When the
co~parator~s threshold i5 exceeded, lt~ outpu~ chan~e~
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l~v~l, in this cas2 goln~ from low to high~ At th~ next
trAnsltlon in the input data, the data-lakch output Q
change~ state, ln this case al80 from low to hlg~
~onsequently the n~t "l" in the input dat~ results in a
! 5 pul~e from the negatlve electrode driver 39~ The neg~tlve
electroae driver i8 u6ed for a~l data ~l"s untll the
comparator~q oppo~it~ th~eshold i5 reached, which ~e3ults
in the comparator's output changlng ~tat~. On the next
input data transitlon the da~a-latch output Q change~
o sta~e, wlth the consequenc~ that sub~eq~ent ~ 5 in the
input data stream result in ~he posi~lve electrode driver
38 ~upplying the swi~ching voltage V~. ~learly the
~omp~rator's threshold levels should be set such that
volSage induced dri~t is kep~ to an acceptably lo~ level.
lS Figure 6 shows a yet further embodlm~nt, devised for
sy~te~ in which there ifi constAnt da~a d~sparity ln the
code ~ the input data. The ma~oritX of con~tant
~di~parity da~a codefi do in fact have an averaqe
~ark-to-~pace ratlo o~ 5~50 ~ecause o~ the way hlgn-speed
. 20 receiver de~igns work, and for such data codes a v~ry
, ~lmple drivin~ arran~ement 1~ posfiiblè. The primary
! d~fference bet~een this embodiment ànd those illustrat~d
in Figures 3 and 4 i~ ~hat the switching between electrode
! drlver~ i~ not controlled by mean~ of an electrode
averaglng circuit 40 connected to th~ ~ input of the ~d~e
~ trlgg~red data latch but rather a cloc~ ge~erator, in this
: ca6e a s~uare-w~ve gen~rator i6 connected in place of the
aver~ging circuit ~0. The effective ~ark-to-space ratlo
o~ the cloc~ genera~or is Bet to gi~e zero average
~` 30 electrode di~erence vo~tage for the code di~parity and
phase bi~s voltage used. Sincc the phase ~ia~ Yoltage
; required vari~ from device to device, i~ i5 preferable to
~mploy a clock ~enerator having a variable mar~-to-space
1 3 3 0 2 2 8 ~ ~
ratio 5~ that ~he ratio can be Bet acco~ding to the pha~e
bias voltage used for any particular devlce.
With a constant disp~rity data code havlng a - ~ ;
mark to-~pace ratio of 50/50, the condition for zero
avera~e electrode voltage is ~iven by~
O - O.5Vo ~ m tVo ~ Y~) ~ (0.5 - m)(Vo - V~) for Os~ ( 0.5
~'
~here Vo i8 ~he pha3e bias volt~g~
i8 the ~wl~chlng volta~ :
and m 1B the mar~-to-space ratlo.
'.:
o Solving for m gives: ~ :
m - 0.5 V~ - Yo :
2 V~
~ For ~ dev~e w~th the transfer characteristlc shown in :~
:~ . Figur~ l¢ the ~ark-to-~pa~e ratio of the square-wave
~: 15 generator ~ould be ~et to favour the negative ~lectrode
driv~r by the ratio 0.~33 to ~9167. 0~ course it i~ not --~ e~se~tlal, merely preferable, tha~ th~ clock gener~t~r
1~ provide~ a ~uare-wav~ output, any ~ultable waveform or ;.
pulse shape ca~ be used. Where a non-square-wave output
~ i8 provided, thresholdinq ~ean-s may be provided, and/or ~ ~
appropriate ~ubstitution be made ~or the D-type fl~p-flop ~ :
34. :
witch ~1, which would probably not ~e provided in any
real-life i~ple~entation o~ the ~ircuit, illustrate6 the
~5 ~hoice between the pha4e-~ia-~ arrangeme~ts of thR `~
. embodiment4 shown in Figures 3 and 4~ Hence, where the ~ .-
electrode drivers have a DC offse~ capability the pha~e
:: bia~ is applied to the 'li~e' electrode: alternat1vely ::
where no DC o~fs~t capabillty exist~ the tn~gative) :
pha~e-blaB i8 applied to ~he ground electrode.
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While the inv~ntion hss been descrlb~d ln t~rm~ o~
~mbodi~ents in whi~h sep~rate po81~ive and ~egative
electrode drl~ers are pr~vided, this has been ~or ease o~
de~criptlon. It 1~ o~ cour~e not ~entlal to provide
totally separate electroae driver~, altho~gn 6uch an
arr~ngement doe~ offer advantage$ in cert~in
circumstance~, all that is necei~ary i8 t~at the electrode
means can provide both po~itive and negativè drive
~oltage~
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