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Sommaire du brevet 2223746 

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Disponibilité de l'Abrégé et des Revendications

L'apparition de différences dans le texte et l'image des Revendications et de l'Abrégé dépend du moment auquel le document est publié. Les textes des Revendications et de l'Abrégé sont affichés :

  • lorsque la demande peut être examinée par le public;
  • lorsque le brevet est émis (délivrance).
(12) Demande de brevet: (11) CA 2223746
(54) Titre français: PROCEDE ET APPAREIL DESTINE A UN DISPOSITIF MONTABLE EN SURFACE POUR LA PROTECTION CONTRE LES DOMMAGES ELECTROSTATIQUES SUBIS PAR LES COMPOSANTS ELECTRONIQUES
(54) Titre anglais: METHOD AND APPARATUS FOR A SURFACE-MOUNTABLE DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DAMAGE TO ELECTRONIC COMPONENTS
Statut: Réputée abandonnée et au-delà du délai pour le rétablissement - en attente de la réponse à l’avis de communication rejetée
Données bibliographiques
(51) Classification internationale des brevets (CIB):
  • H1C 7/10 (2006.01)
  • H1C 7/00 (2006.01)
  • H1C 7/12 (2006.01)
  • H1C 17/00 (2006.01)
  • H1C 17/08 (2006.01)
(72) Inventeurs :
  • NEUHALFEN, ANDREW J. (Etats-Unis d'Amérique)
(73) Titulaires :
  • LITTELFUSE, INC.
  • LITTELFUSE, INC.
(71) Demandeurs :
  • LITTELFUSE, INC. (Etats-Unis d'Amérique)
  • LITTELFUSE, INC. (Etats-Unis d'Amérique)
(74) Agent: SWABEY OGILVY RENAULT
(74) Co-agent:
(45) Délivré:
(86) Date de dépôt PCT: 1996-06-06
(87) Mise à la disponibilité du public: 1996-12-19
Requête d'examen: 1998-10-29
Licence disponible: S.O.
Cédé au domaine public: S.O.
(25) Langue des documents déposés: Anglais

Traité de coopération en matière de brevets (PCT): Oui
(86) Numéro de la demande PCT: PCT/US1996/012217
(87) Numéro de publication internationale PCT: US1996012217
(85) Entrée nationale: 1997-12-05

(30) Données de priorité de la demande:
Numéro de la demande Pays / territoire Date
08/474,502 (Etats-Unis d'Amérique) 1995-06-07
08/474,940 (Etats-Unis d'Amérique) 1995-06-07

Abrégés

Abrégé français

Le dispositif de circuit en couche mince décrit est un dispositif de protection contre les surtensions ultra-miniaturisé, pouvant être monté en surface, destiné à une technologie de carte de circuits imprimés ou de circuit hybride en couches épaisses. Le dispositif montable en surface (SMD) est conçu pour assurer une protection contre les décharges électrostatiques (ESD) subies par les composants électroniques. Le dispositif de protection de circuits est constitué de trois sous-ensembles de matériel. Le premier sous-ensemble comporte généralement un support de substrat, des électrodes, et des plages de connexion de bornes permettant de raccorder le dispositif de protection (60) à une carte de circuits imprimés. Le deuxième sous-ensemble comporte un matériau polymère à résistance variable de façon non linéaire en fonction de la tension, et le troisième sous-ensemble comporte une couche de revêtement de protection des autres éléments du dispositif de protection de circuit.


Abrégé anglais


The thin film, circuit device is a subminiature overvoltage protection device
in a surface mountable configuration for use in printed circuit board or thick
film hybrid circuit technology. The surface mountable device (SMD) is designed
to protect against electrostatic discharge (ESD) damage to electronic
components. The circuit protection device comprises three material
subassemblies. The first subassembly generally includes a substrate carrier,
electrodes, and terminal pads for connecting the protection device (60) to a
PC board. The second subassembly includes a voltage variable polymer material
with non-linear characteristics, and the third subassembly includes a cover
coat for protecting other elements of the circuit protection device.

Revendications

Note : Les revendications sont présentées dans la langue officielle dans laquelle elles ont été soumises.


CLAIMS
What is claimed is:
1. A thin film surface-mount
circuit protection device comprising:
a substrate (13) having a top
surface (57), a bottom surface (58) and
opposing side surfaces (59);
a pair of electrodes (21)
disposed on the top surface (57) of the
substrate (13), the electrodes (21) being made
of a first conductive metal and being spaced
apart by a gap (25);
a pair of multi-layered terminal
pads (34, 36) electrically connected to the
pair of electrodes (21), the terminal pads (34,
36) extending over the side surfaces (59) of
the substrate (13) and terminating on the
bottom surface (58) of the substrate (13); and,
a voltage variable polymeric
material deposited between the electrodes (21)
in the gap (25).
2. The surface-mount protection
device of Claim 1, wherein said first
conductive metal is selected from the group
including copper, silver, nickel, titanium,
aluminum or alloys thereof.
3. The surface-mount protection
device of Claim 1 wherein the layer of the

31
first conductive metal of the electrodes (21)
forms a part of the multi-layered terminal pads
(34, 36).
4. The surface-mount protection
device of Claim 3, wherein the layer of the
first conductive metal of the electrodes 21 and
part of the pads 34, 36 is one continuous
layer.
5. The surface-mount protection
device of Claim 1, wherein the electrodes 21
extend substantially the width of the circuit
protection device.
6. A thin film surface-mount
circuit protection device comprising:
a first subassembly including a
substrate (13) having a top surface (57), a
bottom surface (58) and opposing side surfaces
(59), first and second multi-layered terminal
pads (34, 36), and first and second electrodes
(21), the first and second electrodes (21)
being disposed on the top surface (57) of the
substrate (13) and being spaced apart to form a
gap (25), the first and second terminal pads
(34, 36) being electrically connected to the
first and second electrodes (21) respectively,
the first and second terminal pads (34, 36)
extending over the side surfaces (59) of the

32
substrate (13) and terminating on the bottom
surface (58) of the substrate (13); and,
a second subassembly including a
voltage variable polymeric material deposited
in the gap (25).
7. The surface-mount protection
device of Claim 6, further comprising a third
subassembly including a protective layer (56)
having a generally flat top surface (49) which
overlies the voltage variable polymeric
material and electrodes (21) so as to provide
protection from impacts and oxidation.
8. The surface-mount protection
device of Claim 7, wherein said protective
layer 56 is made of a polymeric material.
9. The surface-mount protection
device of Claim 6, wherein said supporting
substrate 13 is made of an FR-4 epoxy or a
polyimide.
10. The surface-mount protection
device of Claim 7, wherein the protective layer
(56), having a generally flat top surface (49),
is transparent and colorless.
11. The surface-mount protection
device of Claim 7, wherein the protective layer

33
(56), having a generally flat top surface (49),
is transparent and colored.
12. A method of manufacturing a thin
film surface-mount circuit device for
protection against electrostatic transient
voltage damage to electrical components,
comprising the steps of:
a. providing a substrate (13) having
a top (57), a bottom (58) and opposing sides
(59);
b. depositing, upon the top (13) of a
substrate, a first conductive layer to
simultaneously form a pair of electrodes (21)
and a first terminal pad layer, the electrodes
(13) being spaced apart by a gap (25) having a
gap width (W2), wherein the gap width (W2), at
least, partially determines a triggering
voltage and a clamping voltage rating for the
circuit device, and wherein depositing the
electrodes (21) creates a gap width (W) of less
than half of the width of one of the electrodes
21);
c. depositing a voltage variable
polymeric material in the gap (25), wherein the
voltage variable polymer is highly resistive
when a normal voltage is applied across the
voltage variable polymer, and wherein the
voltage variable polymer switches to a highly
conductive state when a high electrostatic
transient voltage is applied across the voltage

34
variable polymeric material, for protection
against electrostatic transient voltage damage
to electrical components.
13. The method as set forth in Claim
12, wherein the first terminal pad layer
extends from the top of the substrate (13) and
is deposited upon the sides of the substrate
(13) simultaneously with the depositing of the
first terminal pad layer on the top of the
substrate (13) and the depositing of the
electrodes (21) on the top of the substrate
(13).
14. The method as set forth in Claim
12, wherein the first conductive layer which
forms the electrodes (21) and the first
terminal pad layer is deposited by vapor
deposition, and wherein the gap width (W2) is
intricately dimensioned through
photolithography, in order to obtain specific
electrical characteristics for the circuit
device.
15. The method as set forth in Claim
12, wherein the first conductive layer which
forms the electrodes (21) and the first
terminal pad layer is electrochemically
deposited, and wherein the gap width (W2) is
intricately dimensioned through
photolithography, in order to obtain specific

electrical characteristics for the circuit
device.
16. A method of protecting a thin
film surface-mount circuit device for
protection against electrostatic transient
voltage damage to electrical components having
a pair of electrodes (21) separated by a gap
(25) having a gap width (W2), on the top
surface (57) of a substrate (13), wherein the
gap width (W2), at least, partially determines
a triggering voltage and a clamping voltage
rating for the circuit device, and wherein the
gap width (W2) is less than half of the width
of one of the electrodes (21), with a voltage
variable polymeric material deposited in the
gap, the method comprising placing a protective
layer (56) having a flat top surface (49) over
the electrodes (21), the voltage variable
polymeric material, and the gap (56).

Description

Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.


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8 0 4 P 4 0 7 PATE;~r
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M~3TEIOD AND APPARATUS FOR A 5~RFACE -iIJU ~ LA33LE
DE:~ICE FOR PROTE:CT:rON AGAINST ELBCTROgTAT:~C
r~AC:P! TO E:LEC'rRONIC COMPC~ r,L;i
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0~0 S~
21/11 '97 FRI 13: 56 [TX~RX N~ 9311 1

CA 02223746 1997-12-0~
DESCRIPTION
Technical Field
The present invention relates gener-
ally to sur~ace-mountable devices (SMDs) ~or
the protectlon of electrical circuits. More
particularly, this invention relates to
sur~ace-mountable devices ~or protection
against electrostatic discharge within
electrical circuits.
Backqround Prior Art
Printed circuit (PC) boards have
~ound increasing application in electrical and
electronic equipment o~ all kinds. The
electrical circuits ~ormed on these PC boards,
like larger scale, conventional electrical
circuits, need protection against electrical
overvoltage. This protection is typically
provided by commonly known electrostatic
discharge devices that are physically secured
to the PC board.
Examples o~ such a devices include
silicon diodes and metal oxide varistor (MOV)
devices. Document WO83/01153 discloses an
integrated protection device ~or the protection
o~ circuits and semiconductors against static
overvoltages or dynamic voltage overloads.
That device comprises the deposition on the
support (3) and on the external access
connections (4, 5) to the circuit o~ a non-
linear resistance or varistance (6), such that
the threshold voltage o~ the varistance i-s
AMEI~DED S,iEET

CA 02223746 l997-l2-0
t 3
lower than the critical overvoltage ~or the
circuit. However, there are several problems
with these devices. First, there are numerous
aging problems associated with these types o~
devices, as is well known. Second, these types
o~ devices can experience catastopic **SHOULD
THIS WORD BE CATASTROPHIC??? failures, also as
is well known. Third, these types o~ devices
may burn or ~ail during a short mode situation.
Numerous other disadvantages come to mind when
using these devices during the manu~acture o~ a
PC board
It has been ~ound in the past that
certain types o~ materials can provide
protection against ~ast transient overvoltage
pulses within electronic circuitry. These
materials at least include those types o~
materials ~ound in U.S. Patent Nos. 4,097,834,
4,726,991, 4,977,357, and 5,262,754. However,
the time and costs associated with
incorporating and e~ectively using these
materials in microelectronic circuitry is and
has been signi~icant. The present invention is
provided to alleviate and solve these and other
problems.
Summary o~ the Invention
The present invention is a thin ~ilm,
electrostatic discharge sur~ace mounted device
(ESD/SMD) which comprises three material
subassemblies. The ~irst subassembly includes
the substrate carrier.

. ~
= CA 02223746 1997-12-0~
4 ........................... . .
The ~irst or substrate-carrier
subassembly comprises a carrier base havlng two
electrodes on the top sur~ace which are
separated by a gap o~ controlled width, and
wrap-around terminal pads on the side and
bottom o~ the carrier base. The second
subassembly or voltage variable polymeric
material is applied between the two electrodes
and ef~ectively bridges gap between the
electrodes. The third subassembly or cover
coat is placed over the polymeric material and
electrodes on the top sur~ace o~ the ~irst or
substrate subassembly. The third subassembly
provides a protective layer which overlies the
second subassembly and electrodes, as well as
part o~ the terminal pads connected to the
electrodes, so as to provide protection from
impacts, oxidation, and other e~ects, as will
be described ~urther below.
The third subassembly or
protective layer is pre~erably made o~ a
polymeric material, such as polyurethane or
polycarbonate. In addition, the most pre~erred
supporting substrate is an FR-4 epoxy or a
polyimide.
Another aspect o~ the invention
is a thin ~iIm, sur~ace-mounted con~iguration
o~ the ESD/SMD. In particular, the device
comprises electrodes made o~ a conductive
metal. The ~irst conductive metal is
preferably, but not exclusively, selected ~rom
,~:. . ,

CA 02223746 1997-12-0~
the group including copper, silver, nickel,
titanium, aluminum or alloys o~ these
conductive metals. One pre~erred metal ~or the
electrodes o~ the ESD/SMD invention is copper.
The ~irst conductive metal or
electrodes may be deposited onto the ~irst
subassembly in many shapes. Photolithographic,
mechanical and laser processing techniques may
be employed to create very small, intricate and
complex electrode geometries, as well as
creating an appropriate gap width. This
capability, when combined with the extremely
thin ~ilm coatings applied through
electrochemical and physical vapor deposition
(PVD) techniques, enables these subminiature
protective devices 60 to control the gap
between the electrodes and protect circuits
~rom signi~icant levels o~ overvoltage.
The location o~ the electrodes at the
top o~ the substrate o~ the ESD/SMD enables one
to use laser processing methods as a high
precision secondary operation, in that way
trimming the gap width, and thus, the rating o~
the device.
Other ~eatures and advantages o~ the
invention will be apparent ~rom the ~ollowing
speci~ication taken in conjunction with the
~ollowing drawings.
Brie~ Description o~ Drawinqs
FIG. 1 is a perspective view o~ a
copper-plated, FR-4 epoxy sheet used to make a

CA 02223746 1997-12-0~
subminiature ESD/SMDs in accordance with the
present invention.
FIG. 2 is a cross-sectional view o~ a
portion o~ the sheet o~ FIG. 1, and taken along
lines 2-2 o~ FIG. 1.
FIG. 3 is a perspective view o~ the
FR-4 epoxy sheet o~ FIG. 1, but stripped o~ its
copper plating, and with a plurality o~ slots,
each having a width W1 and a length L, routed
into separate quadrants o~ that sheet.
FIG. 4 is an enlarged, cut-away
perspective view o~ a portion o~ the routed
sheet o~ FIG. 3, but with a copper plating
layer having been reapplied.
FIG. 5 is a top perspective view o~
several portions o~ the ~lat, upward-~acing
sur~aces o~ the replated copper sheet ~rom FIG.
4, a~ter each o~ those portions were masked
with a patterned panel o~ an ultraviolet (W)
light-opaque substance.
FIG. 6 is a perspective view o~ the
reverse side o~ FIG. 5, but a~ter the removal
o~ a strip-like portion o~ copper plating ~rom
the replated sheet o~ FIG. 5.
FIG 7 is a perspective view o~ the
top 57 o~ the strips 26 o~ FIG. 6, and showing
linear regions 40 de~ined by dotted lines.
FIG. 8 is a view o~ a single strip 26
a~ter dipping into a copper plating bath and
then a nickel plating bath, with the result
that additional copper layer and a nickel layer

- CA 02223746 1997-12-0~
are deposited onto the terminal-pads portions
o~ the base copper layer.
FIG. 9 is a perspective view o~ the
strip o~ FIG. 8, but after immersion into a
tin-lead bath to create another layer over the
copper and nickel layers o~ the terminal pads.
FIG. 10 shows the strip o~ FIG. 9,
depicting the region where the voltage variable
polymeric strip will be applied.
FIG. 11 shows the strip o~ FIG. 10,
but with an added polymeric material 43 into
the gap 25 o~ the strip 26.
FIG. 12 shows the strip o~ FIG. 11,
but with an added cover coat 56 over the
electrodes 21 and polymeric material 43.
FIG. 13 shows the individual ESD/SMD
in accordance with the invention as it is
~inally made, and a~ter a so-called dicing
operation in which a diamond saw is used to cut
the strips along parallel planes to ~orm the
individual devices.
FIG. 14 is a ~ront view o~ the
stencil printing machine used to per~orm the
stencil printing step o~ the ESD/SMD
manu~acturing process.
Detailed Description
While this invention is susceptible
o~ embodiments in many di~erent ~orms, there
is shown in the drawings and will herein be
described in detail, a pre~erred embodiment o~
the invention with the understanding that the

CA 02223746 1997-12-0~
present dlsclosure is to be considered as an
exempli~ication o~ the principles o~ the inven-
tion and is not intended to limit the broad
aspects of the invention to the embodiment
illustrated.
One pre~erred embodiment o~ the
present invention is shown in FIG. 13. The
thin ~ilm, circuit device is an subminiature
overvoltage protection device in a sur~ace
mountable con~iguration ~or use in printed
circuit board or thick film hybrid circuit
technology. One given name ~or the device is
an electrostatic discharge sur~ace-mounted
device (ESD/SMD). The sur~ace mountable device
(SMD) is designed to protect against
electrostatic discharge (ESD) damage to
electronic components. The layout and design
o~ the ESD/SMD device is such that it can be
manu~actured in many sizes. One standard
industry size ~or sur~ace mount devices,
generally, is 3.175 mm (125 mils.) long by
1.524 mm (60 mils.) wide. This sizing is
applicable to the present invention, and can be
designated, ~or shorthand purposes, as "1206"
sized devices. It will be understood, however,
that the present invention can be used on all
other standard sizes ~or sur~ace mountable
devices, such as 1210, 0~05, 0603 and 0402
devices, as well as non-standard sizes. The
protection device o~ the present invention are
designed to replace silicon diodes and MOV
AAfiENOED SHE~T

- CA 02223746 1997-12-0~
technologies which are commonly used ~or low
power protection applications.
The protection device generally
comprises three material subassemblies. As
5 will be seen, the first subassembly generally
includes a substrate carrier or substrate 13,
electrodes 21, and terminal pads 34, 36 ~or
connecting the protection device 60 to the PC
board. The second subassembly includes the
voltage variable polymer material 43, and the
third subassembly includes the cover coat 56.
The ~irst or substrate carrier
subassembly comprises a carrier base 13 having
two electrodes 21 on the top sur~ace which are
15 separated by a gap 25 O~ controlled width W2,
and wrap-around terminal pads 34, 36 on the top
57, bottom 58, and side 59 D~ the ~irst
subassembly 13. The second subassembly or
voltage variable polymeric material 43 iS
applied between these two electrodes 21 and
e~ectively bridges the gap 25. A cover coat
56 iS placed over the polymeric material 43 and
the electrodes 21 on the top sur~ace 57 O~ the
substrate subassembly, and partially on the top
57 O~ the terminal pads 34, 36. The third
subassembly provides protection ~rom impacts
which may occur during automated assembly, and
protection ~rom oxidation and other e~ects
during use.
More particularly, the ~irst or
substrate subassembly incorporates a carrier
r ~ S~EIET

CA 02223746 1997-12-0~
10 ' ;' '
base 13 made o~ a seml-rigid epoxy material.
This material exhibits physical properties
nearly identical with the standard substrate
material used in the printed circuit board
industry, thus providing ~or extremely well
matched thermal and mechanical properties
between the device and the board. Other types
o~ material can be used as well.
The ~irst subassembly ~urther
includes two metal electrodes 21 which are a
part o~ the pads 34, 36 as one continuous layer
or ~ilm. As will be seen, the pads 34, 36 are
made up o~ several layers, including a base
copper layer 44 which also makes up the
electrodes 21, a supplemental copper layer 46,
a nickel layer 48, and a tin-lead layer 52 to
make up the rest o~ the pads 34, 36. In
another embodiment, the supplemental copper
layer 46 also makes up a second copper layer o~
the electrodes 21 (not shown), thereby
increasing the thickness o~ the electrodes 21.
The base copper layer o~ the pads and the
electrodes are simultaneously deposited by (1)
electrochemical processes, such as the plating
described in the pre~erred embodiment below; or
(2) by physical vapor deposition (PVD). Such
simultaneous deposition ensures a good
conductive path between the pads 34, 36,
electrodes 21, and second subassembly 43 when
an overvoltage situation occurs. This type o~
deposition also ~acilitates manu~acture, and

- CA 02223746 l997-l2-0~
permits very precise control of the thickness
of the layers, including the electrodes 21.
After initial placement of the base copper 44
on~o the substrate or core 13, additional
5 layers 46, 48, 52 of a conductive metal are
placed onto the terminal pads, as mentioned
above. These additional layers could be
defined and placed onto these pads by
photolithography and deposition techniques,
respectively.
The two metal electrodes, whether one
or two layers (or more) thick are separated by
a gap 25 Ci~ a controlled width W2. The
substrate subassembly also contains and
supports the two (2) terminal pads 34, 36 on
the top 57, bottom 58, and sides 59 off the
protection device These bottom 58 and/or
sides 59 off the terminal pads 34, 36 serve to
at~ach the device to the board and provide an
electrical path :~rom the board to the
electrodes 21. Again, the electrodes 21 and
the terminal pads consist of a copper sheet 44
laminated to the case substrate material 13.
The other layers are deposited, either
electrochemically or physical vapor deposition
(PVD), simultaneously to ensure a good,
continuous conductive path between the
electrodes on the top sur~ace of the substrate,
and the terminal pads 34, 36 on the bottom o~
the substrate 13. This configuration allows
for ease o~ manufacture ~or surface mount

- CA 02223746 1997-12-0~
assembly techniques to allow for a wrap around
configuration o~ the terminal pads. The gap
width W2 between the electrodes 21 are de~ined
by photolithographic techniques and through an
etching process. The nature of the
photolithographic process allows for very
precise control of the width W2 of the
separation o~ the electrode metallization. The
gap 25 separating the electrodes 21 extends on
a straight line across the top sur~ace o~ the
substrate 13. Proper sizing and configuration
o~ the gap provides for proper trigger voltages
and clamping voltages along with fast response
time and reliable operation during an
overvaltage condition. The electrode
metallization can be selected from a variety of
elemental or alloy materials, i.e. Cu, Ag, Ni,
Ti, Al, NiCr, Tin, etc., to obtain coatings
which exhibit desired physical, electrical, and
metallurgical characteristics.
Photolithography, mechanical, or
laser processing techniques are employed ~or
de~ining the physical dimensions and width o~
the gap 25 and o~ the terminal pads 34, 36.
Subsequent photolithography and deposition
operations are employed to deposit additional
metallization to the terminal pads, i.e. Cu,
Ni, and Sn/Pb, to a specified thickness.
The voltage variable polymeric
material 43 provides the protection from ~ast
transient overvoltage pulses. The polymeric

CA 02223746 1997-12-0~
material 43 provides ~or a non-linear
electrical response to an overvoltage
condition. The polymer 43 is a material
comprising ~inely divided particles dispersed
in an organic resin or an insulating medium.
The polymeric material 43 consists o~
conductive particles which are uni~ormly
dispersed throughout an insulating binder.
This polymer material 43 exhibits a non-linear
resistance characteristic which is dependent on
the particle spacing and the electrical
properties o~ the binder. This polymer
material is available from many sources and is
disclosed by a variety o~ patents as was
lS mentioned above.
The cover coat 56 subassembly is
applied a~ter the metal deposition, pattern
de~inition, and polymer 43 application process,
to the top sur~ace o~ the substrate/polymer
subassembly to provide a means ~or protecting
the polymeric material 43 and to provide a ~lat
top sur~ace ~or pick-and-place sur~ace mount
technology automated assembly equipment. The
: cover coat 56 prevents excessive oxidation o~
the electrodes 21 and the polymer 43 which can
degrade the per~ormance o~ the protection
device 60. The cover coat 56 can be comprised
of a variety o~ materials including plastics,
con~ormal coatings, polymers, and epoxies. The
cover coat 56 also serves as a vehicle ~or
marking the protective devices 60 with the

CA 02223746 1997-12-0
14
marklng being placed between separate layers,
or on the sur~ace o~ the cover coat 56 through
an ink trans~er process or laser marking.
This protective device 60 may be made
5 by the following process. Shown in FIGS. 1 and
2 is a solid sheet 10 o:E an FR-4 epoxy with
copper plating 12. The copper plating 12 and
the FR-4 epoxy core 13 o~ this solid sheet 10
may best be seen in FIG. 2. This copper-plated
10 FR-4 epoxy sheet 10 is available ~rom Allied
Signal T.~m; n~te Systems, Hoosick Falls, New
York, as Part No. 0200BED130C1/ClGFN0200
C1/ClA2C. Although FR-4 epoxy is a pre~erred
material, other suitable materials include any
15 material that is compatible with, i . e ., o:E a
chemically, physically and structurally similar
nature to, the materials ~rom which PC boards
are made, as ment ioned above . Thus, another
suitable material ~or this solid sheet 10 is
20 polyimide . FR- 4 epoxy and polyimide are among
the class o:E materials having physical
properties that are nearly identical with the
standard substrate material used in the PC
board industry. As a result, the protective
25 device 60 and the PC board to which that
protection device 60 is secured have extremely
well-matched thermal and mechanical properties.
The substrate oi~ the protective device 60 o~
the present invention also provides desired
30 arc-tracking characteristics, and
simultaneously exhibits su~lcient mechanical

- CA 02223746 1997-12-0~
~lexibility to remain intact when exposed to
the rapid release o~ energy associated with
overvoltage.
In the next step o~ the process o~
manu~acturing the protective devices 60, the
copper plating 12 is etched away ~rom the solid
sheet 10 by a conventional etching process. In
this conventional etching process, the copper
is etched away from the substrate by a ~erric
chloride solution.
Although it will be understood that
a~ter completion o~ this step, all o~ the
copper layer 12 of FIG. 2 is etched away ~rom
FR-4 epoxy core 13 o~ this solid sheet 10, the
remaining epoxy core 13 o~ this FR-4 epoxy
sheet 10 is di~erent ~rom a "clean" sheet o~
FR-4 epoxy that had not initially been treated
with a copper layer. In particular, a
chemically etched sur~ace treatment remains on
the sur~ace of the epoxy core 13 a~ter the
copper layer 12 has been removed by etching.
This treated sur~ace o~ the epoxy core 13 is
more receptive to subsequent operations that
are necessary in the manu~acture o~ the present
sur~ace-mounted subminiature protective device
60.
The FR-4 epoxy sheet 10 having this
treated, copper-~ree sur~ace is then routed or
punched to create slots 14 along quadrants o~
the sheet 10, as may be seen in FIG. 3. Dotted
lines visually separate these ~our quadrants in

CA 02223746 l997-l2-05
16
FIG. 3. The width Wl o~ the slots 14 (FIG. 4)
is about 0.0625 inches. The length L o~ each
o~ the slots 14 (FIG. 3) is approximately
5.125
When the routing or punching has been
completed, the etched and routed or punched
sheet 10 shown in FIG. 3 is again plated with
copper. This reapplication o~ copper occurs
through the immersion o~ the etched and routed
sheet o~ FIG. 3 into an electroless copper
plating bath. This method o~ copper plating is
well-known in the art.
This copper plating step results in
the placement o~ a copper layer having a
uni~orm thickness along each o~ the exposed
sur~aces of the sheet 10. For example, as may
be seen in FIG. 4, the copper plating 18
resulting ~rom this step covers both (1) the
flat, upper sur~aces 22 o~ the sheet 10; and
(2) the vertical, interstitial regions 16 that
de~ine at least a portion o~ the slots 14.
These interstitial regions 16 must be copper-
plated because they will ultimately ~orm a
portion o~ the terminal pads 34, 36 o~ the
~inal protection device 60. The uni~orm
thickness o~ the copper plating will depend
upon the ultimate needs o~ the user.
A~ter plating has been completed, to
arrive at the copper-plated structure o~ FIG.
4, the entire exposed sur~ace o~ this structure

CA 02223746 l997-l2-0
17 -
is covered with a so-called photoresist
polymer.
An otherwise clear mask is placed
over the replated copper sheet 20 a~ter it has
been covered with the photoresist. Patterned
panels are a part o~, and are evenly spaced
across, this clear mask. These patterned
panels are made o~ an W light-opaque
substance, and are o~ a size and shape
corresponding to the size and shape generally
o~ the patterns 30 shown in FIG. 5.
Essentially, by placing this mask having these
panels onto the replated copper sheet 20,
several portions o~ the ~lat, upward-~acing
sur~aces 22 o~ the replated copper sheet 20 are
e~ectively shielded ~rom the e~ects o~ W
light.
It will be understood ~rom the
following discussion that the pattern 30 will
essentially de~ine the shapes and sizes o~ the
electrodes 21 and polymer strip 43. A later
step de~ines the remainder o~ terminal pads 34,
36. It will be appreciated that the width,
~ length and shape o~ the electrodes 21 and
polymer strip 43 may be altered by changing the
size and shape o~ the W light-opaque panel
patterns. In particular, one embodiment o~ the
present invention includes having curved
corners 19 (not shown) instead o~ sharp corners
19 as shown. In ~act, it has been seen that it
is pre~erable to curve the corners 19.

CA 02223746 l997-l2-0
18
This step, therefore, defines the gap
25 between the electrodes 21, as well as the
notches 23 in the electrodes 21. As mentioned
above, photolithographic, mechanical, and laser
processing techniques can be employed to
configure very small, intricate, and complex
electrode 21 and gap 25 geometries. The
electrode 21 configuration can be conveniently
modified to obtain specific electrical
characteristics in resultant protective devices
60. The gap width W2 can be changed to provide
control of triggering and clamping voltages
during an overload event. The indicated
device construction results in a triggering and
clamping voltage rating similar to devices o~
previous construction. Tests have been
conducted with peak voltages o~ 2kV, 4kV, and
8kV as the ESD waveform. The use o~ a 2 mil
and 4 mil gap width resulted in triggering
voltages o~ loO-150 V and clamping voltages o~
30-50 V.
Additionally within this step, the
backside o~ the sheet is covered with a
photoresist material and an otherwise clear
mask is placed over the replated copper sheet
after it has been covered with the
photoresist. A rectangular panel is a part o~
this clear mask. The rectangular panels are
made of a W light-opaque substance, and are of
a size corresponding to the size o~ the panel
28 shown in FIG. 6. Essentially, by placing

~ CA 02223746 1997-12-0~
thls mask having these panels onto the replated
copper sheet 20, several strips of the flat,
downward-facing surfaces 28 of the replated
copper sheet 20 are ef~ectively shielded from
the e~fects of the W light.
The rectangular panels will
essentially define the shapes and sizes of the
wide terminal pads 34 and 36 and the lower
middle portion 28 of the bottom 58 of the strip
26. Thus, the copper plating from a portion of
the bottom 58 of a strip 26 is defined by a
photoresist mask. Particularly, the copper
plating from the lower, middle portion 28 of
the bottom 58 of the strip 26 is removed. A
perspective view of this section of this
replated sheet 20 is shown in FIG. 6.
The entire replated, photoresist-
covered sheet 20, i.e., the top 57, bottom 58,
and sides 59 of that sheet 20, is then
subjected to W light. The replated sheet 20
is subjected to the W light for a time
sufficient to ensure curing of all of the
photoresist that is not covered by the square
panels and rectangular -strips of the masks.
Thereafter, the masks containing these square
panels and rectangular strips are removed from
the replated sheet 20. The photoresist that
was formerly below these square panels remains
uncured. This uncured photoresist may be
washed from the replated sheet 20 using a
solvent.
~/~cNOE
=

~ - }
- CA 02223746 1997-12-0
- i
The cured photoresist on the
remainder o:E the replated sheet 20 provides
protection against the next step in the
process. Particularly, the cured photoresist
prevents the removal of copper beneath those
areas of cured photoresist. The regions
~ormerly below the patterned panels have no
cured photoresist and no such protection.
Thus, the copper ~rom those regions can be
removed by etching. This etching is per~ormed
with a ~erric chloride solution.
A~ter the copper has been removed, as
may be seen in FIGS. 5 and 6, the regions
formerly below the patterned panels and the
rectangular strips o~ the mask are not covered
at all. Rather, those regions now comprise
areas 28 and 30 o~ clear epoxy.
The replated sheet 20 is then placed
in a chemical bath to remove all o~ the
remaining cured photoresist ~rom the previously
cured areas o~ that sheet 20.
For the purposes o~ this
speci~ication, the portion o~ the sheet 20
between adjacent slots 14 is known as a strip
26. This strip has a dimension D as shown in
FIG. 4 which defines the length of the device.
After completion o~ several o~ the operations
described in this speci~ication, this strip 26
will ultimately be cut into a plurality o~
pieces, and each o~ these pieces becomes an
AMrN.~, t~

~ CA 02223746 1997-12-0~
ESD/SMD or protective device 60 in accordance
with the invention.
As may also be seen ~rom FIG. 6, the
underside 58 o~ the strip 26 has regions along
its periphery which still include copper
plating. These peripheral regions 34 and 36 o~
the underside 58 o~ the strip 26 ~orm portions
o~ the pads. These pads will ultimately serve
as the means ~or securing the entire, ~inished
protective device 60 to the PC board.
FIG. 7 is a perspective view o~ the
top-side 57 o~ the strips 26 o~ FIG. 6.
Generally opposite and coinciding with the
lower, middle portions 28 o~ these strips 26
are linear regions 40 on this top-side 38.
These linear regions 40 are defined by the
dotted lines o~ FIG. 7.
FIG. 7 is to be re~erred to in
connection with the next step in the
manu~acture o~ the invention. In this next
step, a photoresist polymer is placed along
each o~ the linear regions 40 o~ the top side
57 o~ the strips 26. Through the covering o~
these linear regions 40, photoresist polymer is
also placed along the gap 25 and electrodes 21.
These electrodes 21 are made 0? a conductive
metal, here copper. The photoresist is then
treated with W light, resulting in a curing o~
the photoresist onto linear region 40.
As a result o~ the curing o~ this
photoresist onto the linear region 40, metal
~,? '~

CA 02223746 l997-l2-0
22
will not adhere to this linear region 40 when
the strip 26 iS dipped into an electrolytic
bath containing a metal ~or plating purposes.
In addition, as explained above, the
middle portion 28 oi~ the underside 58 o:E the
strip 26 will also not be subject to platlng
when the strip 26 is dipped into the
electrolytic plating bath. Copper metal
previously covering this metal portion had been
removed, revealing the bare epoxy that ~orms
the base o~ the sheet 20. Metal will not
adhere to or plate onto this bare epoxy using
an electrolytic plating process.
The entire strip 26 is dipped into an
electrolytic copper plating bath and then an
electrolytic nickel plating bath. As a result,
as may be seen in FIG. 8, copper 46 and nickel
layers 48 are deposited on the base copper
layer 44. Ai~ter deposition of~ these copper 46
and nickel layers 48, an additional tin-lead
layer 52 is deposited in these same areas
through an electrolytic tin-lead bath as shown
in FIG. 9. The cured photoresist polymer on
the linear region 40 is then removed.
As shown in FIGS. 10 and 11, the
polymer material 43 iS then applied. The
polymer 43 can be applied in a number o~ ways.
For example, the polymer 43 can be applied
using the stencil printing machine shown in
FIG. 14 in a manner similar to the use oi~ the
stencil printing described ~urther below. In

- CA 02223746 l997-l2-0~
addition, the polymer 43 can be applied
manually with a tube o~ the polymer 43. Other
automated means for applying the polymer 43 are
possible as well. Once the polymer 43 has been
applied and deposited within region 42, and in
between regions 41, the sheet 20 is heat cured
to solidi~y the polymer 43 to obtain strips 26
that look like the strip 26 in FIG. 11.
The next step in the manu~acture o~
the protective device 60 is the placement,
across the length o~ the most of the top 57 o~
the strip 26, o~ a protective layer 56 ( FIG.
12). This protective layer 56 iS the third
subassembly o~ the present protective device
60, and ~orms a relatively tight seal over the
electrodes 21 and polymer strip 43 area. In
this way, the protective layer 56 provides
protection from oxidation and impacts during
attachment to the PC board. This protective
layer also serves as a means o~ providing ~or a
sur~ace ~or pick and place operations which use
a vacuum pick-up tool.
This protective layer 56 helps
to control the melting, ionization and arcing
which occur in the ~usible link 42 during
current overload conditions. The protective
layer 56 or cover coat material provides
desired arc-quenching characteristics,
especially important upon interruption o~ the
~usible link 42.

- CA 02223746 1997-12-0~
24 '
The application o~ the cover coat 56
is such that it can be performed in a single
processing step using a simple ~ixture to
de~ine the shape o~ the body o~ the device.
This method of manufacture provides ~or
advantages over current methodologies in
protecting the electrodes 21, gap 25, and
polymer 43 ~rom physical and environmental
damage. The application o~ the conformal
coating 56 is performed in such a fashion that
the physical location o~ the electrode gap 25
is not critical, as in a clamping or die mold
method. The con~ormal coating may be mixed
with a colored dye prior to application to
provide for a color-coded voltage rated
protective device 60.
The protective layer 56 may be
comprised of a polymer, pre~erably a
polyurethane gel or paste when a stencil
printing cover coat application process is
used, and pre~erably a polycarbonate adhesive
when an injection mold cover coat application
process is used. A pre~erred polyurethane is
made by Dymax. Other similar gels, pastes, and
adhesives are suitable ~or the invention
depending on the cover coat application process
used. In addition to polymers, the protective
layer 56 may also be comprised of plastics,
con~ormal coatings and epoxies.
This protective layer 56 is applied
to the strips 26 using a stencil printing

- CA 02223746 1997-12-0~
process which includes the use of a common
stencil printing machine shown in FIG. 14. It
has been found that stencil printing is faster
than some alternative processes for applying
the cover coat 56, such as with an injection
mold process using die molds. Specifically, it
has been found that the use of a stencil
printing process while using a stencil printing
machine, at least, doubles production output
from the injection mold operation. The stencil
printing machine is made by Affiliated
Manufacturers, Inc. of Northbranch, New Jersey,
Model No. CP-885.
In the stencil printing process, the
material is applied to all of the strips 26 in
one quadrant of the sheet 20, simultaneously.
Using the stencil print process, the material
cured much faster than the injection mold
process because the cover coat material is
directly exposed to the W radiation, while the
W light must travel through a filter in the
injection mold process. Furthermore, the
stencil printing process produces a more
uni~orm cover coat than the injection filling
process, in terms of the height and the width
of the cover coat 56. Because of that
uniformity, the fuses can be tested and
packaged in a relatively fast automated
process. With the injection filling process it
may be difficult to precisely align the
protective devices 60 in testing and packaging

CA 02223746 l997-l2-0
26
equipment due to some non-uniform heights and
widths of the cover coat 56.
The stencil printing machine
comprises a slidable plate 70, a base 72, a
squeegee arm 74, a squeegee 76, and an overlay
78. The overlay 78 is mounted on the base 72
and the squeegee 76 is mc;vably mounted on the
squeegee arm 74 above the base 72 and overlay
78. The plate 70 is slidable underneath the
base 72 and overlay 78. The overlay 78 has
parallel openings 80 which correspond to the
width of the cover coat 56.
The stencil printing process begins
by attaching an adhesive tape under the sheet
20. The sheet 20, with the adhesive tape
attached, is placed on the plate 70 with the
adhesive tape between the plate 70 and the fuse
sheet 20. The cover coat 56 material is then
applied with a syringe at one end of the
overlay 78. The plate 70 slides underneath the
overlay 78 and lodges the sheet 20 underneath
the overlay 78 in correct alignment with the
parallel openings 80. The squeegee 76 then
lowers to contact the overlay 78 beyond the
material on the top of the overlay 78. The
squeegee 76 then moves across the overlay 78
where the openings 80 exist, thereby forcing
the cover coat 56 material through the openings
80 and onto each of the strips 26 of the sheet
20. Thus, the cover coat now covers the
electrodes 21, the gap, 25, and the polymer

CA 02223746 1997-12-0~
strip 43 (FIGS. 12 and 13). The squeegee 76 is
then raised, and the sheet 20 is unlodged ~rom
the overlay 78. The openings 80 in the overlay
78 are wide enough so that the protective layer
partially overlaps the pads 34, 36, as shown in
FIGS. 12 & 13. In additlon, the material used
as the cover coat material should have a
viscosity in the paste or gel region so that
a~ter the material is spread onto the sheet 20,
it will ~low in a manner which creates a
generally ~lat top sur~ace 49, but such that
the material 56 will not ~low into the slots
14. The sheet 20 o~ strips 26 are then W
cured in a W chamber. At the end of this
curing, the polyurethane gel or paste has
solidi~ied, ~orming the protective layer 56
(FIGS. 12 and 13).
Although a colorless, clear cover
coat is aesthetically pleasing, alternative
types of cover coats may be used. For example,
colored, clear or transparent cover coat
materials may be used. These colored materials
may be simply manu~actured by the addition o~ a
dye to a clear cover coat material. Color
coding may be accomplished through the use o~
these colored materials. In other words,
di~erent colors o~ the cover coat can
correspond to di~erent ratings, providing the
user with a ready means o~ determining the
rating o~ any given protective device 60. The
transparency o~ both o~ these coatings permit

CA 02i23746 1997-12-0~ -
.
28
the user to visually inspect the polymer strip
43 prior to installation, and during use.
The strips 26 are then ready for a
so-called dicing operation, which separates
those strips 26 into individual fuses. In this
dicing operation, a diamond saw or the like is
used to cut the strips 26 along parallel planes
61 (FIG. 12) into individual thin film surface-
mounted fuses 60 (FIG. 13). The cuts bisect
the notches 23 in the electrodes 21. At this
point, it can more easily be understood that
the metallization of the electrodes 21 is
removed from the notches 23 or notched areas
23. Specifically, it is easier to cut through
notched areas 23 without the electrodes. In
addition, during dicing, curling of the
metallization may take place along the cut,
-thereby causing a curl of metal (part of an
electrode) to move into the gap area and
effectively reduce the gap width W2. Putting
the notches 23 in the places where the dicing
is to take place alleviates this possible
problem and other possible problems. It should
be noted that the notches 23 can extend further
toward the pads 34, 36, and that the corners 19
of the notches 23 can be curved in alternative
embodiments.
This cutting operation completes the
manufacture of the thin film protective device
60 (FIG. 13) of the present invention.

- CA 02223746 1997-12-0
29
All o~ the preceding ~eatures combine
to produce an ESD/SMD device assembly which
exhibits improved control o~ triggering and
clamping voltage characteristics by regulating
electrode and gap geometries, and the polymer
43 composition. The dimensional control
aspects o~ the deposition and photolithographic
processes, coupled with the proper selection o~
electrode and polymer 43 material, provide ~or
consistent triggering and clamping voltages.
However, it wlll be understood that the
- invention may be embodied in other speci~ic
~orms without departing ~rom the spirit or
central characteristics thereo~.
. . . i
AMEI~ID~D SHEET

Dessin représentatif
Une figure unique qui représente un dessin illustrant l'invention.
États administratifs

2024-08-01 : Dans le cadre de la transition vers les Brevets de nouvelle génération (BNG), la base de données sur les brevets canadiens (BDBC) contient désormais un Historique d'événement plus détaillé, qui reproduit le Journal des événements de notre nouvelle solution interne.

Veuillez noter que les événements débutant par « Inactive : » se réfèrent à des événements qui ne sont plus utilisés dans notre nouvelle solution interne.

Pour une meilleure compréhension de l'état de la demande ou brevet qui figure sur cette page, la rubrique Mise en garde , et les descriptions de Brevet , Historique d'événement , Taxes périodiques et Historique des paiements devraient être consultées.

Historique d'événement

Description Date
Inactive : CIB de MCD 2006-03-12
Inactive : CIB de MCD 2006-03-12
Le délai pour l'annulation est expiré 2001-06-06
Demande non rétablie avant l'échéance 2001-06-06
Inactive : Abandon. - Aucune rép dem par.30(2) Règles 2000-10-10
Réputée abandonnée - omission de répondre à un avis sur les taxes pour le maintien en état 2000-06-06
Inactive : Dem. de l'examinateur par.30(2) Règles 2000-04-10
Inactive : Supprimer l'abandon 1999-04-26
Inactive : Abandon. - Aucune rép. à lettre officielle 1999-03-08
Inactive : Transfert individuel 1999-02-22
Inactive : Acc. réc. RE - Pas de dem. doc. d'antériorité 1998-12-15
Exigences pour une requête d'examen - jugée conforme 1998-10-29
Requête d'examen reçue 1998-10-29
Toutes les exigences pour l'examen - jugée conforme 1998-10-29
Inactive : CIB attribuée 1998-03-27
Symbole de classement modifié 1998-03-27
Inactive : CIB attribuée 1998-03-27
Inactive : CIB en 1re position 1998-03-27
Inactive : CIB attribuée 1998-03-27
Inactive : Lettre de courtoisie - Preuve 1998-03-10
Inactive : Notice - Entrée phase nat. - Pas de RE 1998-03-04
Demande reçue - PCT 1998-03-03
Demande publiée (accessible au public) 1996-12-19

Historique d'abandonnement

Date d'abandonnement Raison Date de rétablissement
2000-06-06

Taxes périodiques

Le dernier paiement a été reçu le 1999-03-17

Avis : Si le paiement en totalité n'a pas été reçu au plus tard à la date indiquée, une taxe supplémentaire peut être imposée, soit une des taxes suivantes :

  • taxe de rétablissement ;
  • taxe pour paiement en souffrance ; ou
  • taxe additionnelle pour le renversement d'une péremption réputée.

Les taxes sur les brevets sont ajustées au 1er janvier de chaque année. Les montants ci-dessus sont les montants actuels s'ils sont reçus au plus tard le 31 décembre de l'année en cours.
Veuillez vous référer à la page web des taxes sur les brevets de l'OPIC pour voir tous les montants actuels des taxes.

Historique des taxes

Type de taxes Anniversaire Échéance Date payée
TM (demande, 2e anniv.) - générale 02 1998-06-08 1997-12-05
Taxe nationale de base - générale 1997-12-05
Requête d'examen - générale 1998-10-29
Enregistrement d'un document 1999-02-22
TM (demande, 3e anniv.) - générale 03 1999-06-07 1999-03-17
Titulaires au dossier

Les titulaires actuels et antérieures au dossier sont affichés en ordre alphabétique.

Titulaires actuels au dossier
LITTELFUSE, INC.
LITTELFUSE, INC.
Titulaires antérieures au dossier
ANDREW J. NEUHALFEN
Les propriétaires antérieurs qui ne figurent pas dans la liste des « Propriétaires au dossier » apparaîtront dans d'autres documents au dossier.
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Description du
Document 
Date
(yyyy-mm-dd) 
Nombre de pages   Taille de l'image (Ko) 
Description 1997-12-04 29 943
Revendications 1997-12-04 6 163
Dessins 1997-12-04 6 220
Dessin représentatif 1998-03-29 1 8
Abrégé 1997-12-04 1 60
Page couverture 1998-03-29 1 60
Avis d'entree dans la phase nationale 1998-03-03 1 193
Accusé de réception de la requête d'examen 1998-12-14 1 172
Demande de preuve ou de transfert manquant 1998-12-07 1 110
Courtoisie - Certificat d'enregistrement (document(s) connexe(s)) 1999-03-28 1 117
Courtoisie - Lettre d'abandon (taxe de maintien en état) 2000-07-03 1 184
Courtoisie - Lettre d'abandon (R30(2)) 2000-12-18 1 171
PCT 1997-12-04 57 1 720
Correspondance 1998-03-09 1 31