Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
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METHOD AND APPARATUS FOR HIDIRECTIONAL DEMODULATION
OF DIGITALLY MODULATED SIGNALS
BACKGROUND OF THE INVENTION
S Field of the Invention
The present invention i:elates to the demodulation of
digitally modulated signals and, more particularly, to
such signals received through radio channels subjected to
the interference phenomenon such as fading, distortion and
intersymbol interference.
History of the Related Art
In the communication of digitally modulated radio
signals such as are employed in mobile radio telephone
systems, the quality of thE~ signal received by a mobile
station from a base station is affected from time to time
by natural phenomena inherent in the use of radio signals
to communicate. A factor common to most of the problems
related to radio reception is that a desired signal at a
receiver is too weak, either in comparison to thermal
noise or in comparison to an interfering signal. The
interfering signal can be characterized as any undesired
signal received on the same channel by the receiver as the
desired signal.
Another common transmission problem in mobile radio
systems used in an environment where there are objects
such as buildings present, is that of log-normal fading.
This phenomenon occurs as a result of a shadowing effect
produced by buildings and natural obstacles such as hills
located between the transmitting and receiving antennas
of the mobile station and th~~ base station. As the mobile
station moves around within the environment, the received
signal strength increases a:nd decreases as a function of
the type of obstacles which are at that moment between the
transmitting and receiving antennas.
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Another phenomenon which effects signal strength
within the mobile radio system operated in an urban
environment is that of Rayleigh fading. This type of
signal degradation occurs when a broadcast signal takes
more than one path from the transmitting antenna to the
receiving antenna so that the receiving antenna of the
mobile station receives not just one signal but several.
One of these multiple signals may come directly from the
transmitting antenna but several others are first
reflected from buildings and other obstructions before
reaching the receiving antenna and, thus, are delayed
slightly in phase from one: another. The reception of
several versions of the same signal shifted in phase from
one another results in a vector sum of the signals being
a resultant composite signal actually received at the
receiving antenna. In some cases, the vector sum of the
received signal may be very low, even close to zero,
resulting in a fading dip wherein the received signal
virtually disappears. In the cases of a moving mobile
station, the time that el<~pses between two successive
fading dips due to Rayleigh fading depends on both the
frequency of the received signal and the speed at which
the mobile station is moving.
In case of digitally modulated radio systems, such
as those in which time division multiple access (TDMA) is
used, other radio transmission difficulties arise. One
of these difficulties, referred to as time dispersion,
occurs when a signal representing certain digital
information is interfered with at the receiving antenna
by different, consecutively transmitted symbols due to
reflections of the original signal from an object far away
from the receiving antenna. It thus becomes difficult for
the receiver to decide which actual symbol is being
detected at the present moment. Another transmission
phenomenon inherent in the: use of digitally modulated
signals, such as TDMA, is du~~ to the fact that each mobile
station must only transmit during a particular allocated
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time slot of the TDMA frame and remain silent during the
other times. Otherwise, tlZe mobile will interfere with
calls from other mobile stations which are assigned
different time slots of the: same frame.
One technique used to deal with the time dispersion
of digitally modulated signals and the resultant inter-
symbol interference is equalization within the receiver.
Since an optimum receiver is adapted to the particular
type of channel used for t:he transmission, equalization
creates a mathematical model of the channel and adjusts
the receiver to this model. If the receiver knows how
long and how strong the signal reflections are, it can
take this into account when the received signal burst is
detected. In the mobile radio environment, an equalizer
creates a model of the transmission channel, e.g. the air
interface, and calculates t:he most probable transmitted
sequence of data within than channel. For example, TDMA
digitally modulated data is transmitted in bursts which
are placed within discrete time slots. A "training
sequence" comprising data of a known pattern and with good
auto-correlation properties is placed somewhere in each
burst. This training sequence is used by the equalizer
to create the channel model. The channel model may change
with time, so that it may be tracked during each burst.
The training procedure within the equalizer may also
involve correlating the received signal burst with one or
more shifts of the training pattern to determine a
corresponding number of points (both phase and amplitude)
of the channel's impulse response.
An MLSE equalizer typically implements a linear,
finite-impulse-response (FIZZ) model of the channel, that
is, a transversal filter or a tapped delay line having
complex multiplication weights applied to the tap outputs.
The weighted outputs are gummed to predict, for each
possible data symbol pattern that can be contained within
the time span of the chan.nel's impulse response, the
signal waveform that should :be received for the next data
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symbol. The predicted waveforms are compared with the
actually received waveform and metrics for and against the
probability of each data symbol pattern being "correct"
(i.e., the pattern received) are accumulated. Each metric
is based on the accurac~~r of the match between the
predicted waveform and the received waveform. The data
symbol patterns that can be contained within the time span
of the channel's impulse response correspond to the
"states" of the system. ~~uch equalizers are sometimes
referred to as "Viterbi" equalizers and are described in
J . G . Proaki s , Digi tat Communi ca Lion, 2d ed, New York,
McGraw-Hill, Sections 6.3 wind 6.7 (1989).
The weights applied to the delay line tap outputs are
the J coefficients, cl, cZ, c3... C~, in the equation:
S:=clD:+czDi_,+c3D:_2... C~Di_~,l;r
where S:is the predicted signal for the sequence of data
symbol patterns Di, Di_1, Di_2._._ The coefficients are usually
calculated from the known training pattern. In the case
of signaling by binary data symbols, (i.e., 1 and 0), the
number of predicted signals that must be calculated is 2'.
It is understood that Mary (e. g. quaternary) data symbols
can also be used.
Various methods for optimally updating the channel
model from the received signal are known, such as that
described in European patent application no. EP-A-0425458,
filed September 10, 1990. The best methods maintain a
separate channel model for each Viterbi state and, when
one of the states is selected as the best predecessor of
a new state, the channel model corresponding to that state
is updated and becomes the channel model for the new
state. Thus, it is ensured that the channel models are
always derived from the best demodulated data sequences
received up to that time.
U.S. Patent No. 5,331,666 to Dent entitled "Adapted
Maximum Likelihood Modulator" describes a variation of the
adaptive Viterbi equalizer that does not employ ~:.annel
models to generate the predictions except duri.~.g system
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start-up, and thus does not update the channel model
parameters. Rather, direct updating of the signals
predictions for each statES, without going through the
intermediate step of first updating the channel models is
described in the Dent '666 patent.
Viterbi equalizers incorporate the following steps
in performing their functions: (1) determining the tap
coefficients of a Finite Impulse Response (FIR) model of
the channel; (2) for all possible data symbol sequences
that can be postulated to be contained within the impulse
response length of the channel model, predicting the
signal value that should be received based upon the
determined tap coefficients; (3) comparing each postulated
value with the actually received signal value and
calculating the mismatch (usually by squaring the
difference between the recE_ived and postulated values) ;
(4) for each postulated symbol sequence, adding the
calculated mismatch to t:he cumulative mismatch of
predecessor sequences that are consistent with the
postulated symbol sequence, also called "the state" (the
cumulative mismatch values are called "path metrics"); and
(5) choosing the "best" of the possible predecessor
sequences that can transition to the new postulated state,
i.e., choosing the predecessor sequence that gives the
lowest path metric for the: new state. Thus, the path
metrics can be considered confidence factors that
represent the degrees of correlation between the
postulated symbol sequences and the actually received
signal.
It should be appreciated that the Viterbi equalizer
is a form of sequential maximum likelihood sequence
estimator (MLSE) that decodes, or demodulates, the
received data symbol stream. MLSE estimators and other
equalization methods are dESSCribed in the reference by
J.G. Proakis, above.
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FIG. 1 illustrates the data structure and flow within
an MLSE equalizer having 16 states, the predicted signal
values being assumed to depend on four previous binary
symbols (bits) plus one new bit. The channel impulse
response length (J) for this example is thus five symbols,
i.e., the latest echo can be four symbols delayed compared
to the shortest signal path.
Referring to FIG.1, an MLSE processing cycle begins
by assuming the postulated symbol history of state 0000
to be true, and that a new bit "0" was transmitted.
Consequently, causing the channel model 40, the signal
value that should be observed given the 5-bit symbol
history 00000 predicted. This is compared in comparator
50 with the actual received signal value and a mismatched
value produced. This is added in adder 51 with the
previous state 0000 path metric to produce a candidate
metric for a new 0000 state.
However, another candidate for the new path metric
of new state 0000 can be derived by assuming state 1000
to contain the true history, with a new bit of '0'. This
is because both 0000-0 and 1000-0 lead to a new state (0-
0000) when the oldest (left-most) bit is left shifted out
of the 4-bit state number and into the symbol history
memory. This candidate is evaluated by applying 10000 to
the channel model 40, comparing the prediction so-obtained
with the input signal value in comparator 50 and adding
the resultant mismatch with the previous cumulative
mismatch (path metric) associated with state 1000 in adder
52. The two candidate values from adders 51 and 52 are
then compared in a comparator 53, and the lower of the two
is selected to become the new path metric of new state
0000. Furthermore, the contents of the history memory 55
associated with the selected predecessor state is selected
to be the symbol history of the new state 0000. Also, the
selected bit history is left-shifted and a 0 or 1 entered
in the right-most position according as state 0000 or 1000
gave rise to the selected candidate path metric.
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The above procedure is then repeated with the
assumption that the new bit is a '1' in order to produce
a new state 0001, also with either state 0000 or 1000 as
' candidate predecessors.
The above procedure is then repeated using every pair
of states, which are 8 states apart, to derive all 16 new
states, as follows:
0001,1001 to produce new states 0010 and 0011
0010,1010 to produce new states 0100 and 0101
0011,1011 to produce new states 0110 and 0111
0100,1100 to produce new states 1000 and 1001
0101,1101 to produce new states 1010 and 1011
0110,1110 to produce new states 1100 and 1101
0111,1111 to produce new states 1110 and 1111
At the end of the above processing cycle, one signal
sample has been processed and one extra bit has been
demodulated and inserted into ~;ymbol history memories 55.
There is a tendency for the older bits in the history
memories to converge to the ~aame value, at which point
that bit can be extracted as a final unambiguous decision
and the history memory shortened 1 bit. Other methods of
truncating history memory growth are known to the art,
such as taking the oldest bit from the state having the
lowest path metric. If memory is sufficient, bits need
not be extracted until all received values have been
processed.
It will be understood that the MLSE equalizer
recognizes that some sequences of data symbol patterns,
and thus some sequences of predicted waveforms, are not
valid. For example, a prediction that the channel carried
the binary data symbol pattern 10010 at one instant (i.e.,
one bit period) and a prediction that the channel carried
the binary data symbol pattern 11001 at the next instant
(i.e., the next bit period) are inconsistent because the
pattern 10010 can be followed only by the patterns 00100
or 00101 (assuming a left-shaft in passing through the
channel.) Also under such conditions, each of the 00100
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and 00101 patterns can have only either 10010 or 00010 as
predecessors. Thus, a set of transition rules constrains
the number of ways the metrics can be sequentially
accumulated for each sequence of predicted waveforms.
It will be appreciated that such prior demodulators
operate on the received signal only in the forward
direction: a received training pattern is used to develop
predicted waveforms for yet-to-be-received data symbols.
If the training pattern is lost or excessively distorted
due to severe channel fading, intersymbol interference,
frequency errors, etc., such forward demodulators must
wait until the next training pattern is successfully
received before they are able to demodulate accurately.
As a result, data sent in the intervening periods between
training patterns can be lost.
In U.S. Patent No. 5,335,250 to Dent et al. entitled
"Method and Apparatus for Bidirectional Demodulation of
Digitally Modulated Signals" a technique is disclosed and
claimed for minimizing the loss of data sent during
intervening periods between training patterns. This
technique includes the demodulation of intervening data
not only forward from a received training pattern but also
backwards from the next received training pattern. In
general, this technique is implemented by storing a
sequence of received signal samples, time-reversing the
stored sequence, and estimating quality factors for both
forward and backward demodulation of the stored and time
reversed sequence, respectively, to determine how many
data symbols should be decoded by forward demodulation and
how many should be decoded by backward demodulation.
In the technique set forth in the '250 patent, the
criterion decide which direction to continue demodulation
from the training pattern is based upon the metric in the
MLSE equalizers which is typically related to the noise
level within the received data. Since the accuracy of the
demodulated signal depends not only upon the level of
noise but also the signal strength, a technique for
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determining which direction to demodulate from the
training pattern which considers other parameters related
to both signal strength and noise results in a better
performance. The system of the present invention
incorporates such a technique.
DE 43 11 604 C1/U.S. Patent No. 5,633,860 discloses
a method for reliability-controlled data detection of TDMA
bursts with a central test: sequence used to determine
identification parameters of a transmission channel. The
data adjoins the central test sequence at both ends and
are subdivided into N sectors each having M sampled signal
values. A scheme is used to process a measure of
reliability for each N se~~tor so as to determine the
identification parameters of the transmission channel.
U.S. Patent No. 5,400,362 discloses a digital time
division multiple access (TDMA) radio communications
system including a receiver used to demodulate encoded
symbols into digital information. The encoded symbols are
demodulated into digital information in a forward and
reverse direction using calculated metrics associated with
a signal-to-noise ratio.
SUI~IARY OF THE INVENTION
The present invention provides a method and apparatus
for enhancing the performance of bidirectional digital
modulation of digitally modulated signals by processing
blocks of symbols and deciding which direction to continue
demodulation based upon a figure of merit (FOM) associated
with the processed block of symbols which can be obtained
from parameters other than i:he equalizer metrics. Among
the parameters used by the system of the present invention
are: an estimation of signal strength, which can be
obtained from the predicted received values; a ratio of
signal strength to noise; an estimation of received signal
strength (signal plus noise power) which can be obtained
from the received data; and a parameter obtained by taking
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the ratio of received signal plus noise power divided by
noise.
In one aspect, the present invention is directed to
a system and method for bid_Lrectionally demodulating data
symbols transmitted through a communication channel. The
method includes sequentially receiving and storing a first
plurality of known data symbols, a second plurality of
unknown data symbols, and a third plurality of known data
symbols. Thereafter, a first block of the unknown data
symbols received nearer the first plurality of known data
symbols is forward-demodulated. Likewise, a second block
of the unknown data symbols received nearer the second
plurality of known data symbols is backward-demodulated.
The forward- and backward-demodulation of the unknown data
symbols determines quality values (figure-of-merits based
on at least one of noise: power, signal power and a
combination of signal power plus noise power) indicative
of demodulation qualities of the unknown data symbols that
are compared to produce a best direction indication. Upon
determining the best direction indication, either the
forward- or backward-demodulation steps are repeated for
subsequent blocks of unkno~m data symbols.
BRIEF DESCRIPTION OF THE DRAWINGS
A more complete understanding of the method and
system of the present invention may be obtained by
reference to the following Detailed Description of the
preferred embodiments) that. follow, taken in conjur_ction
with the accompanying drawings, wherein:
FIGURE 1 is a diagrammatic representation of a
maximum likelihood algorithm that can be used to implement
a demodulator;
FIGURE 2A shows a diagram illustrating the format of
a portion of a signal for processing in accordance with
the present invention;
FIGURE 2B shows the format of a portion of a signal
transmitted in a digital cellular radio telephone system;
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FIGURE 3 is a block diagram of a system for
demodulating transmitted data symbols in both the forward
and backward directions;
FIGURE 4A is a block diagram of a system for
determining the optimum direction for demodulation of
transmitted data symbols in accordance with the system of
the present invention;
FIGURE 4B is an illustrative diagram of the control
logic for determining the optimum direction of modulation
for the system of FIG. 4A _Ln accordance with the system
of the present invention;
FIGURE 5 is a diagramrnatic illustration of stepped
bidirectional equalization in accordance with the system
of the present invention; and
FIGURE 6 is a flow chart illustrating the method and
system of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIG. 2A shows the format of a portion 10 of a data
modulated signal that may loe processed by a method and
apparatus in accordance with the present invention. The
portion 10 comprises: a plurality of first predetermined
data symbols 11, which are known before hand to a receiver
and precede a first plurality of unknown data symbols 12;
a plurality of second predetermined data symbols 13, which
are known beforehand to the receiver and precede a second
plurality of unknown data symbols 14; and a plurality of
third predetermined data symbols 15, which are known
before hand to the receiver. It should be understood that
the portion 10 is only a small part of a communication
signal that is used for illustrative purposes. In a time-
multiplexed communications system, the data symbols 12 can
be intended for reception by a first receiver that uses
the data symbols 11 as its equalizer training pattern, and
the data symbols 14 can be intended for a second receiver
that uses the data symbols 13 as its equalizer training
pattern. The first and second receivers can be two
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separate receivers receiving a TDMA radio signal in
separate slots of the same frame.
In accordance with bidirectional demodulation
techniques, the pluralities 11, 13 of first and second
S predetermined symbols, are used by one receiver to improve
demodulation of the intervening plurality of unknown data
symbols 12. Also the plurality 13, of second
predetermined data symbols, can be used by another
receiver in conjunction with the later plurality of third
predetermined data symbols 15 to demodulate the
intervening plurality of unknown data symbols 14. It can
be seen that the pluralities of first and second
predetermined symbols may be identical to the plurality
of third predetermined symbols and that patterns of
predetermined data symbols may be interspersed among the
unknown data symbols 12 in order to better demodulate the
unknown symbols.
An apparatus in accordance with the present invention
preferably employs one of the MLSE equalizers such as
those described above. For a Viterbi demodulator, as set
forth in the '250 patent, the path metric serves as the
measure of the cumulative quality of the symbols already
decoded.
Referring next to FIG. 3, an apparatus 100 for
bidirectional demodulation of transmitted data symbols in
accordance with the '250 patent comprises a received
signal sampler 102 that digitizes the received signal
after suitable conditioning. The signal sample values
are then stored in a suitable memory 104. The signal
samples are recalled from the memory 104 in response to
control signals generated by controller 106, and presented
to a Viterbi demodulator 108. The controller 106 may also
generate appropriately timed signals for triggering the
signal sampler 102.
The stored signal samples are first recalled from the
memory 104 in normal time order, namely, the predetermined
data symbols 11 followed by the unknown data symbols 12.
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As described above, the Vit:erbi demodulator 108 uses the
known symbols 11 to initi<~lize the.Viterbi demodulator
using some of the received signal sample values. Then,
the Viterbi demodulator demodulates symbols 12 using some
of the received signal sample values.
The controller 106 then recalls the received signal
samples from the memory 104 in reverse time order, namely,
predetermined symbols 13 (reversed), followed by the
unknown data symbols 12 (reversed), and the backwards
signal samples are presented to the Viterbi demodulator
109. The Viterbi demodulator 109 processes the backwards
signal samples in the same way that the forward signal
samples were processed. Thus, the time-reversed sequence
of predetermined symbols 13 is used to predict the signal
sample values expected for each possible time-reversed
sequence of the unknown data symbols 12, and the
prediction giving the best match (lowest cumulative path
metric) is determined.
The comparator 110 compares the best-matched path
metrics of the forward and backward demodulations, and the
predicted data symbol sequence corresponding to the lower
best-matched path metric is selected as the demodulation
of the unknown data symbol pattern 12. It will be
appreciated that the operations described herein can be
conveniently carried out by means of a signal processor
consisting of a random access memory for holding signal
samples and the results of intermediate calculations, an
arithmetic and logic unit (AI~U) capable of performing the
operations of ADD, SUBTRACT, and MULTIPLY, and a program
memory holding a list of instructions for the ALU together
with a controller that can transfer execution of
instructions from one place to another within the list
depending upon the result of an arithmetic operation such
as SUBTRACT, which can be: used to perform magnitude
comparisons. A suitable signal processor is, for example,
the model TMS 320C50 digital signal processor maru~.~ctured
by Texas Instruments.
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By the use of a second predetermined symbol sequence,
or training pattern, as described above, bidirectional
demodulation is advantageously robust against losses of
the predetermined symbol sequences (e.g., losses due to
channel fading). For example, a deep fade occurring
nearer one of the predetermined signal sequences can
induce errors in a conventional demodulator in which the
' channel model is updated based upon the received signal
(i.e., the equalizer is adaptive). In contrast, the
present demodulator would be unaffected: if the fade
occurs nearer the training pattern 11 than training
pattern 13, then the, reverse demodulation would succeed
for a longer sequence of data symbols than the forward
demodulation (producing a lower cumulative path metric for
the reverse demodulation), and would be selected by the
processor 110. Thus, the illustrative bidirectional
demodulator selects that demodulation direction giving the
greater run-length of successively demodulated symbols.
This desirable tendency is encouraged in another
technique useful with the circuitry of FIG. 3, in which
two partial path metrics are determined by forward
demodulating half of the received unknown data symbols 12
and backward-demodulating the other half. Each of the
best-matched path metrics determined by forward- and
backward-demodulating all the symbols 12 is then compared
with the sum of the two partial path metrics, and the
predicted data symbol sequence corresponding to the best
of the three path metrics is selected and output as the
demodulation of the unknown data symbol pattern. The
foregoing requires a negligible amount of additional
processing, but gives additional robustness against a deep
fade occurring near the center of the unknown data symbol
sequence.
As pointed out above, the method and system of the
present invention recognizes that signal quality
information can include not just metric growth ~ ~ but
also signal strength ~) or signal plus noise (S+N) as
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well as certain ratios of those parameters to the noise.
In addition, the system of the :present invention controls
the direction of forward or backward demodulation based
upon groups of symbol periods rather than a single symbol
as in the prior art '250 patent.
Ref erring next to FIG . 4A, there is shown a block
diagram of a system constructed in accordance with the
principles of the present invention. A memory 151
receives the data samples to be demodulated 152 and stores
them as signal sample values. The signal samples are
recalled from the memory 151 in response to control
signals generated by a controller 153 and presented to
bath a forward demodulator 154 and a backward demodulator
155. Demodulation quality information is coupled from the
forward demodulator 154 to the controller 153 via line 156
while quality information is connected from the backward
demodulator 155 to the controller 153 via line 157.
Output symbol information from both the forward
demodulator 154 and the bacl~:ward demodulator 155 are
connected to a multiplexer 158 the output of which
comprises complete symbol information 159.
The processing circuitry of FIG. 4A processes blocks
of symbols, for example, 12 at a time, which are extracted
from memory 151 and then decides which direction to
continue demodulation based upon a block figure-of-merit
(FOM). The figure-of-merit can include a number of
different possible criteria, including (1) Nest (noise
value), which can be obtained from metric growth as
employed in the prior art ' 2 5 0 patent ; ( 2 ) Sest ( s ignal
value), which can be obtained from the predicted received
values; {3) SeSt~Nest (ratio of the signal to noise) ; (4)
(S+N) esc (which can be obtained from the received data) ;
and ( 5 ) ( S+N) est~Nest . Various criteria can be used to
select which of the FOM are employed to make the direction
decision; for example, if(S+N)estare used, the point where
the two modulation direction would meet can be pre-
computed. Additional FOM are also possibly used, for
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example, an alternative of Sect would be the channel gain,
taken from the channel tap estimates of the demodulator.
In addition, the present invention can be implemented
with a cost function approach which might include the
following: (1) signal and/or noise power estimation, as
described above; (2) sync quality information; (3)
distance from sync word, accounting for tracking
uncertainty; and/or (4) fade depth information or relative
signal and/or noise information. The cost function may
be expressed either algebraically or by means of a set of
rules.
Referring again to FIG. 4A, two blocks of samples are
extracted from memory 151, one being forward demodulated
in demodulator 154 and one being backward demodulated in
demodulator 155 and then quality information based upon
a preselected figure-of-merit (FOM) is sent via lines 156
and 157 to the controller circuit 153. The two sets of
quality information are compared to one another and a
decision reached in the control block 153 with respect to
which direction of demodulation is providing the higher
quality results. Thereafter, the system demodulates a
second block of data in the direction that produced the
better results and compaires the quality of that
demodulation with the prior :result of the other direction
and decides whether to continue in the same direction or
change direction for the next block of symbols to be
demodulated. As symbol information is produced by each
of the forward demodulator 154 and backward demodulator
155, it is output to the multiplexer 158 which sends
complete symbol information :L59 to the remaining circuitry
of the receiver. Control unit 153 compares a forward
block FOM with a backward block FOM. If the forward block
FOM is better, then the next forward block is demodulated.
Otherwise, the next backward block is demodulated.
Referring to FIG. 4B, there is shown a functional
diagram illustrating an i:Llustrative operation of the
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control circuit 153 in FIG. 4A. The logic circuit of 4B
implements the following logical algorithms:
Fwd Control ~det { (p+N Fwd) ~ N Back) - (S N Back)
(N Fwd) }
Back Control = Opposite of Fwd Control
where det produces a "1" or "on" if the input is positive.
As can be seen in FIG. 4B, the signal plus noise in
the forward direction over line 161 is multiplied times
the noise in the backward direction over line 162 while
the noise in the forward direction over line 163 is
multiplied times the signal plus noise in the backward
direction over line 164. The difference between the
respective products is taken in a subtract operation 165
and passed through a detector 166 which applies a forward
control signal on line 167 and a back control signal on
168 as appropriate.
It can also be seen that another algorithm such as
the following could also be implemented by logical control
circuitry:
S+N~: ~ S+Na
NF NH
Yes = >:Fwd
No - >Back
Referring briefly to FIG. 5, there is
diagrammatically illustrated the stepped bidirectional
equalization performed in one aspect of the present
invention. A sequence of unknown symbols 171 is located
between two blocks of known symbols 172 and 173. The
unknown symbols 171 are bidirectionally demodulated by
demodulating a first block: of symbols in the forward
direction at 174 and a second block of symbols in the
backward direction at 175. Based upon an analysis of the
results of demodulation in both directions, the better-
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-18-
direction (forward in this example) is selected and
forward modulation continues at 176 and 177. 178
represents demodulation in the backward direction in
response to that direction providing the better results.
Resumption of demodulation in the forward direction at 179
is followed by additional demodulation in the backward
direction at 181. Demodulation of the entire unknown
block of symbols 171 is completed by three successive
forward demodulations 182, 183 and 184. Thus, it can be
seen how changing the direction of demodulation for
successive blocks of symbols functions where better
results are obtained from demodulating one direction over
another and produces a higher quality output signal closer
to the originally transmitted data.
It should be noted that the present invention can be
used when the block length is the same as the length of
the unknown symbols. In this case, the single block is
demodulated both forward and backward. It may be
advantageous for the first forward block to be a block of
symbols in known symbols 11. In this case, the symbol
values are known, which can be used to constrain the
demodulator to the correct detected symbol values. A FOM
for this block can still be calculated and used as already
described. A similar approach can be used in the backward
direction with known symbols 13.
Referring next to FIG. 6, there is shown a flow chart
illustrating certain aspects of the method and system of
the present invention. At 201 the system receives and
stores data samples and at 202 synchronizes both ends of
the received data to be demodulated. At 203 the system
demodulates forward one block and demodulates backward one
block. The results of the demodulations in the two
opposed directions are compared at 204 to determine which
produced the higher quality result. At 205 the system
inquires as to which direction yields the better quality
output and if it is the forward direction demodulation is
CA 02274101 1999-06-04
..
,, ,
,. .
-19- ' "
continued in the forward direction at 206 for one
additional block. After that block is demodulated the
system evaluates at 207 whether or not the data sample has
been completely demodulated and, 'if not, the system
returns to 204 to compare th.e quality of the most recently
forward and backward demodu:Lated blocks. If, however, at
205, demodulation in the backward direction is determined
to yield the better quality, the system continues at 208
to demodulate in the backward direction and evaluates at
209 whether or not the system has completely demodulated
the entire signal sample. If not, the system returns to
204 to compare the quality of the most recently forward
and backward demodulated b:Locks. When the entire signal
sample unit has been demodu:Lated, the system ends at 210.
It will be appreciated that the above-described
methods may be used with simpler demodulators than the
mufti-state Viterbi equalizer. For example, a symbol-by-
symbol demodulator that alao generates path metrics may
be constructed by simplifying a Viterbi demodulator to a
single state. Such simplified Viterbi demodulator
compares each received signal sample with reference signal
values corresponding to all values a data symbol can have,
decides which reference va:Lue (and therefore which data
symbol) the received signal most closely matches, and
accumulates the residual mismatch as a cumulative quality
measure or path metric.
It should also be noted that the demodulator need not
even be a Viterbi equalizer. It could be another
equalizer type other than Vi.terbi or any demodulator type.
The quality information about the demodulation depends
upon the detector type. Far example, if the detector is
a linear or decision feedba~~k equalizer, then the quality
may include the mean square error or filter coefficient
values.
The foregoing methods may also be used either with
differentially encoded modulations, minimum-shift keying
("MSK") 4-MSK, or DQPSK, in which data is encoded in the
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-20-
changes between signal samples, or with coherent
modulations, such as PSK or QPSK, in which data is encoded
in the absolute values of the signal samples. For
differential modulations, the forward and backward
demodulated symbol sequences represent absolute signal
values that can be decoded differentially by comparing
neighboring values to determine the changes, and thus the
transmitted data.
An important application of the present invention is
in receiving n/4-DQPSK signals transmitted by a cellular
radio telephone base station conforming to the CTIA
standard IS-136. The format of the transmitted data is
shown in FIG. 2B. A group 16 of fourteen predetermined
symbols for synchronization, or training, precedes a group
17 of unknown quaternary data symbols that each bear two
bits of data. The group 17 comprises two subgroups of six
and sixty-five symbols, and precedes another group 18 of
six predetermined symbols that is usually called CDVCC.
The groups 16-18 are followed by another group 19 of
unknown quaternary data symbols that each bear two bits
of data and another group 20 of fourteen predetermined
symbols. The group 19 comprises two subgroups of sixty-
five and six symbols. It will be noted that this format
is symmetrical when viewed in the forward and backward
time directions. The system of the present invention
performs forward demodulation of the symbol group 17 using
the group 16 of predetermined symbols, and backward
demodulation of the group 17 using the known six-symbol
CDVCC 18. Partial path metric value comparison and symbol
selection process is performed separately for data symbol
groups 17 and 19.
Alternatively, data symbol groups 17, 18, and 19 can
be treated as unknown, so that forward demodulation
proceeds from data symbol group 16 and backward
demodulation proceeds from data symbol group 20.
Some operational details of the demodulators 154 and
155 are due to the differential decoding of the n/4-DQPSK
CA 02274101 1999-06-04
. ~ , i
, . i
v
a 1
._21- , ~ , i s
which is handled as follows. When one of the four states
is evaluated as a possible predecessor to a new state, the
differential symbol represented by the postulated state
transition is calculated. For example, the transition
from predecessor state 00 to successor state 00 implies
a differential symbol 00 (since 00+00=00 mod 2), the
transition from 11 to 10 implies a differential symbol O1
since 11+O1=10 mod 2) , and so on. Soft information is
generated for the two constituent bits of the differential
symbol as the difference between the surviving path
metrics and the path metric: for the transition with each
bit of implied differential. symbol inverted in turn, and
the differences, accorded the signs of the differential
symbol bit-pair, are entered into the symbol history. The
soft values may be used subsequently in an error-
correction decoding process, such as a soft-decision,
Viterbi convolutional decoder.
The present invention .is not limited to TDMA systems.
It can also be used in FDMA, CDMA and hybrid systems. For
example, the present invention can be applied to a direct
sequence CDMA system, using spread-spectrum modulation,
in which there are pilot symbols. The pilot symbols
correspond to the known symbols. Demodulation may be
performed by a correlator receiver. If necessary,
multiple correlations followed by Rake combining may be
performed. Quality information can be represented by the
amplitude of the output of t:he Rake combiner. Channel tap
coefficient estimates can also be used.
Although a preferred embodiment of the method and
apparatus of the present invention has been illustrated
in the accompanying drawings and described in the
foregoing detailed description, it is to be understood
that the invention is not limited to the embodiment (s)
disclosed, but is capable of numerous rearrangements,
modifications and substitutions without departing from the
invention as set forth a:nd defined by the following
claims.
