Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
CA 02347071 2001-05-10
ADAPTIVE DUTY CYCLE MANAGEMENT
METHOD AND SYSTEM FOR RADIO TRANSMITTERS
Field of invention
The present invention is directed to management of the duty cycle of wireless
data transmissions and, in particular, to an adaptive duty cycle management
method
and system for digital radio frequency (RF) transmitters which limit the duty
cycle on a
sliding window basis to a preselected maximum amount.
Background of the invention
There exists a concern regarding the safety to users of wireless
communications
devices, such as mobile radios and cellular telephones, when these devices are
operated in their transmit mode by rE;ason that it is perceived the
electromagnetic
radiation associated with the transmission of the signals from such devices
may pose a
potential health hazard to the user. ~JVhen using a hand-held wireless device
the user
holds the device near the ear and this positions the devices transmission
antenna in
close proximity to the user's hand and head as it transmits electromagnetic
radiation.
and it is postulated that a portion of this radiation may be absorbed by the
head and
hand and that such absorption may cause health risks to the user. The
perceived
potential health hazard associated with wireless transmitting devices
increases as the
power of the signals transmitted from the device increases.
To address this perceived health risk many countries have adopted legislation
requiring that the effective radiated power (ERP) of wireless devices be
limited. For
instance, the American National Standards Institute (ANSI) in association with
the
Institute of Electrical and Electronic Engineers, Inc. (IEEE) has adopted new
standards
for RF exposure viz. ANSI/IEEE C95.1-1992. The Federal Communications
Commission (FCC) has adopted limits for maximum permissible exposure (MPE)
time
which, generally, are more restrictive than the previously adopted limits and
guidelines
and apply to land-mobile systems, such as cellular radio, pocket and hand-held
radio
telephones. . These limits are based on recommended exposure guidelines
published
by the National Council on Radiation Protection and Measurements (NCRP) in
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CA 02347071 2001-05-10
"Biological Effects and Exposure Criteria for Radio frequency Electromagnetic
Fields,
"NCRP Report No. 86, Sections 17.4.1, 17.4.1.1, 17.4.2 and 17.4.3. Copyright
NCRP,
1986, Bethesda, Maryland 20814. The guidelines provide for exclusions to the
regulations if it can be shown through laboratory procedures that exposure
conditions
do not exceed a certain specific absorption rate (SAR) or, alternatively, if
the radiated
power is below a certain level.
A quantification of MPE for uncontrolled environments is based on, inter olio,
the
electric and magnetic field strengths, the power density, the frequency range
of the
radio signal, the distance between the user's head and the transmitter
radiating point.
Thus, the MPE can be correlated to ~~ maximum permitted transmission power,
which
may vary with the frequency range of a wireless device.
One method of meeting the applicable MPE limitations is to reduce the duty
cycle of the transmitter. While techniques such as TDM (time division
multiplexing)
inherently activate the transmitter for less than 100% percentage of the total
communication time, it is not an easy task to reduce the duty cycle of the
transmitter on
a source basis (i.e. without regard to network traffic) in such a way as to
effectively
control the duty cycle without negatively degrading the performance of the
network and
without averaging duty cycles over unreasonably long periods (tens of minutes
or
hours). Instead, since data is randomly transmitted over various time
intervals, it is
desired that the wireless device itself limit the effective transmit (active)
time.
In order to address the foregoing need for an effective method and system for
managing the duty cycle of a transmitter the inventor developed the subject
matter
herein which makes effective use the quiet time inherent during a
transmission.
Summar~r of the Invention
The present invention provides. a method and system for adaptively limiting
the
duty cycle of a transmitter of a wireless device in order to comply with MPE
requirements while preserving the ability to broadcast RF signals at a level
sufficient to
establish and/or maintain a quality radio link. This is achieved by sliding
(moving) a
reference window of time over which ;~ preselected duty cycle is calculated
(e.g. one
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CA 02347071 2001-05-10
minute), thereby taking advantage of any quiet time preceding a burst, and
afterwards
enforcing only as much quiet time as required to meet the desired duty cycle
limitation.
The specific duty cycle to be imposed by the method and system is
predetermined and
selectable (i.e. a duty cycle of, say, :Z% can be set as can a duty cycle of,
say, 25%).
The resulting average power output is therefore also controllable by selecting
the
appropriate duty cycle.
In accordance with the present invention there is provided a duty cycle
management system and method for use in a wireless device comprising a
transmitter
for transmitting packets in the form of individual packets and/or packet
bursts
comprising a predetermined maximum number of contiguous packets. The
transmitter
is operable over a duration measurable as a series of contiguous time windows
with
each time window comprising a predetermined number of timeslots and each
timeslot
having a predetermined nominal duration. The transmitter is configured for
transmitting
one packet during one timeslot and has an associated predetermined duty cycle
limit
for the transmitted packets. A controller in combination with a storage medium
containing instructions executable by the controller limits the number of
packets
transmitted during each time period defined by one time window or adjacent
time
windows, on a sliding basis, so as to limit the duty cycle of transmissions
during
successive adjacent time windows) to the predetermined duty cycle limit. In
doing so
the transmission of packets is delayE~d as needed to establish sufficient idle
periods)
during adjacent time windows to maintain the duty cycle within the duty cycle
limit.
The controller identifies prior to the transmission of a packet whether such
packet is an individual packet or a burst packet. A counter is used in the
preferred
embodiment for keeping a running count which may be correlated to the duty
cycle over
one or more time windows. The counter is incremented by an amount of either IC
or
two times IC for each timeslot in which a packet is transmitted and is
decremented by
an amount DC for each idle timeslot, whereby the ratio of IC to DC is the duty
cycle
limit. For an individual packet, transrnission of the packet is permitted when
the counter
amount does not exceed a maximum counter amount equal to the predetermined
number of timeslots per time window. However, transmission of the packet is
delayed
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when the counter amount has reached that maximum counter amount (viz. the
predetermined number of timeslots per time window) until the counter amount
falls
below the maximum counter amount. For a burst packet, the controller tests, by
determining whether the counter amount plus the number of packets in the burst
times
IC is equal to or greater than the ma:Kimum counter amount, whether
transmission of
the number of packets in the burst would cause the counter amount to reach the
maximum counter amount. If it would only an individual packet is transmitted
(not the
burst) and if it wouldn't the burst is transmitted. In a special case where
the duty cycle
is so low that transmission of a singlE: packet burst within one time window
would
increase the counter amount by an amount near or equal to the maximum counter
amount, the controller permits transmission of the burst packets only if the
counter
amount is zero and, if the counter amount has been zero for at least a number
of
timeslots equal to the predetermined number of timeslots per time window, the
counter
is incremented by IC or, if the counter amount has not been zero for at least
a number
of timeslots equal to the predetermined number of timeslots per time window,
the
counter is incremented by two times IC .
Preferably, the controller in combination with the instructions is configured
for
providing priority, for transmission, to a predetermined maximum number of
acknowledgement packets by permitting transmission of up to maximum number of
acknowledgement packets when the counter amount is equal to or greater than
IC/DC
times the maximum number of packets per packet burst but less than a
predetermined
maximum count.
Advantageously, the invention provides for a wireless transmission not
exceeding an established duty cycle limit based on short fixed-length windows
of time,
while permitting longer transmission times in the form of bursts in order to
improve
response times. This results in a greater range of power output, which
maximizes
transmitter's ability to maintain quality radio links while avoiding possible
detrimental
effects associated with uncontrolled radiation environments.
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Brief Description of the Drawings
A preferred embodiment of the invention is described below, by way of example
only and without intending to limit the scope of the invention claimed herein,
with
reference to the following drawings.
Figure 1 is a block diagram of the adaptive duty cycle management system
components of a digital wireless device (such as a private network mobile
radio unit or
public network wireless phone) in accordance with the invention;
Figure 2(a) is a flow chart of the steps performed by the adaptive duty cycle
management system shown in Figure 1 whereby a relatively high duty cycle, e.g.
25%,
is applied and Figure 2(b) is a flow chart showing the special case steps
performed by
the adaptive duty cycle management system whereby a relatively low duty cycle,
e.g.
2%, is applied such that transmission of a single packet burst within a number
of
timeslots equal to the predetermined number of timeslots per time window would
increase the counter amount by an amount near or equal to the maximum counter
amount;
Figures 3(a) and 3(b) are graphs showing the count pattern established by the
controller for the special case example of Figure 2(b) by which a low duty
cycle of 2% is
applied, with three full one-minute time windows being shown, wherein the
graph of
Figure 3(a) shows the situation in which a burst occurs during the second time
window
following an idle period during the first time window and the graph of Figure
3(b) shows
the special case situation in which a burst occurs during the second time
window
following the transmission of some packets during the first time window.
Detailed Description of the Preferred Embodiment
The following description is of an example of a preferred embodiment of the
invention which is provided only for purposes of illustration and without any
intention to
limit the invention to this particular example or to any particular duty cycle
limit.
In digital wireless transmission, the transmitter circuitry modulates a
carrier signal
with a digital signal comprised of date packets. The transmission of the
modulated data
packets is typically performed according one of two modes being that of
individual
CA 02347071 2001-05-10
packets or bursts of packets. Each packet comprises address, data, sender
identification and control portions and instead of being transmitted
continuously they
are stored until an individual packet, or a group of packets is ready for
transmission.
Therefore, the output power generated by the transmitter follows a pattern of
short
intervals in order to transmit bursts (being groups of packets) coupled with
relatively
long periods of quiet time (also referred to as idle time) between such short
burst
intervals. In the example of the preferred embodiment a packet burst is
defined to be
from 3 to 23 packets.
Referring to Figure 1, there is shown a block diagram of adaptive duty cycle
management system components of a digital wireless device (such as a private
network
mobile radio unit or public network wiireless phone) in accordance with the
present
invention. It is to be understood that only those components of the device
which relate
to this invention are shown and that many other components of the wireless
device are
not shown.
The wireless device10 includes a transmitter 4, a controller 6 which is a
suitable
microprocessor in the preferred embodiment, a receiver 8, and a counter 2
which is
provided by a memory component arid the microprocessor in the preferred
embodiment. Device 10 may be a mobile unit, or any transceiver used in the
industry.
The transmitter 4 and receiver 8 establish connection with the wireless
network (e.g.
cellular network) in the manner well-known to persons skilled in the art,
under control of
the controller 6. Machine readable storage 9, comprising non-volatile memory,
stores
the duty cycle management system algorithm and information and parameters
utilized
thereby including the parameters IC and DC representing the value of an
increment
count and the value of a decrement count, respectively, whereby the parameters
IC and
DC are fixed numbers for any given embodiment and used by the system in
applying
the duty cycle management method. In this embodiment a counter 2 is provided
for
use in controlling the active time of a transmitter.
The counter 2 functions in co-operation with other components of the system
shown in Figure 1 to limit the transmitter duty cycle to a selected duty cycle
(DS) which,
for one exemplary embodiment presented in the following, is selected to be 2%
in order
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CA 02347071 2001-05-10
to achieve 1.5W ERP using a 40W transmitter with a 3 dB (approximately) gain
antenna. In this embodiment the counter maintains a running count which may be
correlated to the duty cycle over onE; or more time windows and it does so by
incrementing an amount of either IC or two times IC for each timeslot in which
a packet
is transmitted and decrementing by .an amount DC for each idle timeslot, the
ratio of IC
to DC being the duty cycle limit. Thus, the duty cycle limit and the resulting
average
power output can be varied simply by changing the value of IC and/or DC so as
to
change the ratio IC/DC (which equals the duty cycle limit).
For the example of a 2% duty cycle, when the transmitter transmits in the
individual packet mode the packets ;ire sent in timeslots (alternatively
referred to as
"slots" herein) of 52ms nominal duration (which corresponds to about 1153
slots/minute), at a maximum rate of ;23 packets per minute, and the time
window (T) in
this example is considered to be 1 minute (i.e. 2% = X packets/60sec. x .052
sec/timeslot, so X=23). When operating in burst mode the transmitter transmits
a
contiguous series of 3 to 23 packets (maximum) over a time period totalling
about 1.2
seconds maximum (i.e. 23 x .052 seconds) at a transmission rate of 19,200
bits/sec.
Bursts are considered to represent a special case in this example, due to the
relatively
low duty cycle limit of 2%, and can be transmitted no more than once per
minute (this
one minute window corresponding to about 1153 slots). A further example,
applying a
relatively high duty cycle limit of 25%~, for timeslots of the same 52ms
nominal duration,
allows for a maximum of 288 packets per minute (i.e. 25% = X packets/60sec x
.052
sec/timeslot, so X=288) so many bursts of up to 23 packets may be transmitted
within
one time window of 1 minute without nearing the maximum duty cycle of 25%.
As is well-known in the art, thf: determination of when to transmit a burst is
made
when the wireless device makes a reservation request to the base station to
request
permission to send a burst and the base station grants such reservation
request.
Figures 2(a) and 2(b) are flowcharts showing the steps performed by the duty
cycle management system which utilizes the controller 6, the counter 2 and
memory 9.
These flowcharts each represent a rE:petitive algorithm which is repeated for
each time
slot and this algorithm is implemented in one or more computer programs which
are
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CA 02347071 2001-05-10
executable by the controller 6 (microprocessor). Figure 2(a) shows the normal
steps of
the algorithm to be used for individual packet and burst packet transmission
when a
relatively high duty cycle limit is applied (e.g. 25%) and Figure 2(b) shows
the special
case steps of the algorithm to be usE;d for individual packet and burst packet
transmission when a relatively small duty cycle limit is applied (e.g. 2%).
For a selected
duty cycle of 25% in this illustrated e:Kample a firmware counter 2 increments
by the
increment count (IC) amount of 4 upon each individual packet transmission and
decrements by the decrement count (DC) amount of 1 upon each idle (receive)
slot (i.e.
1/4 equals 25%) whereas for a duty cycle of 2% the counter 2 is incremented by
50 (i.e.
IC=50) upon each individual packet transmission and decremented by 1 (i.e.
DC=1 )
upon each idle (receive) slot (i.e. 1/5t) equals 2%). When the counter 2
exceeds a
maximum counter amount equal to the predetermined number of timeslots per time
window, being 1153 for these examples, the system halts any further
transmissions
because this means that, at this point in time, a ratio of 4 to 1 packets
(representing a
duty cycle of 25%) or 50 to 1 packets (representing a duty cycle of 2%) have
been
transmitted over the preceding window time period T.
For the example of a 25% duty cycle limit a single packet burst of the maximum
23 packets will only increment the counter 2 by 92 counts (i.e. 4 x 23), which
is far
below the maximum count amount of 1153, so several bursts may be transmitted
within
one time window without pushing the counter amount close to the maximum count
threshold. However, for the low duty cycle limit example of 2% a single packet
burst
can, if it consists of 23 packets, use uip essentially all of the permissible
time slots for a
given time window. Consequently, for this special case example a packet burst
may
only be sent when the value of the counter 2 is zero. From a time line
perspective this
means that a 1.2 sec maximum-length burst transmission (i.e. 52ms x 23 = 1.2
sec)
leaves the counter 2 at its maximum value of 1150 for that increment level
(IC) and this
inhibits any further burst transmissions for the next period of 59.8 seconds
calculated
on the basis of 1150 x 52 ms. This rE:presents the worst-case duty cycle limit
of 2%
and results in a calculated duty cycle value of 1.96% over the period of those
1150
timeslots which satisfies this duty cycle limitation of 2% (i.e. 1.2 sec
divided by (59.8
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CA 02347071 2001-05-10
sec + 1.2 sec = 1.2/61 = 1.96%).
As shown by Figure 2, the special case algorithm of the duty cycle management
system (i.e. the situation in which a single packet burst would render the
counter close
to the maximum counter amount witlhin a single time window) is performed on an
adaptive basis whereby one of two rnethods (algorithms), A or B, is selected
and
performed for the transmission of bursts and the selection of which algorithm
is
performed impacts upon the performance of the system in relation to the
communications network. Figures 3(a) and 3(b) illustrate, graphically, the
results of
performing methods A and B, respectively, for a duty cycle limit of 2%. The
steps of
method A are performed when there have been no transmissions at all (i.e. no
burst
and no individual packet) for a number of timeslots equal to the predetermined
number
of timeslots per time window prior to the pending burst (i.e. the counter
value is zero
and there must have been no increment to the counter during the immediately
preceding time window). This limits 'the duty cycle of bursts plus individual
packets to
2% over any double window period (i.e. any period of 2 minutes in this
example).
Application of this method will occur in networks where a burst is typically
the first of a
series of transmissions, and may be followed by a small number of individual
packets
such as an application-level acknowledgement packet (alternatively referred to
herein
as an 'ACK' packet, being a type of packet used to acknowledge receipt of an
incoming
message). For purposes of network efficiency it is desirable to avoid delays
in
transmitting "ACK" packets as this may cause an unnecessary re-transmission of
the
message and, thus, an "ACK" priority feature, as detailed more fully below,
may be
used in combination with duty cycle algorithm of the invention in order to
enhance the
overall network performance.
The steps of method B are performed when the value of the counter is zero but
the counter has been incremented during the immediately preceding window i.e
where
some individual packets have been sent during that window. For this method the
counter is incremented by 2 times the value of IC (i.e. by 100 in the
foregoing example
applying a 2% duty cycle limit) for each packet in a burst. Following the
transmission of
the burst in this example the value of the counter is 2300 (calculated on the
basis of
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CA 02347071 2001-05-10
100 times 23 packets) and this means that following a maximum-length burst all
transmissions will be halted for one time window (i.e. 1 minute in this
example) and any
further burst will be halted for two time windows (i.e. 2 minutes in this
example).
Application of this method will occur in networks where a burst typically ends
a series of
exchanges.
These two alternate burst-mode methods (A and B) are selected adaptively to
yield best performance by using the following algorithm (this is also
illustrated by Figure
2):
IF
there have no transmis:;ions during the preceding window
THEN
debit burst packets at 1x IC each (IC= 50 in the example)
(It is necessary to exclude the reservation-request packet, or make the
debit-rate decision at reservation-request time and not at burst transmit
time or the above case will never be true.)
ELSE
debit burst packets at 2:~c IC each (IC=50 in the example)
By performing the steps of this algorithm the system automatically allows
individual packets to follow a burst at 1 packet per 2.6 seconds if the
transmitter was
idle for the minute before the burst and if the transmitter was not idle for
the minute
before the burst it defers all post-burst transmissions for 1 minute and
prevents
additional bursts for 2 minutes.
When the counter 2 is non-zero but still below the maximum counter amount
only individual packet transmissions are allowed. Each packet transmission
increments
the counter by 50, limiting the sum of individual packets to the same 2% duty
cycle as
burst transmissions.
The pre-burst zero-count limitation prevents a burst from following individual
packets and exceeding the 2% duty cycle. Following a burst transmission,
individual
packets can be sent only if the original burst was shorter than the full 23-
packet
CA 02347071 2001-05-10
maximum, or if sufficient time has elapsed to decrement the counter
sufficiently to
enable an amount IC to be added wiithout going over the maximum counter
amount.
These limitations maintain the duty cycle, defined by the ratio of
(burst+packet) to
(burst+idle+packet), to 2% or less. In other terms, these limitations impose a
maximum
transmission rate of one individual packet per 2.6 seconds (52ms/2600ms=2%) or
groups (not bursts) of 2-3 individual packets at shorter intervals only if
surrounded by
longer periods of idle.
At data rates below 19,200 bits/sec, the slot duration may differ from the
averaged value of 52 msec used for this example but, because the duty-cycle
management method counts slots at the rate of IC for each transmitted packet
(i.e 50 x
tx) minus DC for each idle slot (i.e. 1 x rx), it automatically scales for
other slot durations
while still enforcing the selected duty cycle (being 2% in this example). For
example, if
the averaged slot duration were to bE: 112 ms the maximum burst duration would
be
2.576 seconds (i.e. 23 packets times. 112 ms) and this would be followed by
128.8
seconds of idle (i.e. if 1150 idle slots are used for a calculation of the
remainder of the
time window whereby 1150 x 112 m:; = 128.8). Therefore, the resulting average
duty
cycle over the calculated timeslots would be the same as that shown above for
the
situation in which the averaged slot cluration was 52 ms: 2.576 s / (2.576 s +
128.8 s) _
1.96%.
Optionally, a provision for acknowledgement (ACK) priority may be implemented
in combination with the duty cycle management method of the invention, it
being
recognized that ACK packets are always short individual transmissions and
never
bursts. This option may be used to address a need to avoid the situation in
which the
wireless communication device, having reached its duty-cycle limit, will be
unable to
acknowledge receipt of an incoming message, one overall network performance
objective being to allow for the transmission of acknowledgments in a timely
fashion so
as to prevent unnecessary re-transmissions from the base station and maintain
network
throughput. Accordingly, in one prefE:rred embodiment of the invention an ACK
priority
exception is implemented in combination with the foregoing duty cycle
management
algorithm. This exception algorithm i configured to permit the transmission of
an ACK
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CA 02347071 2001-05-10
packet (if required) following the transmission of a packet. This anticipates
that an
inbound (from mobile to base) transrnission may contain a query which will
generate an
outbound (from host to mobile) response. Unlike the duty-cycle management
method,
this permitted priority-ACK limit is not cumulative but is instead a fixed
(configurable)
maximum number of ACKs which can follow a data transmission.
The acknowledgment transmissions are counted (debited) as normal
transmissions by the duty-cycle calculation and will further delay other data
transmissions as required to respect the duty cycle limit.
To respect the duty-cycle limit, only a small number (typically one) of ACKs
can
follow a data transmission. This provides a two-stage limit (or a 'soft
threshold') for the
duty-cycle; a first level after which a unit will not transmit further data
but may send an
ACK, and a second limit (i.e. a predetermined priority maximum count), shortly
beyond,
after which the unit will not make any further transmissions. Alternatively,
the system
could apply a lower maximum threshold (e.g. slightly less than 1150) for the
transmission of data packets and a higher one (i.e. greater than 1150) for
ACKs.
For the foregoing example, providing for a 2% duty cycle limit, the ACK
priority
feature utilizes the fact that the maximum counter amount of 1150 is less, by
about 3
timeslots (actually 3.8 timeslots in that there are actually 60 sec / 52 msec
= 1153.8
slots in one minute), than the actual number of timeslots in one time window
of one
minute. The'priority' mechanism operates so as to assure that the full maximum
number of timeslots is not consumed by data such that there remains some
'headroom'
for the priority-acknowledgement packets. In other words, data is throttled at
1150
timeslots, but an acknowledgement packet would be permitted to be transmitted
up to a
maximum point of the 1152 or 1153 timeslot so as to allow an ACK packet to be
sent
even if data cannot be sent pursuant to the governing duty cycle management
algorithm.
The individual circuit and processing functions utilised in the foregoing
described
preferred embodiment are, individually, well understood by those skilled in
the art, and it
is to be understood by the reader that a variety of other implementations may
be
devised by skilled persons for substitution. Further, it should be noted that
although the
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CA 02347071 2001-05-10
some of the system components described herein are stated to be implemented by
firmware in the preferred embodiment a person skilled in the art will
recognize that it
may be preferred for another application to implement such components in
hardware.
Persons skilled in the field of communication design will be readily able to
apply the
present invention to an appropriate implementation method for a given
application.
Consequently, it is to be understood that the particular embodiment shown and
described herein by way of illustration is not intended to limit the scope of
the invention
claimed by the inventor which is defined by the appended claims.
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