Note : Les descriptions sont présentées dans la langue officielle dans laquelle elles ont été soumises.
CA 02430671 2003-05-30
44783 PATENT
HI S 80-97
Patent Application
for
APPARATUS AND METHOD FOR INCREASING OPTICAL DENSITY
OF SONET MULTIPLEXER USING INTEGRAL COMPONENTS
by
Bruce Lipski
Gary Miller
and
David Corp
Cross Reference To Related Applications:
[0001] Related subject matter is disclosed in co-pending U.S. patent
application o:f
Bruce Lipski et al., filed even date herewith, entitled "SONET Multiplexes
Having Front Panel
Access to Electrical and Optical Connectors and Method for Using Same"
(Attorney's File
44784); in co-pending U.S. patent application of Bruce Lipski et al., filed
even date herewith,
entitled "Compact Enclosure for Interchangeable SONET Multiplexes Cards and
Method for
Using Same" (Attorney's File 44785); and in co-pending U.S. patent application
of Bruce
Lipski et al., filed even date herewith, entitled "Apparatus And Method For
Automatic
Provisioning of SONET Multiplexes" (Attorney's File 44786); the entire
contents of each of
these applications being expressly incorporated herein by reference.
Field of the Invention:
[0002] The present invention relates to an apparatus and method for increasing
thc;
optical density of a SONET multiplexes using integral components, as opposed
to having to
use additional circuit packs for optical redundancy. More specifically, the
present invention
relates to a method and apparatus for providing a SONET multiplexes with
integral switch
protection components for optical redundancy.
CA 02430671 2003-05-30
Background of the Invention:
[0003] As the demand for high bandwidth, high bit rate communications increase
s
(e.g., to accommodate multimedia applications, in particular), fiber optics
technology is rapidly
advancing to supply the capacity. SONET (i.e., Synchronous Optical Network) is
the
communication hierarchy that has been specified by the American National
Standards Institute
(ANSI) as a standard for a high-speed digital hierarchy for optical fiber.
SONET defines
optical carrier (OC) levels and electrically equivalent synchronous transport
signals (STSs) for
the fiber-optic based transmission hierarchy. The SONET standard is described
in more detail
in ANS T1.105 and TI.106, and in Bellcore Telecordia Generic Requirements RG-
253-CORE
and GR-499, which are incorporated herein by reference.
[0004] Before SONET, fiber optic systems in the public telephone network used
proprietary architectures, equipment, line codes, multiplexing formats and
maintenance
procedures. The users of this equipment (e.g., Regional Bell Operating
Companies and viter-
exchange Garners (IXCs) in the United States, Canada, Korea, and Taiwan, among
other
countries) desired standards such as SONET so they could employ equipment from
different
suppliers without experiencing incompatibility problems.
[0005] SONET defines a technology for carrying many signals of different
capacities
through a synchronous, flexible, optical hierarchy using a byte-interleaved
multiplexing
scheme to simplify multiplexing and provide end-to-end network management. The
base
signal in SONET is a Synchronous Transport Signal level-1 (STS-1) which
operates at S 1.84
Megabits per second (Mbps). Higher-level SONET signals are summarized in the
follov~~ing
table:
Table 1: SONET Hierarchy
Signal Bit Rate Capacity
STS-1, OC-1 51.840 Mb/s 28 DSIs or 1 DS3
STS-3, OC-3 155.520 Mb/s 84 DSIs or 3 DS3s
STS-12, OC-12 622.080 Mb/s 336 DSIs or 12 DS3s
STS-48, OC-48 2488.320 Mb/s 1344 DSls or 48 DS3s
STS-192, OC-192 9953.280 Mb/s 5376 DSIs or 192 DS3s
STS-768, OC-768 39813.12 Mb/s 21504 DSIs or 768 DS3s
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[0006] Thus, each SONET STS-N electrical signal has a corresponding OC-N
optical signal. The OC-N signals are created by converting the STS-N
electrical signal to
an optical signal. The SONET standard establishes a multiplexing format for
using any
number of 51.84 Mbps signals as building blocks. For example, an OC-3 (Optical
Carrier,
Level 3) is a 155.52 Mbps signal (i.e., 3 times 51.84 Mbps), and its
electrical signal
counterpart is referred to as an STS-3 signal. The STS-1 signal carries a DS3
signal or a
number of DS 1 or other lower level signals. A SONET STS-3 signal is created
by
concatenating STS-1 signals.
[000?] Telecommunication equipment at central offices (COs), remote terminals
(RTs), wireless communication cell sites and other equipment locations is
frequently
deployed as one or more bays with multiple shelves, wherein each shelf is
configured to
receive a plurality of communications cards. A backplane is provided in each
bay for
communication between its cards and shelves, as well as for interbay
communication. One
of the more common types of equipment to be found at these equipment sites is
SONET
multiplex equipment which takes lower-rate (tributary) signals, such as DSI
(1.5 Mbps),
DS3 (45 Mbps), OC-1 (51.84 Mbps), or OC-3 (155.52 Mbps), and time division
multiplexes them into a higher-rate signal such as OC-3 or OC-12 (622.08
Mbps). The
SONET multiplex equipment also performs the corresponding demultiplex function
of
recovering the lower rate tributary signals from an incoming higher-rate
signal.
[0008] Telecommunications companies are eager to provide as much performance
as possible from their existing infrastructure. Their telecommunications
systems are
primarily based on the DS 1 electrical signal hierarchy that uses DSO data. A
DS 1 signal is
comprised of 24 multiplexed DSO voice channels. To provide capacity that meets
the
afore-mentioned demand for more bandwidth and high bit rates,
telecommunications
companies need equipment that is based on a higher data rate such as DS3 in
which DS 1
signals are the base signal for data channel multiplexing, as opposed to DSO
signals.
[0009] Problems with existing equipment managing DS3 traffic, however, are
numerous. For example, DS3 hierarchy-based equipment requires more bay and
shelf
space in CO, RT, cell sites and other locations where equipment space is
already a limited
commodity, where bays and shelves are already crowded (e.g., many shelf card
slots are
filled with a card), and where room to add equipment with new features is very
limited or
essentially nonexistent.
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[00010] In addition, previous generations of SONET and asynchronous multiplex
equipment have dedicated fixed portions of an equipment shelf to different
types/rates of
services. For example, separate portions of the shelf are typically reserved
for DS 1, DS3,
and OC3 interface units. Dedicating specific portions of the shelf to specific
service types
reduces the flexibility of the shelf, and typically leaves wasted shelf space
for any given
application.
[00011] Also, access to the optical connectors on existing multiplexes cards
is typically
on the front of a card, while access to the electrical connectors is on the
back of the shelf. In
equipment locations were space is limited, it can be difficult for human
operators to gain access
to the backs of card slots in a shelf of an equipment bay. A need therefore
exists for SONET
multiplexes equipment having a reduced form factor, with nondedicated card
slots, and with
front panel access to both electrical connectors and optical connectors.
(00012] To illustrate these disadvantages of existing SONET multiplex
equipment,
reference will now be made to Fig. 1 which illustrates a Fujitsu SONET
multiplexes 10
(i.e., model FLM-150). The Fujitsu Multiplexes 10 requires an entire shelf in
a
communications bay and dedicated card slots. For example, several cards are
needed. for
DS1 to DS3 multiplexing, several cards are needed for DS3 to OC3 processing,
and s;o on.
Thus, a need exists for a SONET multiplexes having at least standard
functionality, yet
requiring less equipment space.
[00013] The Fujitsu Multiplexes 10 is not easily set up or provisioned. The
Fujitsu
Multiplexes 10 is designed to be everything to everyone in the optical
communications
environment. Since it is not designed to be compatible with any one particular
system, it
provides hundreds of choices to the user and must be substantially configured
by a user
operating a provisioning application on a computer (e.g., a personal computer
or PC)
before it can even run data through it. The installation, set up and
provisioning manual for
the Fujitsu Multiplexes 10 is long and considerable training is needed for the
user to be
able to configure and operate the unit. Further, after such a lengthy and
involved
configuration phase, the unit may not be subsequently reprovisioned to
accommodate a
change in the configured data paths. This aspect of the Fujitsu Multiplexes 10
renders its
use very cumbersome. Thus, a need exists for SONET multiplexing equipment that
requires minimal set up and provisioning, and minimal or no user training.
Further, a need
exists for SONET multiplexing equipment that does not require connecting the
equipment
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CA 02430671 2003-05-30
to a computer for provisioning, and that automates much of the provisioning
process to
simplify it for the user. In addition, a need exists for SONET multiplexing
equipment that
simplifies provisioning to allow reconfiguration of the equipment for flexible
use.
(00014] Also, to use the Fujitsu Multiplexer 10 in different applications such
as a
drop or drop and continue (e.g., ring) application requires more units, which
increases
cost, and requires more set up and provisioning. A need exists for a SONET
multiple;xer
that can be deployed in different applications with greater functionality,
little or no
provisioning, and a minimal number of units to minimize cost and malfunctions
due, for
example, to failed electronics. For example, if four Fujitsu Multiplexers
units were to be
deployed in a ring configuration, such as that depicted in Fig. 5 and
described below, three
of the Fujitsu Multiplexers would require substantial provisioning to instruct
each of these
units regarding which data paths are being dropped and continued and how to
cross-
connect at each node, as well as alarm conditions, among other configuration
data. Thus, a
need exists for SONET multiplexing equipment that simplifies provisioning to
allow
configuration of the equipment for flexible use in different applications.
(00015] Providing redundancy of optical paths can present a problem where
thE;re is
limited equipment space since additional circuit packs are used in
conventional SONET
multiplexers. Reference is now made to Fig. 2, which depicts another existing
SONET
multiplexer that is available from Adtran, Inc. The Adtran SONET multiplexer
is the
Total Access OPTI-3 model which converts OC3 to three DS3s and consists of a
raclc-
mounted shelf device.
(00016] SONET multiplexers generally provide redundancy of data paths to
enable
continued transmission of data after an optical path failure. With continued
reference to
Fig. 2, a conventional SONET system 12 employs plural multiplexers 20, 21' and
22,, 22'
at each of the nodes 14 and 16, respectively. A path 18 is selected as the
primary path and
a secondary path 18, is used in the event of primary path failure. In a l :n
redundancy
system, wherein n is an integer, n paths are available and n-1 paths are used
with the.
remaining path being a spare. A l :n system requires communication between the
multiplexers to establish which paths) are in use and which paths) are
reserved for use
following a path failure. In a 1+1 redundancy system, the path is selected
based on
whichever of the two paths is working and no communication between the
multiplexers
regarding the selected redundant path is required.
CA 02430671 2003-05-30
[00017] Configuring a SONET system with redundancy using the Adtran
multiplexes
requires at least four multiplexers 20, 20', 22, 22' (i.e., two per node for
two optical paths
between the nodes). This redundant configuration is disadvantageous over a
system
having only a single optical path between two multiplexers, and therefore no
redundmcy,
because it requires twice the equipment space and twice the cost for the extra
two
multiplexers. Further, the redundant system is less reliable in terms of the
increased
likelihood for electronics failure or equipment failure from heat, for
example, due to the
additional multiplexes electronics. A need exists for a SONET multiplexes that
provides
redundancy while minimizing equipment space and cost and maximizing
reliability.
Summary of the Invention:
[00018] The above-described disadvantages of conventional SONET multiplexers
are
overcome and a number of advantages are realized by the present invention. The
present
invention provides a compact SONET multiplexes with integral switch protection
to obviate
the need for multiple circuit packs at nodes requiring redundant optical links
therebetween.
[00019] In accordance with the present invention, a SONET multiplexes
comprises: ( 1 ) a
first OC3 port operable to receive and transmit optical signals; (2) a second
OC3 port operable
to receive and transmit optical signals; (3) at least one DS3 port operable to
receive and
transmit electrical signals; (4) a first optical interface to receive an
optical signal via the first
OC3 port and convert it into an electrical signal; (5) a second optical
interface to receive an
optical signal via the second OC3 port and convert it into an electrical
signal; (6) a SONI=~,T
synchronizer operable to evaluate bits in the electrical signal received from
either of the first
optical interface and the second optical interface and detect at least one of
a plurality of
SONET conditions comprising loss of signal, loss of fume and out of frame; (7)
a SONE,T
overhead terminator configured to locate SONET flames in the electrical signal
received from
the optical interface and extract selected overhead bytes in the SONET frames;
(8) a mapper
operable to use data from the electrical signal received from the optical
interface and the
selected overhead bytes to generate a plurality of DS3 streams; (9) a line
interface unit oI>erable
to convert the DS3 streams into respective analog signals for transmission
from the at least one
DS3 port, the line interface unit being operable to receive analog signals via
the at least one
DS3 port and convert them to corresponding digital signals, the mapper being
operable to
format the digital signals as a SONET stream, the SONET overhead terminator
being operable
6
CA 02430671 2003-05-30
to append selected overhead bytes to the SONET stream, and the SONET
synchronizer being
operable to prepare the SONET stream for transmission via a selected one of
the first optical
interface and the second optical interface and the corresponding one of the
first OC3 port and
the second port; and ( 10) a processing device operable in conjunction with
the mapper, thc:
SONET overhead terminator, the SONET synchronizer, the first optical interface
and the
second optical interface to perform switch protection using the first OC3 port
and the second
OC3 port, respectively, as one of a primary circuit and a protection circuit.
[00020] In accordance with another aspect of the present invention, the SONET
synchronizer is operable to monitor respective electrical signals received via
the first OC3 port
and the second OC3 port for alarm conditions. The processing device is
operable in response
to alarm conditions indicated by the SONET synchronizer to automatically
switch operation
from one of the first OC3 port and the second OC3 port to the other, depending
on which of the
first OC3 port and the second OC3 port was operating as the primary path.
[00021] In accordance with yet another aspect of the present invention, the
SONET
multiplexes is operable to automatically switch between the first OC3 port and
the second OC3
port for switch protection without being provisioned to do so.
[00022] In accordance with still yet another aspect of the present invention,
the SONE'.C
multiplexes is deployed as a single card dimensioned for deployment in a
single card slot in a
shelf of a telecommunications bay. The single card is preferably implemented
using Type 400
mechanics. Further, the first OC3 port and the second OC3 port are integral
components of the
single card.
[00023] In accordance with another aspect of the present invention, the
processing
device is a field programmable array device to facilitate configuration of the
SONET
multiplexes as a card dimensioned for deployment in a single card slot in a
shelf of a
telecommunications bay.
[00024] In accordance with the present invention, a method of switch
protection in a
SONET multiplexes is provided which comprises the steps of: (1) providing a
SONET
multiplexes with an integral first optical path and corresponding first OC3
port and an integral
second optical path circuit and a corresponding second OC2 port; (2) operating
one of the; first
optical path and the second optical path as a primary circuit and the other of
the first optical
path and the second optical path as a protection circuit; (3) monitoring
signals received visa the
first OC3 port and the second OC3 port for alarm conditions; and (4)
automatically switching
7
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operation from one of the first optical path and the second optical path to
the other, depending
on which of the first optical path and the second optical path was operating
as the primary
circuit, in response to selected alarm conditions detected via the monitoring.
(00025) In accordance with an aspect of the present invention, the monitoring
step
comprises the step of monitoring Automatic Protection Switching bytes in the
Line Overhead
of a SONET frame received via one of the first OC3 port and the second OC3
port.
(00026] In accordance with another aspect of the present invention, the
monitoring step
comprises the step of integrating at least one alarm generated by the SONET
multiplexes in
response to one of the alarm conditions to determine if it is momentary or
continuous, the; step
of automatically switching being performed if the one of the alarm conditions
is continuous.
(00027] In accordance with the present invention, a method of switch
protection in a
SONET multiplexes is provided wherein a first SONET multiplexes and second
SONET
multiplexes are provided at respective nodes. The nodes have a first fiber
optic link and a
second fiber optic link connected therebetween. Each of the first SONET
multiplexes and
second SONET multiplexes has an integral first optical path and corresponding
first OC3 port
connected to the first fiber optic link and an integral second optical path
circuit and a
corresponding second OC2 port connected to the second fiber optic link. One of
the first
optical path and the second optical path in each of the first SONET
multiplexes and second
SONET multiplexes is operated as a primary circuit, and the other of the first
optical path and
the second optical path in each of the first SONET multiplexes and second
SONET multi:plexer
is operated as a protection circuit. Signals received via the first OC3 port
and the second ~OC3
port in each of the first SONET multiplexes and second SONET multiplexes are
monitorc;d for
alarm conditions. Automatically switching operation from one of the first
optical path arid the
second optical path to the other in each of the first SONET multiplexes and
second SONI?T
multiplexes is performed, depending on which of the first optical path and the
second optical
path was operating as the primary circuit, in response to selected alarm
conditions detect~xi via
the monitoring.
(00028] In accordance with fiwther aspects of the present invention, the first
SONET
multiplexes and second SONET multiplexes are each deployed as a single card
dimensioned
for deployment in a single card slot in a shelf of a telecommunications bay.
The single cards
preferably employ Type 400 mechanics.
8
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Brief Description of the Drawings:
[00029] These and other objects, advantages and novel features of the present
invention will
be readily appreciated from the following detailed description when read in
conjunction with
the, accompanying drawings, in which:
[00030] Fig. 1 depicts a conventional SONET multiplexes;
[00031] Fig. 2 depicts conventional SONET multiplexers configured for optical
redundancy;
[00032] Fig. 3A is a perspective view of an 03-3D3 multiplexes comprising a
face platE:, a
main board and an upper board and constructed in accordance with an embodiment
of the
Present invention;
[00033] Fig. 3B is a top component view of the main board of the 03-3D3
multiplexes
depicted in Fig. 3A;
(00034] Fig. 3C is a top component view of the upper board of the 03-3D3
multiplexes
depicted in Fig. 3A;
[00035] Fig. 4 is a front view of the face plate of the 03-3D3 depicted in
Fig. 3A;
[00036] Fig. 5 is a block diagram of a plurality of 03-3D3 multiplexers
connected in a .drop
and continue ring application in accordance with an embodiment of the present
invention;
[0003?] Fig. 6 is a block diagram of a plurality of 03-3D3 multiplexers
connected in a
point-to-point application in accordance with an embodiment of the present
invention;
[00038] Fig. 7 is a block diagram of a plurality of 03-3D3 multiplexers
connected in an
application that provides six DS3s over two optical fibers using WDM couplers
in accordtmce
with an embodiment of the present invention;
[00039] Fig. 8 is a partial top view of the main board in the 03-3D3
multiplexes depicted in
Fig. 3C having switches for loopback options;
[00040] Fig. 9 is a block diagram of an 03-3D3 multiplexes constructed in
accordance with
an embodiment of the present invention;
[00041] Fig. 10 is a front view of an 03-3D3 multiplexes backplane connector
constructed
in accordance with an embodiment of the present invention;
(00042] Figs. 11 A, 11 B and 11 C are block diagrams of hardware components,
including a
field programmable gate array (FPGA), for an 03-3D3 multiplexes constructed in
accordance
with an embodiment of the present invention;
9
CA 02430671 2003-05-30
(00043] Fig. 12 is a block diagram depicting an add/drop bus signal processing
function
associated with the FPGA and other components depicted in Figs. 11A-C;
(00044] Figs. 13 is a block diagram depicting an FEAC code detector and DS3
(n) TX
MIJX/loopback control function associated with the FPGA and other components
depicted in
Figs. 11A-C; and
(00045] Fig. 14 is a block diagram depicting DS3 alarm processing and alarm
relay/front
panel LED control functions associated with the FPGA and other components
depicted in Figs.
11 A-C.
(00046] Throughout the drawing figures, like reference numerals will be
understood to refer
to like parts and components.
Detailed Description of the Preferred Embodiments:
(0004] In accordance with an embodiment of the present invention, a SONET
multipl',exer
50 that provides OC3 to DS3 multiplexing and has a form factor that is
substantially
reduced with respect to existing multiple shelf and/or multiple card units is
shown in :Figs.
3A, 3B, 3C and 4. The multiplexer (MUX) 50 of the present invention shall
hereinafter be
referred to as an 03-3D3 MUX 50.
(00048] The 03-3D3 MUX 50 is designed to derive three DS3 circuits from an OC3
synchronous optical network (SONET) 1550 nm or 1310 nm optical facility. As
shown in
Figs. 3A, 3B and 3C, the 03-3D3 MUX 50 is configured as a card that can be
inserted in a
telecommunications equipment bay and requires only a single card slot due to
its standard
Type 400 mechanics circuit board arrangement. A front view of the face plate
56, including
connectors, indicators (e.g., LEDs) and switches, is provided in Fig. 4 and
described in more
detail below. The face plate 56 in Fig. 4 is mounted to two circuit boards 52
and 54, as shown
in Fig. 3A. The main or lower circuit board 52 shown in Fig. 3B comprises a
field
programmable gate array (FPGA) U16 indicated at 96, two SONET synchronizers U8
and U12
indicated at 131 and 132, respectively, a SONET overhead terminator U7
indicated at 98,
switches 118 and 120 described below in connection with Fig. 8, an optical
transceiver U11
indicated at 90 for optical port 64, and an optical transceiver U 15 indicated
at 90' for optional
optical port 64. The main or lower circuit board 52 also comprises LEDs 68, 70
and 72
described below in connection with Fig. 4. The upper board 54 shown in Fig. 3C
comprises a
CA 02430671 2003-05-30
mapper US indicated at 100, a Triple DS3 Line Interface Unit U4 indicated at
102, a DS3 fitter
attenuator U8 indicated at 135, and the DS3 ports 58, 60 and 62. The upper
board 54 also
comprises LEDs 74, 76 and 78 and switches 106, 108, 110, 112, 114 and 116
described below
in connection with Fig. 4. Additional components such as heat sinks, the
connector between
the boards 52 and 54, the MUX 50 card connector, and other circuits that
support the operation
of the boards 52 and 54 are provided on the boards 52 and 54. The mechanical
aspects of the
03-3D3 MUX SO are described in more detail in the above-mentioned
corresponding
application Serial Nos. (Attorney's Files 44784 and 44785) filed concurrently
herewith.
[00049] With reference to Fig. 4, the 03-3D3 MUX 50 is provided with a number
of
advantageous features such as three DS3 ports 58, 60 and 62, one OC3 port 64,
and an
optional second OC3 port 66 for fiber protection switching. The 03-3D3 MUX 50
has
standard DS3 75-ohm BNC connections for the DS3 ports 58, 60 and 62 and
standard fiber
SC interface connectors for the OC3 ports 64 and 66.
(00050] The 03-3D3 MUX 50 is configured with a drop-and-continue ring
capability
with or without protection switching that is substantially easier to use and
less costly khan
existing multiplexers such as those described above. Whereas existing mufti-
shelf and/or
mufti-card multiplexers require substantial configuration and provisioning to
achieve
merely an operable data path, the 03-3D3 MUX 50 provides exceptionally simple
plu,g-
and-play installation and use in various applications, as will be described in
further detail
below. The 03-3D3 MUX 50 uses standard Type 400 mechanics to permit
installation in
inexpensive wall, shelf, or self contained housings within central office
(CO), digital hoop
carrier (DLC), or remote terminal (RT) facilities or customer-premises
equipment (CPE).
The 03-3D3 MUX is also climate-hardened for unrestricted deployment in outside
plant
(OSP) cabinets.
(00051] The 03-3D3 MUX 50 is provided with 1310 nm or 1550 nm optics that can
be
used with Wave Division Multiplexing (WDM) couplers (e.g., such as those
described in
the afore-mentioned, co-pending application Serial Nos. (Attorney's Files
44784 and
44785). The 03-3D3 MUX 50 has either medium-range optics to economically
support
fiber facilities of up to 40 kilometers, or long-range optics to support
extended range (ER)
applications up to 80 kilometers, as described below.
[00052] The 03-3D3 MUX SO employs comprehensive and continuous monitoring ~of
the optical signals for local and remote loss of frame, loss of signal, out of
frame, loss of
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CA 02430671 2003-05-30
pattern, loss of pointer, optical degradation, blown fuse, unit failure, and
loss of powE:r
with universal contact closure alarm reporting. The 03-3D3 MUX is also
provided with a
remote alarm indication signal and loopback capability for comprehensive
network and
maintenance monitoring. The front panel 56 of the 03-3D3 MUX 50 is provided
OC3
status LEDs 68 and 70, DS3 status LEDs 74, 76 and 78 and a UNIT status LED 72.
7f'he
03-3D3 MUX 50 also allows fiber-to-fiber operation with traditional OC3 SONET
multiplexers.
[00053] As stated previously, the 03-3D3 MUX SO provides exceptionally simple
plug-
and-play installation and use in various applications. Figs. 5, 6 and 7
illustrate,
respectively, three exemplary 03-3D3 applications. Fig. 5 illustrates a drop-
and-continue
ring. Fig. 6 depicts a point-to-point application. Fig. 7 illustrates
transport of six DS3s
over two fibers using a pair of 03-3D3s MUX 50 mounted in a 1.75" high, 19" or
23'''
wide rack assembly 80, 82, and WDM couplers 84 and 86. As described in the
afore-
mentioned, co-pending application Serial Nos. (Attorney's Files 44784 and
44785), tlae
WDMs 84 and 86 also employ Type 400 mechanics and can be mounted in a compact:
enclosure along with the 03-3D3 MUX 50 or other card combinations.
[00054] A functional description of the 03-3D3 MUX 50 will now be provided
with
reference to Fig. 9. The components in Fig. 9 will first be described,
followed by a more
detailed discussion of the processing performed in the receive path and the
transmit path.
The components in Fig. 9 are all provided on one of the boards 52 and 54 of
the single-
card slot configuration of the 03-3D3 MUX 50 described above in connection
with Figs.
3A through 3C.
(00055] With reference to Fig. 9, an optical signal is converted to an
electrical format by
an optical transceiver 90. A clock data recovery unit (CDRU) 92 is operable to
obtain the:
receive clock frequency and receive path optical rate to separate the clock
and data and provide
the data to an optical line interface unit (LIU) 94.
[00056] The output of the transceiver 90 must be processed to determine the
boundaries
between each bit. This processing is performed by a SONET synchronizer 131 on
the lower
main board 52 of the OC3-3DS2 MUX 50 depicted in Figs. 3A-C. The data is
accepted by
a SONET overhead terminator 98 which finds the start of each 125 microsecond
frame and
extracts certain bytes called overhead. Overhead is data in the SONET stream
which is not the
customer's data. It is additional data used to perform administrative
functions such as switch
12
CA 02430671 2003-05-30
to protect operations. The SONET overhead terminator 98 uses a pointer
mechanism to locate
the bytes within the SONET stream which are customer data.
[00057] As stated above, the SONET MLTX 50 of the present invention can be
provided with
an optional second OC3 port 66 which can be used to provide protection
switching. The optical
transceiver 90', CDRU 92', and optical line interface unit 94' that support
the second OC~4 port
66 are indicated in Fig. 9 in phantom lines. These devices operate with
respect to the second
OC3 feed 66 in the same manner as stated above in connection with the primary
optical
transceiver 90, CDRU 92, and optical line interface unit 94 and the primary
OC3 feed 64.
[00058] The pointer and the customer data are handed to a mapper 100 where it
is divided
into three DS3 streams. If the output data from the mapper 100 contains
fitter, that is, the data
was presented at slightly irregular time intervals, the fitter attenuator as
illustrated in Fig. :l 1B
corrects the problem. The triple DS3 LIU 102 converts three streams of digital
data into tb~ree
standard analog interfaces.
[00059] Each component in Fig. 9 is bi-directional. The DS3 LIU 102 accepts
three analog
signals and converts them to digital format. The mapper 100 accepts the three
digital stre~uns
and converts them to a single digital stream in the SONET format. T'he SONET
overhead
terminator 98 appends the overhead data to the data received from the mapper
100. Each
SONET synchronizer 131, 132 (Fig. 1 lA) provides the appropriate drive to the
corresponding
optical transceivers 90, 90' (Fig. 9).
[00060] With reference to the receive path, optical data is received at the
OC3
transceiver 90 as either a 1310 nm or a 1550 nm wave-length. The optical
signal is
converted to an electrical differential signal. A clock and serial data are
recovered. The
recovered clock is phase-aligned with recovered serial data.
[00061] Optical signal synchronization is established when the Framer has
located and
locked on to the Synchronous Transport Signal-3 (STS-3) framing pattern.
Should there be
a loss of frame synchronization, an user alarm is generated.
[00062] The recovered data contains payload, as well as Section, Line, and
Path
Overhead (POH). The Section and Line Overhead are collectively considered
Transport
Overhead (TOH). TOH processing takes place by the processing of the B2 byte,
Bit
Interleaved Parity-8 (BIP-8), and Line Far-End Block Error (FEBE). Finally, a
detection of
Line Remote Defect Indication (RDI) and Line Alarm Indication Signal (AIS) is
performed.
13
CA 02430671 2003-05-30
[00063] Pointer tracking is performed by analyzing the H1/H2 bytes to
determine the
location of the JI POH byte. Loss Of Pointer (LOP) and AIS alarms are provided
for the
STS-1 signal. The B3 BIP-8 is checked for parity, and the number of bit or
block errors is
counted. The G1 byte is checked, and RDI status and the number of FEBEs are
countE:d.
All Section and Line Overhead bytes are processed at this time.
(00064] The DS3 data is extracted and passed into a resynchronization module
on tlhe
FPGA 96, where it uses a Phase-Locked Loop (PLL) to transmit data into
synchronous
DS3 formats. A reference clock is used to remove systematic fitter, and
Bipolar 3-Zero
Substitution (B3ZS) encoding takes place.
(00065] The transmit path receives incoming DS3 data, reformats it into an STS-
1, and
presents it to the optical interface circuitry. All overhead is processed in
this path as vvell.
[00066] B3ZS-encoded data is received and reformatted into a serial bit
stream. The
serial data is passed to a PLL to recover clock. The B3ZS signal is decoded,
and codvig
violations are detected.
(00067] The DS3 signal is converted to parallel data and mapped into an STS-1
format.
POH bytes are appended to the frame. FEBE and Path RDI can be inserted,
depending;
upon the status of local alarms.
[00068] Data is clocked into an expansion buffer to decouple the data. Data is
reclocked
by a 155 MHz clock and presented as a differential signal to the OC3
transceiver 90.
[00069] The OC3 transceiver 90 receives differential clock and data, and
converts it to a
1310 nm or a 1550 nm optical signal. Data and clock are combined and
transmitted at an
OC3 rate.
(00070] Tables 2 and 3 provide OC3-3D3 MUX 50 alarm contact information.
Standard
network channel terminating equipment (NOTE) pin-outs are used, as illustrated
in Fig.
10. The use of NCTE conventions permits generic mountings to accommodate a
multitude
of different plug-ins.
Table 2. 03-3D3 Alarm Contact Definitions
Alarm Condition_ Resulting Alarm_Contact Closure
OC3 or Local Contact closure between NCTE network
T & R (pins 7
Failure and 13)
Remote DS3-1 Contact closure between NCTE network
T1& R1(pins 41
Failure and 47)
14
CA 02430671 2003-05-30
Remote DS3-2 Contact closure between NOTE subscriber
T & R (pins
Failure 55 and 49)
Remote DS3-3 Contact closure between NOTE subscriber
T1 & R1 (pins
Failure 5 and 15)
Table 3. 03-3D3 Alarm Contact and Signal Insertion Mix
Local Remote
Local 03-3D3 03-3D3
Failure Alarm Indication
Indication
OC3 Remote OC3 Remote
OC DS3 DS3 DS3- Powe / DS3 DS3 DS3- / DS3- DS3- DS3-
3 -I -2 3 r Loca-1 -2 3 Loca I 2 3
1 1
X - - - ~- X ~ ~ ~..__X - - -
- X - - - X - - - - X - -
- - X - - X - - - - - X -
- - - X - X - - - - - - X
- - - - X X X X X X - - -
NOTE:
X
=
relay
closed;
-
=
relay
open.
(000'71] The front panel of the 03-3D3 MUX 3 has switches, indicators, and
connectors,
as described above in connection with Fig. 4 and described in more detail
below in Table
4.
Table 4. 03-3D3 Front-Panel Switches, Indicators, and Connectors
Switch Feature PositionFunction
DS3 LBO L Provisions DS3 #1 for coaxial cable
1 loop lengths of
greater than or equal to 100 feet.
S Provisions DS3 #1 for coaxial cable
loop lengths of
less than or equal to 100 feet.
CONTINUE Y In drop-and-continue ring applications,
configures 03-
3D3 to continue DS3 #I to "downstream"
03-3D3s.
In point-to-point applications,
disables local DS3 #1
alarms.
CA 02430671 2003-05-30
N In drop-and-continue ring applications,
configures 03-
3D3 to locally drop DS3 #1 and activate
the local DS?.
# 1 BNC connectors.
In point-to-point applications,
enables local DS3 #1
operation and activates local DS3
#1 alarms.
DS3 LBO L Provisions DS3 #2 for coaxial cable
2 loop lengths of
greater than or equal to 100 feet.
S Provisions DS3 #2 for coaxial cable
loop lengths of
less than or equal to 100 feet.
CONTINUE Y In drop-and-continue ring applications,
configures 03-
3D3 to continue DS3 #2 to "downstream"
03-3D3s.
In point-to-point applications,
disables local DS3 #2
alarms.
N In drop-and-continue ring applications,
configures 03-
3D3 to locally drop DS3 #2 and activate
the local DS3
#2 BNC connectors.
In point-to-point applications,
enables local DS3 #2
operation and activates local DS3
#2 alarms.
DS3 LBO L Provisions DS3 #3 for coaxial cable
3 loop lengths of
greater than or equal to 100 feet.
S Provisions DS3 #3 for coaxial cable
loop lengths of
greater than or equal to 100 feet.
CONTINjJEY In drop-and-continue ring applications,
configures 03-
3D3 to continue DS3 #3 to "downstream"
03-3D3s.
In point-to-point applications,
disables local DS3 #3
alarms.
N In drop-and-continue ring applications,
configures 03-
3D3 to locally drop DS3 #3 and activate
the local DS3
#3 BNC connectors.
In point-to-point applications,
enables local DS3 #3
operation and activates local DS3
#3 alarms.
Table 4. (Continued) 03-3D3 Front-Panel Switches, Indicators, and Connectors
IndicatorFunction
UNIT Lights green to show normal unit operation.
Lights red to show a unit failure.
OC3 PRI Lights green to show normal operation of the primary
OC3 link.
16
CA 02430671 2003-05-30
Lights red to show a failure of the primary OC3
link.
Lights a_mbe_r t_o _sh_o_w _an OC3 failure has
been detected at a remote location.
ACTIVE Lights green to show the primary OC3 link is carrying
the traffic payload vn
(OC3 PRI)"P' versions equipped with integral fiber switch-to-protect.
Turns OFF to show the primary OC3 link is not carrying
the tragic payload in
"P' versions equipped with integral fiber switch-to-protect.
OC3 SEC Lights green to show normal operation of the secondary
OC3 link in "P"
versions equipped with integral fiber switch-to-protect.
Lights red to show a failure of the secondary OC3
link in "P' versions
equipped with integral fiber switch-to-protect.
Lights amber to show an OC3 failure has been detected
at a remote location.
ACTIVE Lights green to show the secondary OC3 link is
carrying the traffic payload in
(OC3 SEC)"P" versions equipped with integral fiber switch-to-protect.
Turns OFF to show the secondary OC3 link is not
carrying the traffic payload
in "P" versions equipped with integral fiber switch-to-protect.
DS3 1 Lights green to show normal operation of DS3 #l;
flashes green to show
loopback.
Lights amber to show a far-end trouble; remains
amber during additional
near-end failure until far-end failure clears.
Turns OFF to show the local DS3 port is not active
because it is in
CONTINUE mode.
Lights red to show a failure of DS3 #l.
DS3 2 Lights green to show normal operation of DS3 #2;
flashes green to show
loopback.
Lights amber to show a far-end trouble; remains
amber during additional
near-end failure until far-end failure clears.
Turns OFF to show the local DS3 port is not active
because it is in
CONTINUE mode.
Lights red to show a failure of DS3 #2.
DS3 3 Lights green to show normal operation of DS3 #3;
flashes green to show
loopback.
Lights amber to show a far-end trouble; remains
amber during additional
near-end failure until far-end failure clears.
Turns OFF to show the local DS3 port is not active
because it is in
CONTINUE mode.
Lights red to show a failure of DS3 #3.
Table 4. (Continued) 03-3D3 Front-Panel Switches, Indicators, and Connectors
Connector Type ~ ~ Function
OC3 PRI IN Duplex SC Primary OC3 input. ________ _
OC3 PRI Duplex SC Primary OC3 output.
OUT
17
CA 02430671 2003-05-30
OC3 SEC Duplex Secondary switch-to-protect OC3 input
IN SC for "P' version units.
OC3 SEC Duplex Secondary switch-to-protect OC3 output
OUT SC for "P" version units.
DS3 1 IN 75 BNC DS3 #1 input.
DS3 1 OUT 75 BNC DS3 #1 output.
DS3 2 IN 75 BNC DS3 #2 input.
DS3 2 OUT 75 BNC DS3 #2 output.
DS3 3 IN 75 BNC DS3 #3 input.
DS3 3 OUT 75 BNC DS3 #3 output.
[000'72] The 03-3D3 MUX 50 is preprovisioned for an established network and
emerging DS3 applications to simplify set up and provisioning for its use in a
particular
application. More specifically, the SONET multiplexer 50 also has a limited
set of
switches (e.g., six on the front access panel 56 and two on the inside board
52).
Remaining parameters are predetermined and set up as defaults and require no
provisioning on the part of the user.
[00073] As shown in Fig. 4, the six switches 106, 108, 110, 112, 114 and 116
correspond to two types of switches allowing user selection of two respective
parameters
for each of three DS3 ports 58, 60 and 62 to the SONET multiplexer 50. The two
types of
switches allow the user to select, respectively, the line build out parameter
(i.e., long or
short) and continue parameter (i.e., yes for continue/drop if the DS3 is to be
sent out via an
OC3 port, or no if the DS3 is to be dropped and sent out as a DS3) for the
corresponding
DS3 port.
[000?4] As shown in Fig. 8, switch S 1-1 118 on the lower printed circuit
board 52
(PCB) selects either 60-minute loopback timeout (i.e., EN (enable) position)
or no
loopback timeout (i.e., DIS (disable) position). Switch S1-2 120 selects
whether the unit
will respond to either the standard DS3 LINE loopback code (from GR-499-CORE)
or a
network interface unit (NIU) loopback code (0001001011111111 = loop up and
00100100011111111 = loop down). In accordance with an aspect of the present
invention,
the NIU loopback can provide a different 03-3D3 loopback capability when the
unit is
connected to another device that uses the standard far-end alarm and control
(FEAC)
loopback code.
[000?5] The continue/drop selection for each DS3 port 58, 60 and 62 via a
simple
switch position selection via its corresponding switch 106, 110 and 114
represents a
18
CA 02430671 2003-05-30
significant advantage over existing SONET multiplexers. The drop application
is
illustrated in Fig. 6, and the drop and continue ring application is
illustrated in Fig. 5.
Each of the four 03-3D3 SONET multiplexers of the present invention used in
this
application need only have the ring respective CONTINUE switches switched to
the Y
position (i.e., yes) to enable the data paths needed for this application. By
contrast, if four
Fujitsu Multiplexers 10 were to be deployed in such a ring configuration, each
Fujitsu
Multiplexes 10 would require substantial provisioning to instruct the unit
regarding which
data paths are being used, as well as alarm conditions, among other
configuration data.
[000?6] The advantages of the SONET multiplexes 50 of the present invention
over
existing systems such as the Fujitsu Multiplexes 10 is also illustrated when
only a subset
of the ports are used. For example, if only two of the three DS3 ports of the
SONET
multiplexes are employed in an application, the CONTINUE switches indicate
which of
the three ports is not being used, thereby eliminating the need for an alarm.
By contrast, if
only two ports of the Fujitsu Multiplexes 10 are used, the unit must be
provisioned to tell
it how to cross-connect DS3s at each point of an application such as the ring
configuration
(Fig. 5). As stated previously, each data path must be completely configured,
otherwise,
the Fujitsu Multiplexes 10 will not operate. The SONET multiplexes 50 of the
present
invention has preconfigured data paths and operates upon mere power up, in
addition to
the paths being simply reconfigurable via the switches 106, I 10 and 114.
Further, a node
created through provisioning of a Fujitsu Multiplexes 10 can be completely tom
down or
rendered inoperable by an incorrect key stroke on the computer running the
provisioning
application during the provisioning process. The SONET multiplexes SO of the
preset
invention, on the other hand, eliminates the need for any such computer, as
well as the
associated risk than an incorrect keystroke would disrupt operation.
[000??] The SONET multiplexes SO of the preset invention simplifies
provisioning a
number of ways such as by basing system timing and synchronization on an
internally
generated clock (i.e., a DS3-based clock imbedded in SONET), as opposed to
making
system timing a provisionable parameter as in existing systems (e.g., which
provide a user
with choices such as SONET and global positioning system (GPS) timing). In
addition,
the SONET multiplexes 50 of the preset invention provides users with one
predetermined
interface (i.e., OC3 to DS3) and therefore does not require T1 provisioning or
provisioning
as to connections with DS1, DS2, OC12, among others, as do existing SONET
19
CA 02430671 2003-05-30
multiplexers. The SONET multiplexes SO is configured as a single card and
therefore does
not require equipment provisioning (e.g., for multiple cards) as do existing
SONET
multiplexers. Since the SONET multiplexes 50 provides simple switches, no
security
provisioning is needed to prevent unauthorized remote access, unlike existing
SONET
multiplexers requiring a user interface via a computer and therefore possibly
using
passwords or other security measures.
(000'18] Another advantage of the SONET multiplexes 50 of the present
invention is its
ability to provide a loopback for maintenance. The SONET multiplexes 50 is
configured
to have a loopback time out and predetermined codes to allow transmission of a
data
stream (e.g., comprising one of the codes) to a distant unit and reception of
returned data
to ensure that the signal path is good. The afore-mentioned switches 106, 108,
110, 112,
114 and 116 do not affect the data paths in the multiplexes 50, as stated
above, nor this
loopback operation, in contrast with provisioning operations for existing
equipment such
as the Fujitsu Multiplexes 10. The aforementioned inband loopback codes allow
a
customized response (e.g., selection of one of the two codes) to allow a user
deeper
penetration during equipment testing and to ensure that a selected piece of
equipment is
being tested.
(000'79] As stated above, existing SONET multiplex equipment generally
requires apt
least one equipment shelf with multiple cards, or at least, multiple cards to
achieve such
functions as data path control, alarms, switch protection, synchronization,
and monitoring
operations, among other functions. The Fujitsu Multiplexes 10 uses several
cards to
provide OC3 to DS3 to DS1 multiplexing. The existing form factors (e.g.,
equipment
shelves for bay installation and cards for use in bay shelves) are largely due
to the
development of SONET multiplex equipment using components such as
microprocessors
and other integrated circuits that are interfaced via microprocessor and
corresponding
software to interoperate these components.
(00080] In accordance with an aspect of the present invention, a SONET
multiplexe;r 50
is provided to perform OC3 to DS3 multiplexing and demultiplexing operations
using; a
substantially reduced form factor as compared with existing SONET equipment
that can
perform the same multiplexing functions. The SONET multiplexes 50 of the
present
invention is implemented as a single card (i.e., capable of deployment on a
single card slot
in a telecommunications bay equipment shelf). As described above in connection
with
CA 02430671 2003-05-30
Figs. 3A, 3B, 3C and 4, the card SO comprises a face plate 56 and two attached
circuit
boards S2 and S4 referred to as the main board S2 and the lower board S4. The
main board
52 comprises a field programmable gate array (FPGA), the operations of which
are
described below in connection with a hardware block diagram depicted in Fig.
11. Thus,
the SONET multiplexes SO of the present invention is considerably smaller than
existing
SONET multiplexers having the same functionality, which consist of multiple
plug-in
cards. While single-card media converters are available to perform optical and
electrical
signal conversions, they are not able to conform to the GR-499 and GR-2S3
standards as
does the SONET multiplexes SO of the present invention.
[00081] The reduced form factor of the SONET multiplexes SO therefore
overcomes
many of the disadvantages of existing multi-card SONET multiplexers since it
does not
require much equipment space. Further, the SONET multiplexes SO of the present
invention can be deployed as a standalone component and therefore need not be
inserted
into a bay shelf at all, but instead can be mounted on the side of a bay, on a
wall in the
equipment area of the CO, RT or other user, on a top of a computer, table or
other work
surface, among other places.
[00082] With continued reference to Fig. 4, the SONET multiplexes 50 of the
present
invention allows front panel 56 accesses to three DS3 ports S8, 60 and 62, as
well as the
OC3 port 64. The single card implementation of the SONET multiplexes 50
facilitates its
use with other cards such as a wave division multiplexes (WDM) and a DS3 to DS
1
multiplexes (M13), which are described in the afore-mentioned application
Serial Nos.
(Attorney's Files 44784 and 44785), both filed concurrently herewith. By way
of an
example, the 03-3D3 MUX SO can be used within a high rise building receiving
an OC-12
feeder. The 03-3D3 MUX SO can be used to drop DS3s to different floors. The
M13 can
also be used to drop DS 1 s to different floors. The configuration of the 03-
3D3, the M 13
and the WDM as single-card building components allows different arrangements
of these
cards in a small profile chassis or enclosure that is independent of equipment
shelves for
flexible installations, as described in the afore-mentioned application Serial
Nos.
(Attorney's Files 44784 and 44785). Further, unlike existing SONET equipment,
the
chassis does not have dedicated card slots.
[00083] The reduced form factor and FPGA also provide for integral switch
protection.
As will be described in further detail below, the SONET MUX 50 of the present
invention
21
CA 02430671 2003-05-30
provides a protection switching using only a single circuit, that is, the 03-
3D3 card SO
configuration as shown in Fig. 3A. By contrast, existing SONET multiplex
equipment
requires two separate circuit packs at each node, as illustrated in Fig. 2. As
discussed
above in connection with the Adtran unit 20, this dual circuit configuration
of existing
equipment is disadvantageous because it doubles the cost and power
consumption,
consumes more equipment space, and is more likely to be subject to equipment
failure..
(00084] Figs. 11 A, 11 B and 11 C illustrate a hardware block diagram for the
03-3D:3
MUX 50. The FPGA is represented as a number of modules (e.g., the OC3ALARM
7.'OP
module 130, the ADD ADROP TOP module 132 the MICRO TOP module 134, the
FEAC TOP module 136, and the DS3 ALARM TOP module 138, among others).
Throughout Fig. 11, the FPGA is indicated in phantom and referred to generally
as the.
FPGA 96.
[00085) The block diagram shown in Fig. 12 illustrates the logical association
of the bus
structures between the SONET overhead terminator 98 and mapper 100 devices in
Fig. 11.
The first process to be discussed is the processing of RX Terminal data from
the SONET
overhead terminator 98 device. This function involves aligning the RX Terminal
signals
(RTDO(n), RPAR, RC1J1, RSPE and RTCO) phase relationships so that the output
phase
characteristics of the SONET overhead terminator 98 device signals are
matchexl to the input
signal phase requirements of the mapper 100 Drop-Bus interface (DROPBUS(n),
DPAR,
DC 1 J 1, DSPE and DCLK).
(00086] As seen in Fig. 12, the ACLK, ASPE and AC 1 J 1 are inputs to the
mapper 100
device. These signals are created inside the FPGA 96.
(00087] The timing requirements of the SONET overhead terminator TX Terminal
interface
will now be discussed. The TTCI clock signal is internally generated by the
FPGA. This signal
is used to control the TX Terminal data timing to the SONET overhead
terminator 98. The
TTCI, TC 1 J 1 and TSPE signals are based on timing signal that are internally
generated from
the ADD-Bus interface. These signals are delayed and time aligned with the
data and re-
calculated parity prior to being placed on the TX Terminal Bus interface.
[00088) The block diagram in Fig. 13 illustrates the signal flow and sub-
functions for the
FEAC Code Detector and DS3(n) T~S:MUX Loop-back Control module 136 functional
block.
The signal inputs are being used to monitor the for the unique FEAC code
sequences (Activate
Loop-back/De-Activate Loop-back) that are being received by the 03-3D3 unit 50
via the
22
CA 02430671 2003-05-30
SONET interface. Individual framers attached to each interface (RPOS(n),
RNEG(n) and
RCLK(n) signals) synchronize to the DS3 frame structure and then extract the
FEAC code
sequence. The FEAC code is then presented at the framer output, along with a
strobe signal.
The FEAC code at this output point remains essentially constant as long as the
received code
does not change. If any other code is detected, the framer latches the new
FEAC code, along
with a strobe signal to the outputs of the framer.
[00089] If the FEAC code on the framer outputs match the unique "proprietary
Activate
Loop-back code" previously discussed, the FPGA 96 forces the DS3(n) interface
of the mapper
100 into a "Loop-back mode". This condition is maintained until such a time as
the FPGA' 96
detects the correct "Release Loop-back Code" on the TX DS3(n) interface (e.g.,
the RPOS(n),
RNEG(n) and RCLK(n) signals). At this time, the FPGA 96 de-asserts the DS3 *LB
signal(s).
De-asserting the DS3 *LB signal(s) allows the normal DS3 alarm processing
function to
resume.
[00090] Another function performed by the FPGA 96 is the processing of OC-3
alarm
conditions and the control of a RX Data multiplexer used to perform protection
switching
functions. As stated above, the SONET MCJX 50 has a second optical data path
(e.g., e.g.,
optical transceiver 90', CDRU 92' and optical line interface 94' shown in Fig.
9). As shov~rn in
Fig. 11A, the inputs to the transceivers 90 and 90' are processed by SONET
synchronizers 131
and 132.
[00091] As soon as an OC-3 alarm condition is detected in one (e.g., the
active path) of the
optical transceiver inputs, the FPGA 96 integrates the alarms to determine if
the alarm
condition is momentary or continuous. If the alarm condition is determined to
be continuous,
the FPGA 96 accomplishes a "protection switch" to the "inactive trunk".
[00092] Another mechanism by which a "switch to protection" can be
accomplished by the
03-3D3 MIJX 50 is through the interpretation of the received APS (Automatic
Protection
Switching) bytes (Kl & K2) contained in the Line Overhead of the SONET frame.
The APS
configuration that the 03-3D3 MIJX SO uses is referred to as a "1+1
Unidirectional
Architecture". This architecture is defined as having the transmitted signal
continuously
bridged on both the Active and In-active data paths. The receive data paths
are monitored
independently and identically for failures.
[00094] Fig. 14 illustrates the interaction between the DS3(n) alarm inputs,
their associated
front-panel LEDs 74, 76 and 78 and the alarm relay used to indicate DS3(n)
alarm conditions.
23
CA 02430671 2003-05-30
Also shown in Fig. 14 is the relationship between the OC3 Alarm Processing
block modulE;
130 signals (BD ALM, OC3(P) F, OC3(S) F and OC3(x) SEL) and their associated
front-
panel LEDs 66 and 68.
[00095) The DS3(n) alarm inputs consist of RLOL DS3_(n), RLOS DS3_(n),
LCV DS3-(n), DMO_(n) and RXAIS_(n). These alarms are used to determine the
location of
the detected alarm condition. The DS3(n) EN signal is also used to determine
the necessiy of
processing any alarms from the individual DS3 ports (based on the state of the
DS3(n) EN
control input). The state of the DS3(n) EN signal is also used to determine
the output drive;
level of the RLB_(n) and LLB_(n) signals. If the DS3(n) EN signal level is
logic 'low', the
state of RLB_(n) and LLB-(n) will be logic 'low'. If the DS3(n) EN signal
level is logic
'high', the state of RLB_(n) and LLB_(n) is logic 'high'.
[00096) In the event that the FPGA 96 detects a valid DS3(n) alarm condition,
the FPGA
drives pre-defined outputs to indicate the alarm. These outputs, DS3(n) LED(G
or R),
RLY2 DRV and TXAIS(n) (if applicable), control the states of front-panel LEDs,
alarm relays
and, if necessary, input control pins of the mapper 100.
(00097] If an alarm condition is detected, and is determined to be associated
with some
alarm condition that is identified as a unit-level problem, the FPGA 96 uses
the DS3(n) alarm
drive signal along with the BD ALM signal to indicate a unit-level alarm
condition. This alarm
condition causes the INT UNIT ALM signal, along with the UNIT LED to be driven
to its
active state.
(00098) The functions associated with timer module 148 (Fig. I 1B) are to
provide:
( 1 ) 60 minute loop-back time-out timer function (controlled by TIMEOUT EN
signal) for the DS3(n) interface being remotely tested by the NOC (Network
Operation
Control) center; and
(2) Integration timer for reduction of "protection switching chatter" of
alarm/status
indicators on the OC-3 data paths.
(00099) The 60 minute loop-back time-out timer function is used to prevent the
remotely
activated maintenance loop-back from being continuously active in the event of
NOC
personnel mistakenly leave the DS3(n) trunk in a test condition. This function
is user-
controllable by an activate/defeat switch located on the main board 52.
[000100) In the event that the customer "activates" this option, and that a
loopback
activation period of greater than 60 minutes is detected, the MUX SO
automatically returns the
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CA 02430671 2003-05-30
DS3(n) trunk being tested to the "non-looped-back" state of operation. At this
time, the
DS3 *LB signal changes from its' "active high" logic level to its' "inactive
low" logic level.
If this option is not "active", the DS3(n) trunk being tested will remain in
the loop-back sxate
until a "De-Activate Loop-back" FEAC code is detected by the FEAC comparator
circuitry
(Fig. 12).
(000101] Alarm Processing is described in Table 5.
Table 5: Alarm Matrix (Alarm Relays and Front Panel LEDs')
Alarm Condition OC3 DS3 Front EDs'
Panel
L
__
RL RL UNI
Y1 Y2 T OC3 OC3 AC AC DS3 DS3 DS3
(P) (S) T T 1 2 3
(P) (S)
1. NO ALARMS
(OC3 P ACTIVE) INA 1NA GR GR GR ON GR GR GR
C C N N N OFF N N N
2. ALARM ACTIVE
(OC3 P ERROR) AC INA GR RE GR GR GR GR
T C N D N OFF ON N N N
3. ALARM ACTIVE
(OC3 S ERROR) AC INA GR GR RE ON GR GR GR
T C N N D OFF N N N
4. ALARM ACTIVE
(DS3_1 ERROR) INA AC GR GR GR ON RE GR GR
C T N N N OFF D N N
5. ALARM ACTIVE
(DS3 2 ERROR) INA AC GR GR GR ON GR RE GR
C T N N N OFF N D N
6. ALARM ACTIVE
(DS3 3 ERROR) INA AC GR GR GR ON GR GR RE
C T N N N OFF N N D
7. NO ALARMS
(DS3_IOUTSERV.) INA INA GR GR GR ON GR GR
C C N N N OFF OFF N N
8. NO ALARMS
(DS3 2 OUTSERV.) INA INA GR GR GR ON GR GR
C C N N N OFF N OFF N
9. NO ALARMS
(DS3 3 OUTSERV.) INA INA GR GR GR ON GR GR
C C N N N OFF N N OFF
CA 02430671 2003-05-30
10. ALARM ACTIVE
(DS3_1 ERROR) INA AC GR GR GR ON RE GR GR
C T N N N OFF D N N
11. ALARM ACTIVE
(DS3 2 ERROR) INA AC GR GR GR ON GR RE GR
C T N N N OFF N D N
12. ALARM ACTIVE
(DS3 3 ERROR) INA AC GR GR GR ON GR GR RE
C T N N N OFF N N D
13. NO ALARMS
(DS3_IOUTSERV.) INA INA GR GR GR ON GR GR
C C N N N OFF OFF N N
14. NO ALARMS
(DS3 2 OUTSERV.) INA INA GR GR GR ON GR GR
C C N N N OFF N OFF N
15. NO ALARMS
(DS3 3 OUTSERV.) INA INA GR GR GR ON GR GR
C . C. N N N OFF N N OFF
16. UNIT FAILURE
(NO CARR. FAULT) AC AC RE GR GR ON GR GR GR
T. T. D N N OFF N N N
NOTE: Alarm conditions 4 through 9 AND 16 have the OC3 (P) tnmk active.
Alarm conditions 10 through 15 have the OC3_(S) trunk active.
[000102jAlthough the present invention has been described with reference to a
preferred
embodiment thereof, it will be understood that the invention is not limited to
the details thereof.
Various modifications and substitutions will occur to those of ordinary skill
in the art. All such
substitutions are intended to be embraced within the scope of the invention as
defined in the
appended claims.
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